[Tinyos-2-commits] CVS: tinyos-2.x/tos/chips/msp430/usart
HplMsp430I2C.nc, NONE, 1.1.2.1 HplMsp430I2C0P.nc, NONE,
1.1.2.1 Msp430I2CConfigure.nc, NONE, 1.1.2.1 HplMsp430Usart.nc,
1.1.2.5, 1.1.2.6 HplMsp430Usart0C.nc, 1.1.2.9,
1.1.2.10 HplMsp430Usart0P.nc, 1.1.2.9, 1.1.2.10 Msp430I2C0P.nc,
1.1.2.2, 1.1.2.3 Msp430I2CC.nc, 1.1.2.2, 1.1.2.3 Msp430I2CP.nc,
1.1.2.3, 1.1.2.4 Msp430Usart0C.nc, 1.1.2.6,
1.1.2.7 Msp430UsartShare0P.nc, 1.1.2.7, 1.1.2.8 msp430usart.h,
1.1.2.2, 1.1.2.3
Jonathan Hui
jwhui at users.sourceforge.net
Wed Aug 30 10:15:58 PDT 2006
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Update of /cvsroot/tinyos/tinyos-2.x/tos/chips/msp430/usart
In directory sc8-pr-cvs10.sourceforge.net:/tmp/cvs-serv13167
Modified Files:
Tag: tinyos-2_0_devel-BRANCH
HplMsp430Usart.nc HplMsp430Usart0C.nc HplMsp430Usart0P.nc
Msp430I2C0P.nc Msp430I2CC.nc Msp430I2CP.nc Msp430Usart0C.nc
Msp430UsartShare0P.nc msp430usart.h
Added Files:
Tag: tinyos-2_0_devel-BRANCH
HplMsp430I2C.nc HplMsp430I2C0P.nc Msp430I2CConfigure.nc
Log Message:
Update I2C implementation to match usart updates with configure.
--- NEW FILE: HplMsp430I2C.nc ---
#include <msp430usart.h>
interface HplMsp430I2C {
async command bool isI2C();
async command void clearModeI2C();
async command void setModeI2C( msp430_i2c_config_t* config );
// U0CTL
async command void setMasterMode();
async command void setSlaveMode();
async command void enableI2C();
async command void disableI2C();
// I2CTCTL
async command bool getWordMode();
async command void setWordMode( bool mode );
async command bool getRepeatMode();
async command void setRepeatMode( bool mode );
async command uint8_t getClockSource();
async command void setClockSource( uint8_t src );
async command bool getTransmitReceiveMode();
async command void setTransmitMode();
async command void setReceiveMode();
async command bool getStartByte();
async command void setStartByte();
async command bool getStopBit();
async command void setStopBit();
async command bool getStartBit();
async command void setStartBit();
// I2CDR
async command uint8_t getData();
async command void setData( uint8_t data );
// I2CNDAT
async command uint8_t getTransferByteCount();
async command void setTransferByteCount( uint8_t count );
// I2CPSC
async command uint8_t getClockPrescaler();
async command void setClockPrescaler( uint8_t scaler );
// I2CSCLH and I2CSCLL
async command uint16_t getShiftClock();
async command void setShiftClock( uint16_t shift );
// I2COA
async command uint16_t getOwnAddress();
async command void setOwnAddress( uint16_t addr );
// I2CSA
async command uint16_t getSlaveAddress();
async command void setSlaveAddress( uint16_t addr );
// I2CIE
async command void disableStartDetect();
async command void enableStartDetect();
async command void disableGeneralCall();
async command void enableGeneralCall();
async command void disableTransmitReady();
async command void enableTransmitReady();
async command void disableReceiveReady();
async command void enableReceiveReady();
async command void disableAccessReady();
async command void enableAccessReady();
async command void disableOwnAddress();
async command void enableOwnAddress();
async command void disableNoAck();
async command void enableNoAck();
async command void disableArbitrationLost();
async command void enableArbitrationLost();
// I2CIFG
async command bool isStartDetectPending();
async command bool isGeneralCallPending();
async command bool isTransmitReadyPending();
async command bool isReceiveReadyPending();
async command bool isAccessReadyPending();
async command bool isOwnAddressPending();
async command bool isNoAckPending();
async command bool isArbitrationLostPending();
// I2CIV
async command uint8_t getIV();
}
--- NEW FILE: HplMsp430I2C0P.nc ---
/*
* Copyright (c) 2005-2006 Arch Rock Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
* - Neither the name of the Arch Rock Corporation nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE
*/
/**
* @author Jonathan Hui <jhui at archrock.com>
* @version $Revision: 1.1.2.1 $ $Date: 2006/08/30 17:15:55 $
*/
module HplMsp430I2C0P {
provides interface HplMsp430I2C as HplI2C;
uses interface HplMsp430Usart as HplUsart;
uses interface HplMsp430GeneralIO as SIMO;
uses interface HplMsp430GeneralIO as UCLK;
}
implementation {
MSP430REG_NORACE(U0CTL);
MSP430REG_NORACE(I2CTCTL);
MSP430REG_NORACE(I2CDR);
MSP430REG_NORACE(I2CSA);
MSP430REG_NORACE(I2CIE);
async command bool HplI2C.isI2C() {
atomic return ((U0CTL & I2C) && (U0CTL & SYNC) && (U0CTL & I2CEN));
}
async command void HplI2C.clearModeI2C() {
atomic U0CTL &= ~(I2C | I2CEN | SYNC);
}
async command void HplI2C.setModeI2C( msp430_i2c_config_t* config ) {
atomic {
U0CTL &= ~(I2C | I2CEN | SYNC);
U0CTL = SWRST;
U0CTL |= SYNC | I2C;
U0CTL &= ~I2CEN;
call HplUsart.disableUart();
call HplUsart.disableSpi();
call SIMO.makeInput();
call SIMO.selectModuleFunc();
call UCLK.makeInput();
call UCLK.selectModuleFunc();
U0CTL |= ( ( config->rxdmaen << 7 ) |
( config->txdmaen << 6 ) |
( config->xa << 4 ) |
( config->listen << 3 ) );
I2CTCTL = ( ( config->i2cword << 7 ) |
( config->i2crm << 6 ) |
( config->i2cssel << 4 ) );
I2CPSC = config->i2cpsc;
I2CSCLH = config->i2csclh;
I2CSCLL = config->i2cscll;
I2COA = config->i2coa;
U0CTL |= I2CEN;
}
}
// U0CTL
async command void HplI2C.setMasterMode() { U0CTL |= MST; }
async command void HplI2C.setSlaveMode() { U0CTL &= ~MST; }
async command void HplI2C.enableI2C() { U0CTL |= I2CEN; }
async command void HplI2C.disableI2C() { U0CTL &= ~I2CEN; }
// I2CTCTL
async command bool HplI2C.getWordMode() {
return ( I2CTCTL & I2CWORD ) != 0;
}
async command void HplI2C.setWordMode( bool mode ) {
I2CTCTL |= ( mode & 0x1 ) << 7;
}
async command bool HplI2C.getRepeatMode() {
return ( I2CTCTL & I2CRM ) != 0;
}
async command void HplI2C.setRepeatMode( bool mode ) {
I2CTCTL |= ( mode & 0x1 ) << 6;;
}
async command uint8_t HplI2C.getClockSource() {
return ( I2CTCTL >> 4 ) & 0x3;;
}
async command void HplI2C.setClockSource( uint8_t src ) {
atomic I2CTCTL = ( ( src & 0x3 ) << 4 ) | I2CTCTL;
}
async command bool HplI2C.getTransmitReceiveMode() {
return ( I2CTCTL & I2CTRX ) != 0;
}
async command void HplI2C.setTransmitMode() { I2CTCTL |= I2CTRX; }
async command void HplI2C.setReceiveMode() { I2CTCTL &= ~I2CTRX; }
async command bool HplI2C.getStartByte() { return (I2CTCTL & I2CSTB) != 0; }
async command void HplI2C.setStartByte() { I2CTCTL |= I2CSTB; }
async command bool HplI2C.getStopBit() { return (I2CTCTL & I2CSTP) != 0; }
async command void HplI2C.setStopBit() { I2CTCTL |= I2CSTP; }
async command bool HplI2C.getStartBit() { return (I2CTCTL & I2CSTT) != 0; }
async command void HplI2C.setStartBit() { I2CTCTL |= I2CSTT; }
// I2CDR
async command uint8_t HplI2C.getData() { return I2CDR; }
async command void HplI2C.setData( uint8_t v ) { I2CDR = v; }
// I2CNDAT
async command uint8_t HplI2C.getTransferByteCount() { return I2CNDAT; }
async command void HplI2C.setTransferByteCount( uint8_t v ) { I2CNDAT = v; }
// I2CPSC
async command uint8_t HplI2C.getClockPrescaler() { return I2CPSC; }
async command void HplI2C.setClockPrescaler( uint8_t v ) { I2CPSC = v; }
// I2CSCLH and I2CSCLL
async command uint16_t HplI2C.getShiftClock() {
uint16_t shift;
atomic {
shift = I2CSCLH;
shift <<= 8;
shift |= I2CSCLL;
}
return shift;
}
async command void HplI2C.setShiftClock( uint16_t shift ) {
atomic {
I2CSCLH = shift >> 8;
I2CSCLL = shift;
}
}
// I2COA
async command uint16_t HplI2C.getOwnAddress() { return I2COA; }
async command void HplI2C.setOwnAddress( uint16_t addr ) { I2COA = addr; }
// I2CSA
async command uint16_t HplI2C.getSlaveAddress() { return I2CSA; }
async command void HplI2C.setSlaveAddress( uint16_t addr ) { I2CSA = addr; }
// I2CIE
async command void HplI2C.disableStartDetect() { I2CIE &= ~STTIE; }
async command void HplI2C.enableStartDetect() { I2CIE |= STTIE; }
async command void HplI2C.disableGeneralCall() { I2CIE &= ~GCIE; }
async command void HplI2C.enableGeneralCall() { I2CIE |= GCIE; }
async command void HplI2C.disableTransmitReady() { I2CIE &= ~TXRDYIE; }
async command void HplI2C.enableTransmitReady() { I2CIE |= TXRDYIE; }
async command void HplI2C.disableReceiveReady() { I2CIE &= ~RXRDYIE; }
async command void HplI2C.enableReceiveReady() { I2CIE |= RXRDYIE; }
async command void HplI2C.disableAccessReady() { I2CIE &= ~ARDYIE; }
async command void HplI2C.enableAccessReady() { I2CIE |= ARDYIE; }
async command void HplI2C.disableOwnAddress() { I2CIE &= ~OAIE; }
async command void HplI2C.enableOwnAddress() { I2CIE |= OAIE; }
async command void HplI2C.disableNoAck() { I2CIE &= ~NACKIE; }
async command void HplI2C.enableNoAck() { I2CIE |= NACKIE; }
async command void HplI2C.disableArbitrationLost() { I2CIE &= ~ALIE; }
async command void HplI2C.enableArbitrationLost() { I2CIE |= ALIE; }
// I2CIFG
async command bool HplI2C.isStartDetectPending() {
return ( I2CIFG & STTIFG ) != 0;
}
async command bool HplI2C.isGeneralCallPending() {
return ( I2CIFG & GCIFG ) != 0;
}
async command bool HplI2C.isTransmitReadyPending() {
return ( I2CIFG & TXRDYIFG ) != 0;
}
async command bool HplI2C.isReceiveReadyPending() {
return ( I2CIFG & RXRDYIFG ) != 0;
}
async command bool HplI2C.isAccessReadyPending() {
return ( I2CIFG & ARDYIFG ) != 0;
}
async command bool HplI2C.isOwnAddressPending() {
return ( I2CIFG & OAIFG ) != 0;
}
async command bool HplI2C.isNoAckPending() {
return ( I2CIFG & NACKIFG ) != 0;
}
async command bool HplI2C.isArbitrationLostPending() {
return ( I2CIFG & ALIFG ) != 0;
}
// I2CIV
async command uint8_t HplI2C.getIV() {
return I2CIV;
}
}
--- NEW FILE: Msp430I2CConfigure.nc ---
/*
* Copyright (c) 2004-2006, Technische Universitaet Berlin
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - Neither the name of the Technische Universitaet Berlin nor the names
* of its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
* OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
* Interface used by Msp430I2C clients to reconfigure the I2C before use
* @author Vlado Handziski <handzisk at tkn.tu-berlin.de>
* @version $Revision: 1.1.2.1 $ $Date: 2006/08/30 17:15:55 $
*/
#include "msp430usart.h"
interface Msp430I2CConfigure {
async command msp430_i2c_config_t* getConfig();
}
Index: HplMsp430Usart.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/msp430/usart/HplMsp430Usart.nc,v
retrieving revision 1.1.2.5
retrieving revision 1.1.2.6
diff -C2 -d -r1.1.2.5 -r1.1.2.6
*** HplMsp430Usart.nc 3 Aug 2006 18:10:41 -0000 1.1.2.5
--- HplMsp430Usart.nc 30 Aug 2006 17:15:55 -0000 1.1.2.6
***************
*** 44,117 ****
interface HplMsp430Usart {
!
! /**
! * Sets the UxCTL Control Register
! */
! async command void setUctl(msp430_uctl_t control);
!
! /**
! * Reads the UxCTL Control Register
! */
! async command msp430_uctl_t getUctl();
!
! /**
! * Sets the UxTCTL Transmit Control Register
! */
! async command void setUtctl(msp430_utctl_t control);
!
! /**
! * Reads the UxTCTL Transmit Control Register
! */
! async command msp430_utctl_t getUtctl();
!
! /**
! * Sets the UxRCTL Receive Control Register
! */
! async command void setUrctl(msp430_urctl_t control);
!
! /**
! * Reads the UxRCTL Receive Control Register
! */
! async command msp430_urctl_t getUrctl();
!
! /**
! * Sets the UxBR0 and UxBR1 Baud Rate Control Registers
! */
! async command void setUbr(uint16_t ubr);
!
! /**
! * Reads the UxBR0 and UxBR1 Baud Rate Control Registers
! */
! async command uint16_t getUbr();
!
! /**
! * Sets the UxMCTL Modulation Control Register
! */
! async command void setUmctl(uint8_t umctl);
!
! /**
! * Reads the UxMCTL Modulation Control Register
! */
! async command uint8_t getUmctl();
!
! /*
! async command void setI2Cpsc(uint8_t control);
! async command uint8_t getI2Cpsc();
!
! async command void setI2Csclh(uint8_t control);
! async command uint8_t getI2Csclh();
!
! async command void setI2Cscll(uint8_t control);
! async command uint8_t getI2Cscll();
!
! async command void setI2Coa(msp430_i2c_oa_t address);
! async command msp430_i2c_oa_t getI2Coa();
!
! async command void setI2Ctctl(msp430_i2ctctl_t control);
! async command msp430_usart_i2ctctl_t getI2Ctctl();
*/
! async command void resetUsart(bool reset);
!
/**
* Returns an enum value corresponding to the current mode of the
--- 44,100 ----
interface HplMsp430Usart {
!
! /**
! * Sets the UxCTL Control Register
*/
+ async command void setUctl(msp430_uctl_t control);
+
+ /**
+ * Reads the UxCTL Control Register
+ */
+ async command msp430_uctl_t getUctl();
+
+ /**
+ * Sets the UxTCTL Transmit Control Register
+ */
+ async command void setUtctl(msp430_utctl_t control);
+
+ /**
+ * Reads the UxTCTL Transmit Control Register
+ */
+ async command msp430_utctl_t getUtctl();
+
+ /**
+ * Sets the UxRCTL Receive Control Register
+ */
+ async command void setUrctl(msp430_urctl_t control);
+
+ /**
+ * Reads the UxRCTL Receive Control Register
+ */
+ async command msp430_urctl_t getUrctl();
! /**
! * Sets the UxBR0 and UxBR1 Baud Rate Control Registers
! */
! async command void setUbr(uint16_t ubr);
!
! /**
! * Reads the UxBR0 and UxBR1 Baud Rate Control Registers
! */
! async command uint16_t getUbr();
!
! /**
! * Sets the UxMCTL Modulation Control Register
! */
! async command void setUmctl(uint8_t umctl);
!
! /**
! * Reads the UxMCTL Modulation Control Register
! */
! async command uint8_t getUmctl();
!
! async command void resetUsart(bool reset);
!
/**
* Returns an enum value corresponding to the current mode of the
***************
*** 119,133 ****
*/
async command msp430_usartmode_t getMode();
!
/**
* Returns TRUE if the USART has Uart TX mode enabled
*/
async command bool isUartTx();
!
/**
* Returns TRUE if the USART has Uart RX mode enabled
*/
async command bool isUartRx();
!
/**
* Returns TRUE if the USART is set to Uart mode (both RX and TX)
--- 102,116 ----
*/
async command msp430_usartmode_t getMode();
!
/**
* Returns TRUE if the USART has Uart TX mode enabled
*/
async command bool isUartTx();
!
/**
* Returns TRUE if the USART has Uart RX mode enabled
*/
async command bool isUartRx();
!
/**
* Returns TRUE if the USART is set to Uart mode (both RX and TX)
***************
*** 135,228 ****
async command bool isUart();
! /**
* Enables both the Rx and the Tx Uart modules.
*/
async command void enableUart();
!
! /**
* Disables both the Rx and the Tx Uart modules.
*/
async command void disableUart();
!
! /**
* Enables the Uart TX functionality of the USART module.
*/
async command void enableUartTx();
!
! /**
* Disables the Uart TX module.
*/
async command void disableUartTx();
! /**
* Enables the Uart RX functionality of the USART module.
*/
async command void enableUartRx();
!
! /**
* Disables the Uart RX module.
*/
async command void disableUartRx();
!
! /**
* Enables the USART when in Spi mode.
*/
async command void enableSpi();
!
! /**
* Disables the USART when in Spi mode.
*/
async command void disableSpi();
!
! /**
! * Enables the I2C module (register flags)
! */
! async command void enableI2C();
!
! /**
! * Disables the I2C module
! */
! async command void disableI2C();
!
/**
* Returns TRUE if the USART is set to Spi mode
*/
async command bool isSpi();
!
! /**
* Switches USART to Spi mode.
*/
async command void setModeSpi(msp430_spi_config_t* config);
!
! /**
* Switches USART to Uart TX mode (RX pins disabled).
* Interrupts disabled by default.
*/
async command void setModeUartTx(msp430_uart_config_t* config);
!
! /**
* Switches USART to Uart RX mode (TX pins disabled)..
* Interrupts disabled by default.
*/
async command void setModeUartRx(msp430_uart_config_t* config);
!
! /**
* Switches USART to Uart mode (RX and TX enabled)
* Interrupts disabled by default.
*/
async command void setModeUart(msp430_uart_config_t* config);
!
! /**
! * Returns TRUE if the module is set to I2C mode for MSP430 parts
! * that support hardware I2C.
! */
! async command bool isI2C();
!
! /**
! * Switches USART to I2C mode for MSP430 parts that support hardware
! * I2C. Interrupts disabled by default.
! */
! async command void setModeI2C(msp430_i2c_config_t* config);
!
/* Dis/enabling of UTXIFG / URXIFG */
async command void disableRxIntr();
--- 118,189 ----
async command bool isUart();
! /**
* Enables both the Rx and the Tx Uart modules.
*/
async command void enableUart();
!
! /**
* Disables both the Rx and the Tx Uart modules.
*/
async command void disableUart();
!
! /**
* Enables the Uart TX functionality of the USART module.
*/
async command void enableUartTx();
!
! /**
* Disables the Uart TX module.
*/
async command void disableUartTx();
! /**
* Enables the Uart RX functionality of the USART module.
*/
async command void enableUartRx();
!
! /**
* Disables the Uart RX module.
*/
async command void disableUartRx();
!
! /**
* Enables the USART when in Spi mode.
*/
async command void enableSpi();
!
! /**
* Disables the USART when in Spi mode.
*/
async command void disableSpi();
!
/**
* Returns TRUE if the USART is set to Spi mode
*/
async command bool isSpi();
!
! /**
* Switches USART to Spi mode.
*/
async command void setModeSpi(msp430_spi_config_t* config);
!
! /**
* Switches USART to Uart TX mode (RX pins disabled).
* Interrupts disabled by default.
*/
async command void setModeUartTx(msp430_uart_config_t* config);
!
! /**
* Switches USART to Uart RX mode (TX pins disabled)..
* Interrupts disabled by default.
*/
async command void setModeUartRx(msp430_uart_config_t* config);
!
! /**
* Switches USART to Uart mode (RX and TX enabled)
* Interrupts disabled by default.
*/
async command void setModeUart(msp430_uart_config_t* config);
!
/* Dis/enabling of UTXIFG / URXIFG */
async command void disableRxIntr();
***************
*** 232,251 ****
async command void enableTxIntr();
async command void enableIntr();
!
/**
* TRUE if TX interrupt pending, flag must be cleared explicitly
*/
async command bool isTxIntrPending();
!
/**
* TRUE if RX interrupt pending, flag must be cleared explicitly
*/
async command bool isRxIntrPending();
!
/**
* Clears RX interrupt pending flag
! */
async command void clrRxIntr();
!
/**
* Clears TX interrupt pending flag
--- 193,212 ----
async command void enableTxIntr();
async command void enableIntr();
!
/**
* TRUE if TX interrupt pending, flag must be cleared explicitly
*/
async command bool isTxIntrPending();
!
/**
* TRUE if RX interrupt pending, flag must be cleared explicitly
*/
async command bool isRxIntrPending();
!
/**
* Clears RX interrupt pending flag
! */
async command void clrRxIntr();
!
/**
* Clears TX interrupt pending flag
***************
*** 263,268 ****
*/
async command bool isTxEmpty();
!
! /**
* Transmit a byte of data. When the transmission is completed,
* <code>txDone</done> is generated. Only then a new byte may be
--- 224,229 ----
*/
async command bool isTxEmpty();
!
! /**
* Transmit a byte of data. When the transmission is completed,
* <code>txDone</done> is generated. Only then a new byte may be
***************
*** 274,278 ****
*/
async command void tx(uint8_t data);
!
/**
* Get current value from RX-buffer.
--- 235,239 ----
*/
async command void tx(uint8_t data);
!
/**
* Get current value from RX-buffer.
***************
*** 283,285 ****
}
-
--- 244,245 ----
Index: HplMsp430Usart0C.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/msp430/usart/HplMsp430Usart0C.nc,v
retrieving revision 1.1.2.9
retrieving revision 1.1.2.10
diff -C2 -d -r1.1.2.9 -r1.1.2.10
*** HplMsp430Usart0C.nc 3 Aug 2006 18:10:41 -0000 1.1.2.9
--- HplMsp430Usart0C.nc 30 Aug 2006 17:15:55 -0000 1.1.2.10
***************
*** 69,72 ****
--- 69,73 ----
provides interface HplMsp430Usart;
provides interface HplMsp430UsartInterrupts;
+ provides interface HplMsp430I2C;
provides interface HplMsp430I2CInterrupts;
***************
*** 76,81 ****
components HplMsp430Usart0P as HplUsartP;
- components HplMsp430GeneralIOC as GIO;
-
AsyncStdControl = HplUsartP;
HplMsp430Usart = HplUsartP;
--- 77,80 ----
***************
*** 83,86 ****
--- 82,91 ----
HplMsp430I2CInterrupts = HplUsartP;
+ components HplMsp430I2C0P as HplI2CP;
+ HplMsp430I2C = HplI2CP;
+ HplUsartP.HplI2C -> HplI2CP;
+ HplI2CP.HplUsart -> HplUsartP;
+
+ components HplMsp430GeneralIOC as GIO;
HplUsartP.SIMO -> GIO.SIMO0;
HplUsartP.SOMI -> GIO.SOMI0;
***************
*** 89,91 ****
--- 94,99 ----
HplUsartP.UTXD -> GIO.UTXD0;
+ HplI2CP.SIMO -> GIO.SIMO0;
+ HplI2CP.UCLK -> GIO.UCLK0;
+
}
Index: HplMsp430Usart0P.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/msp430/usart/HplMsp430Usart0P.nc,v
retrieving revision 1.1.2.9
retrieving revision 1.1.2.10
diff -C2 -d -r1.1.2.9 -r1.1.2.10
*** HplMsp430Usart0P.nc 3 Aug 2006 18:10:41 -0000 1.1.2.9
--- HplMsp430Usart0P.nc 30 Aug 2006 17:15:55 -0000 1.1.2.10
***************
*** 75,81 ****
provides interface HplMsp430Usart as Usart;
provides interface HplMsp430UsartInterrupts as Interrupts;
! provides interface HplMsp430I2CInterrupts as I2CInterrupts;
!
!
uses interface HplMsp430GeneralIO as SIMO;
uses interface HplMsp430GeneralIO as SOMI;
--- 75,81 ----
provides interface HplMsp430Usart as Usart;
provides interface HplMsp430UsartInterrupts as Interrupts;
! provides interface HplMsp430I2CInterrupts as I2CInterrupts;
!
! uses interface HplMsp430I2C as HplI2C;
uses interface HplMsp430GeneralIO as SIMO;
uses interface HplMsp430GeneralIO as SOMI;
***************
*** 83,87 ****
uses interface HplMsp430GeneralIO as URXD;
uses interface HplMsp430GeneralIO as UTXD;
-
}
--- 83,86 ----
***************
*** 94,112 ****
MSP430REG_NORACE(U0RCTL);
MSP430REG_NORACE(U0TXBUF);
!
!
!
TOSH_SIGNAL(UART0RX_VECTOR) {
uint8_t temp = U0RXBUF;
signal Interrupts.rxDone(temp);
}
!
TOSH_SIGNAL(UART0TX_VECTOR) {
! if ( call Usart.isI2C() )
signal I2CInterrupts.fired();
else
signal Interrupts.txDone();
}
!
async command error_t AsyncStdControl.start() {
return SUCCESS;
--- 93,109 ----
MSP430REG_NORACE(U0RCTL);
MSP430REG_NORACE(U0TXBUF);
!
TOSH_SIGNAL(UART0RX_VECTOR) {
uint8_t temp = U0RXBUF;
signal Interrupts.rxDone(temp);
}
!
TOSH_SIGNAL(UART0TX_VECTOR) {
! if ( call HplI2C.isI2C() )
signal I2CInterrupts.fired();
else
signal Interrupts.txDone();
}
!
async command error_t AsyncStdControl.start() {
return SUCCESS;
***************
*** 115,119 ****
async command error_t AsyncStdControl.stop() {
call Usart.disableSpi();
! call Usart.disableI2C();
call Usart.disableUart();
return SUCCESS;
--- 112,116 ----
async command error_t AsyncStdControl.stop() {
call Usart.disableSpi();
! call HplI2C.clearModeI2C();
call Usart.disableUart();
return SUCCESS;
***************
*** 195,208 ****
}
- async command bool Usart.isI2C() {
- #ifndef __msp430_have_usart0_with_i2c
- return FALSE;
- #else
- atomic {
- return ((U0CTL & I2C) && (U0CTL & SYNC) && (U0CTL & I2CEN));
- }
- #endif
- }
-
async command msp430_usartmode_t Usart.getMode() {
if (call Usart.isUart())
--- 192,195 ----
***************
*** 214,218 ****
else if (call Usart.isSpi())
return USART_SPI;
! else if (call Usart.isI2C())
return USART_I2C;
else
--- 201,205 ----
else if (call Usart.isSpi())
return USART_SPI;
! else if (call HplI2C.isI2C())
return USART_I2C;
else
***************
*** 277,297 ****
}
- async command void Usart.enableI2C() {
- #ifndef __msp430_have_usart0_with_i2c
- return;
- #else
- atomic U0CTL |= I2C | I2CEN | SYNC;
- #endif
- }
-
- async command void Usart.disableI2C() {
- #ifndef __msp430_have_usart0_with_i2c
- return;
- #else
- atomic U0CTL &= ~(I2C | I2CEN | SYNC);
- #endif
- }
-
-
void configSpi(msp430_spi_config_t* config) {
msp430_uctl_t uctl = call Usart.getUctl();
--- 264,267 ----
***************
*** 317,321 ****
async command void Usart.setModeSpi(msp430_spi_config_t* config) {
call Usart.disableUart();
! call Usart.disableI2C();
atomic {
call Usart.resetUsart(TRUE);
--- 287,291 ----
async command void Usart.setModeSpi(msp430_spi_config_t* config) {
call Usart.disableUart();
! call HplI2C.clearModeI2C();
atomic {
call Usart.resetUsart(TRUE);
***************
*** 360,364 ****
call Usart.disableSpi();
! call Usart.disableI2C();
call Usart.disableUart();
--- 330,334 ----
call Usart.disableSpi();
! call HplI2C.clearModeI2C();
call Usart.disableUart();
***************
*** 380,384 ****
call Usart.disableSpi();
! call Usart.disableI2C();
call Usart.disableUart();
--- 350,354 ----
call Usart.disableSpi();
! call HplI2C.clearModeI2C();
call Usart.disableUart();
***************
*** 400,404 ****
call Usart.disableSpi();
! call Usart.disableI2C();
call Usart.disableUart();
--- 370,374 ----
call Usart.disableSpi();
! call HplI2C.clearModeI2C();
call Usart.disableUart();
***************
*** 417,460 ****
}
-
- // i2c enable bit is not set by default
- async command void Usart.setModeI2C(msp430_i2c_config_t* config) {
- #ifndef __msp430_have_usart0_with_i2c
- return;
- #else
- if (call Usart.getMode() == USART_I2C)
- return;
-
- call Usart.disableUart();
- call Usart.disableSpi();
-
- atomic {
- call SIMO.makeInput();
- call UCLK.makeInput();
- call SIMO.selectModuleFunc();
- call UCLK.selectModuleFunc();
-
- IE1 &= ~(UTXIE0 | URXIE0); // interrupt disable
-
- U0CTL = SWRST;
- U0CTL |= SYNC | I2C; // 7-bit addr, I2C-mode, USART as master
- U0CTL &= ~I2CEN;
-
- U0CTL |= MST;
-
- I2CTCTL = I2CSSEL_2; // use 1MHz SMCLK as the I2C reference
-
- I2CPSC = 0x00; // I2C CLK runs at 1MHz/10 = 100kHz
- I2CSCLH = 0x03;
- I2CSCLL = 0x03;
-
- I2CIE = 0; // clear all I2C interrupt enables
- I2CIFG = 0; // clear all I2C interrupt flags
- }
- return;
- #endif
- }
-
-
async command bool Usart.isTxIntrPending(){
if (IFG1 & UTXIFG0){
--- 387,390 ----
***************
*** 534,537 ****
}
! default async event void I2CInterrupts.fired() {}
}
--- 464,468 ----
}
! default async event void I2CInterrupts.fired() {}
!
}
Index: Msp430I2C0P.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/msp430/usart/Attic/Msp430I2C0P.nc,v
retrieving revision 1.1.2.2
retrieving revision 1.1.2.3
diff -C2 -d -r1.1.2.2 -r1.1.2.3
*** Msp430I2C0P.nc 3 Aug 2006 18:10:41 -0000 1.1.2.2
--- Msp430I2C0P.nc 30 Aug 2006 17:15:55 -0000 1.1.2.3
***************
*** 38,46 ****
provides interface Resource[ uint8_t id ];
! provides interface ResourceConfigure[uint8_t id ];
provides interface I2CPacket<TI2CBasicAddr> as I2CBasicAddr;
uses interface Resource as UsartResource[ uint8_t id ];
! uses interface Msp430I2CConfigure[ uint8_t id ];
uses interface HplMsp430I2CInterrupts as I2CInterrupts;
--- 38,46 ----
provides interface Resource[ uint8_t id ];
! provides interface ResourceConfigure[uint8_t id ];
provides interface I2CPacket<TI2CBasicAddr> as I2CBasicAddr;
uses interface Resource as UsartResource[ uint8_t id ];
! uses interface Msp430I2CConfigure[ uint8_t id ];
uses interface HplMsp430I2CInterrupts as I2CInterrupts;
***************
*** 51,56 ****
components Msp430I2CP as I2CP;
Resource = I2CP.Resource;
! ResourceConfigure = I2CP.ResourceConfigure;
! Msp430SpiConfigure = I2CP.Msp430SpiConfigure;
I2CBasicAddr = I2CP.I2CBasicAddr;
UsartResource = I2CP.UsartResource;
--- 51,56 ----
components Msp430I2CP as I2CP;
Resource = I2CP.Resource;
! ResourceConfigure = I2CP.ResourceConfigure;
! Msp430I2CConfigure = I2CP.Msp430I2CConfigure;
I2CBasicAddr = I2CP.I2CBasicAddr;
UsartResource = I2CP.UsartResource;
***************
*** 58,62 ****
components HplMsp430Usart0C as UsartC;
! I2CP.Usart -> UsartC;
components LedsC as Leds;
--- 58,62 ----
components HplMsp430Usart0C as UsartC;
! I2CP.HplI2C -> UsartC;
components LedsC as Leds;
Index: Msp430I2CC.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/msp430/usart/Attic/Msp430I2CC.nc,v
retrieving revision 1.1.2.2
retrieving revision 1.1.2.3
diff -C2 -d -r1.1.2.2 -r1.1.2.3
*** Msp430I2CC.nc 3 Aug 2006 18:10:41 -0000 1.1.2.2
--- Msp430I2CC.nc 30 Aug 2006 17:15:55 -0000 1.1.2.3
***************
*** 43,47 ****
provides interface I2CPacket<TI2CBasicAddr> as I2CBasicAddr;
! uses interface Msp430I2CConfigure;
}
--- 43,48 ----
provides interface I2CPacket<TI2CBasicAddr> as I2CBasicAddr;
! uses interface Msp430I2CConfigure;
!
}
***************
*** 49,53 ****
enum {
! CLIENT_ID = unique( MSP430_SPIO_BUS ),
};
--- 50,54 ----
enum {
! CLIENT_ID = unique( MSP430_I2CO_BUS ),
};
***************
*** 55,62 ****
Resource = I2CP.Resource[ CLIENT_ID ];
I2CBasicAddr = I2CP.I2CBasicAddr;
! Msp430I2CConfigure = I2CP.Msp430I2CConfigure[ CLIENT_ID ];
components new Msp430Usart0C() as UsartC;
! I2CP.ResourceConfigure[ CLIENT_ID ] <- UsartC.ResourceConfigure;
I2CP.UsartResource[ CLIENT_ID ] -> UsartC.Resource;
I2CP.I2CInterrupts -> UsartC.HplMsp430I2CInterrupts;
--- 56,63 ----
Resource = I2CP.Resource[ CLIENT_ID ];
I2CBasicAddr = I2CP.I2CBasicAddr;
! Msp430I2CConfigure = I2CP.Msp430I2CConfigure[ CLIENT_ID ];
components new Msp430Usart0C() as UsartC;
! I2CP.ResourceConfigure[ CLIENT_ID ] <- UsartC.ResourceConfigure;
I2CP.UsartResource[ CLIENT_ID ] -> UsartC.Resource;
I2CP.I2CInterrupts -> UsartC.HplMsp430I2CInterrupts;
Index: Msp430I2CP.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/msp430/usart/Attic/Msp430I2CP.nc,v
retrieving revision 1.1.2.3
retrieving revision 1.1.2.4
diff -C2 -d -r1.1.2.3 -r1.1.2.4
*** Msp430I2CP.nc 15 Aug 2006 11:59:08 -0000 1.1.2.3
--- Msp430I2CP.nc 30 Aug 2006 17:15:55 -0000 1.1.2.4
***************
*** 40,49 ****
provides interface Resource[ uint8_t id ];
! provides interface ResourceConfigure[ uint8_t id ];
provides interface I2CPacket<TI2CBasicAddr> as I2CBasicAddr;
uses interface Resource as UsartResource[ uint8_t id ];
! uses interface Msp430I2CConfigure[ uint8_t id ];
! uses interface HplMsp430Usart as Usart;
uses interface HplMsp430I2CInterrupts as I2CInterrupts;
uses interface Leds;
--- 40,49 ----
provides interface Resource[ uint8_t id ];
! provides interface ResourceConfigure[ uint8_t id ];
provides interface I2CPacket<TI2CBasicAddr> as I2CBasicAddr;
uses interface Resource as UsartResource[ uint8_t id ];
! uses interface Msp430I2CConfigure[ uint8_t id ];
! uses interface HplMsp430I2C as HplI2C;
uses interface HplMsp430I2CInterrupts as I2CInterrupts;
uses interface Leds;
***************
*** 74,81 ****
async command error_t Resource.immediateRequest[ uint8_t id ]() {
! error_t error = call UsartResource.immediateRequest[ id ]();
! if ( error == SUCCESS )
! call Usart.setModeI2C();
! return error;
}
--- 74,78 ----
async command error_t Resource.immediateRequest[ uint8_t id ]() {
! return call UsartResource.immediateRequest[ id ]();
}
***************
*** 83,87 ****
return call UsartResource.request[ id ]();
}
!
async command uint8_t Resource.isOwner[ uint8_t id ]() {
return call UsartResource.isOwner[ id ]();
--- 80,84 ----
return call UsartResource.request[ id ]();
}
!
async command uint8_t Resource.isOwner[ uint8_t id ]() {
return call UsartResource.isOwner[ id ]();
***************
*** 92,104 ****
}
! async command void ResourceConfigure.configure[ uint8_t id ]() {
! call Usart.setModeI2C(call Msp430I2CConfigure.getConfig[id]());
! }
!
! async command void ResourceConfigure.unconfigure[ uint8_t id ]() {
! }
!
event void UsartResource.granted[ uint8_t id ]() {
- call Usart.setModeI2C();
signal Resource.granted[ id ]();
}
--- 89,100 ----
}
! async command void ResourceConfigure.configure[ uint8_t id ]() {
! call HplI2C.setModeI2C(call Msp430I2CConfigure.getConfig[id]());
! }
!
! async command void ResourceConfigure.unconfigure[ uint8_t id ]() {
! }
!
event void UsartResource.granted[ uint8_t id ]() {
signal Resource.granted[ id ]();
}
***************
*** 106,114 ****
default async command error_t UsartResource.request[ uint8_t id ]() { return FAIL; }
default async command error_t UsartResource.immediateRequest[ uint8_t id ]() { return FAIL; }
! default async command error_t UsartResource.release[ uint8_t id ]() {return FAIL;}
default event void Resource.granted[ uint8_t id ]() {}
! default async command msp430_i2c_config_t* Msp430SpiConfigure.getConfig[uint8_t id]() {
! return &msp430_i2c_default_config;
! }
async command error_t I2CBasicAddr.read( i2c_flags_t flags,
--- 102,110 ----
default async command error_t UsartResource.request[ uint8_t id ]() { return FAIL; }
default async command error_t UsartResource.immediateRequest[ uint8_t id ]() { return FAIL; }
! default async command error_t UsartResource.release[ uint8_t id ]() {return FAIL;}
default event void Resource.granted[ uint8_t id ]() {}
! default async command msp430_i2c_config_t* Msp430I2CConfigure.getConfig[uint8_t id]() {
! return &msp430_i2c_default_config;
! }
async command error_t I2CBasicAddr.read( i2c_flags_t flags,
***************
*** 120,131 ****
m_flags = flags;
m_pos = 0;
! U0CTL |= MST;
! I2CTCTL &= ~I2CTRX;
!
! I2CSA = addr;
! I2CIE = RXRDYIE | ARDYIE | NACKIE;
if ( flags & I2C_START )
! I2CTCTL |= I2CSTT;
else
nextRead();
--- 116,129 ----
m_flags = flags;
m_pos = 0;
+
+ call HplI2C.setMasterMode();//U0CTL |= MST;
+ call HplI2C.setReceiveMode();//I2CTCTL &= ~I2CTRX;
! call HplI2C.setSlaveAddress( addr );//I2CSA = addr;
! call HplI2C.enableReceiveReady();//I2CIE = RXRDYIE | ARDYIE | NACKIE;
! call HplI2C.enableAccessReady();
! call HplI2C.enableNoAck();
if ( flags & I2C_START )
! call HplI2C.setStartBit();//I2CTCTL |= I2CSTT;
else
nextRead();
***************
*** 144,154 ****
m_pos = 0;
! U0CTL |= MST;
! I2CTCTL |= I2CTRX;
- I2CSA = addr;
- I2CIE = TXRDYIE | ARDYIE | NACKIE;
if ( flags & I2C_START )
! I2CTCTL |= I2CSTT;
else
nextWrite();
--- 142,155 ----
m_pos = 0;
! call HplI2C.setMasterMode();//U0CTL |= MST;
! call HplI2C.setTransmitMode();//I2CTCTL |= I2CTRX;
!
! call HplI2C.setSlaveAddress( addr );//I2CSA = addr;
! call HplI2C.enableTransmitReady();//I2CIE = TXRDYIE | ARDYIE | NACKIE;
! call HplI2C.enableAccessReady();
! call HplI2C.enableNoAck();
if ( flags & I2C_START )
! call HplI2C.setStartBit();//I2CTCTL |= I2CSTT;
else
nextWrite();
***************
*** 162,170 ****
int i = 0;
switch( I2CIV ) {
case 0x04:
if ( I2CDCTL & I2CBB )
! I2CTCTL |= I2CSTP;
while( I2CDCTL & I2CBUSY );
signalDone( FAIL );
--- 163,172 ----
int i = 0;
+ TOSH_CLR_GREEN_LED_PIN();
switch( I2CIV ) {
case 0x04:
if ( I2CDCTL & I2CBB )
! call HplI2C.setStopBit();//I2CTCTL |= I2CSTP;
while( I2CDCTL & I2CBUSY );
signalDone( FAIL );
***************
*** 200,204 ****
if ( m_pos == m_len ) {
if ( m_flags & I2C_STOP )
! I2CTCTL |= I2CSTP;
else
signalDone( SUCCESS );
--- 202,206 ----
if ( m_pos == m_len ) {
if ( m_flags & I2C_STOP )
! call HplI2C.setStopBit();//I2CTCTL |= I2CSTP;
else
signalDone( SUCCESS );
***************
*** 208,212 ****
void nextWrite() {
if ( ( m_pos == m_len - 1 ) && ( m_flags & I2C_STOP ) ) {
! I2CTCTL |= I2CSTP;
}
else if ( m_pos == m_len ) {
--- 210,214 ----
void nextWrite() {
if ( ( m_pos == m_len - 1 ) && ( m_flags & I2C_STOP ) ) {
! call HplI2C.setStopBit();//I2CTCTL |= I2CSTP;
}
else if ( m_pos == m_len ) {
***************
*** 214,218 ****
return;
}
! I2CDR = m_buf[ m_pos++ ];
}
--- 216,220 ----
return;
}
! call HplI2C.setData( m_buf[ m_pos++ ] );//I2CDR = m_buf[ m_pos++ ];
}
Index: Msp430Usart0C.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/msp430/usart/Msp430Usart0C.nc,v
retrieving revision 1.1.2.6
retrieving revision 1.1.2.7
diff -C2 -d -r1.1.2.6 -r1.1.2.7
*** Msp430Usart0C.nc 3 Aug 2006 18:10:41 -0000 1.1.2.6
--- Msp430Usart0C.nc 30 Aug 2006 17:15:55 -0000 1.1.2.7
***************
*** 43,48 ****
provides interface HplMsp430Usart;
provides interface HplMsp430UsartInterrupts;
!
uses interface ResourceConfigure;
}
--- 43,50 ----
provides interface HplMsp430Usart;
provides interface HplMsp430UsartInterrupts;
! provides interface HplMsp430I2CInterrupts;
!
uses interface ResourceConfigure;
+
}
***************
*** 59,63 ****
ArbiterInfo = UsartShareP.ArbiterInfo;
HplMsp430UsartInterrupts = UsartShareP.Interrupts[ CLIENT_ID ];
!
components HplMsp430Usart0C as UsartC;
HplMsp430Usart = UsartC;
--- 61,66 ----
ArbiterInfo = UsartShareP.ArbiterInfo;
HplMsp430UsartInterrupts = UsartShareP.Interrupts[ CLIENT_ID ];
! HplMsp430I2CInterrupts = UsartShareP.I2CInterrupts[ CLIENT_ID ];
!
components HplMsp430Usart0C as UsartC;
HplMsp430Usart = UsartC;
Index: Msp430UsartShare0P.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/msp430/usart/Msp430UsartShare0P.nc,v
retrieving revision 1.1.2.7
retrieving revision 1.1.2.8
diff -C2 -d -r1.1.2.7 -r1.1.2.8
*** Msp430UsartShare0P.nc 15 Aug 2006 11:59:08 -0000 1.1.2.7
--- Msp430UsartShare0P.nc 30 Aug 2006 17:15:55 -0000 1.1.2.8
***************
*** 38,42 ****
provides interface HplMsp430UsartInterrupts as Interrupts[ uint8_t id ];
! provides interface HplMsp430I2CInterrupts as I2CInterrupts[ uint8_t id ];
provides interface Resource[ uint8_t id ];
provides interface ArbiterInfo;
--- 38,42 ----
provides interface HplMsp430UsartInterrupts as Interrupts[ uint8_t id ];
! provides interface HplMsp430I2CInterrupts as I2CInterrupts[ uint8_t id ];
provides interface Resource[ uint8_t id ];
provides interface ArbiterInfo;
***************
*** 49,54 ****
components new Msp430UsartShareP() as UsartShareP;
Interrupts = UsartShareP;
! I2CInterrupts = UsartShareP;
UsartShareP.RawInterrupts -> UsartC;
components new FcfsArbiterC( MSP430_HPLUSART0_RESOURCE ) as ArbiterC;
--- 49,55 ----
components new Msp430UsartShareP() as UsartShareP;
Interrupts = UsartShareP;
! I2CInterrupts = UsartShareP;
UsartShareP.RawInterrupts -> UsartC;
+ UsartShareP.RawI2CInterrupts -> UsartC;
components new FcfsArbiterC( MSP430_HPLUSART0_RESOURCE ) as ArbiterC;
Index: msp430usart.h
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/msp430/usart/msp430usart.h,v
retrieving revision 1.1.2.2
retrieving revision 1.1.2.3
diff -C2 -d -r1.1.2.2 -r1.1.2.3
*** msp430usart.h 3 Aug 2006 18:10:41 -0000 1.1.2.2
--- msp430usart.h 30 Aug 2006 17:15:55 -0000 1.1.2.3
***************
*** 89,101 ****
DEFINE_UNION_CAST(uctl2int,uint8_t,msp430_uctl_t)
! DEFINE_UNION_CAST(int2uctl,msp430_uctl_t,uint8_t)
! DEFINE_UNION_CAST(utctl2int,uint8_t,msp430_utctl_t)
! DEFINE_UNION_CAST(int2utctl,msp430_utctl_t,uint8_t)
! DEFINE_UNION_CAST(urctl2int,uint8_t,msp430_urctl_t)
! DEFINE_UNION_CAST(int2urctl,msp430_urctl_t,uint8_t)
! typedef struct {
unsigned int ubr: 16; //Clock division factor (>=0x0002)
unsigned int ssel: 2; //Clock source (00=external UCLK [slave]; 01=ACLK [master]; 10=SMCLK [master]; 11=SMCLK [master])
--- 89,101 ----
DEFINE_UNION_CAST(uctl2int,uint8_t,msp430_uctl_t)
! DEFINE_UNION_CAST(int2uctl,msp430_uctl_t,uint8_t)
! DEFINE_UNION_CAST(utctl2int,uint8_t,msp430_utctl_t)
! DEFINE_UNION_CAST(int2utctl,msp430_utctl_t,uint8_t)
! DEFINE_UNION_CAST(urctl2int,uint8_t,msp430_urctl_t)
! DEFINE_UNION_CAST(int2urctl,msp430_urctl_t,uint8_t)
! typedef struct {
unsigned int ubr: 16; //Clock division factor (>=0x0002)
unsigned int ssel: 2; //Clock source (00=external UCLK [slave]; 01=ACLK [master]; 10=SMCLK [master]; 11=SMCLK [master])
***************
*** 107,186 ****
unsigned int stc: 1; //Slave transmit (0=4-pin SPI && STE enabled; 1=3-pin SPI && STE disabled)
unsigned int :0;
! } msp430_spi_config_t;
! msp430_spi_config_t msp430_spi_default_config = {ubr: 0x0002, ssel: 0x02, clen: 1, listen: 0, mm: 1, ckph: 1, ckpl: 0, stc:1};
! typedef struct {
! unsigned int ubr:16; //Baud rate (use enum msp430_uart_rate_t for predefined rates)
! unsigned int umctl: 8; //Modulation (use enum msp430_uart_rate_t for predefined rates)
! unsigned int ssel: 2; //Clock source (00=UCLKI; 01=ACLK; 10=SMCLK; 11=SMCLK)
! unsigned int pena: 1; //Parity enable (0=disabled; 1=enabled)
! unsigned int pev: 1; //Parity select (0=odd; 1=even)
! unsigned int spb: 1; //Stop bits (0=one stop bit; 1=two stop bits)
! unsigned int clen: 1; //Character length (0=7-bit data; 1=8-bit data)
! unsigned int listen: 1; //Listen enable (0=disabled; 1=enabled, feed tx back to receiver)
! unsigned int mm: 1; //Multiprocessor mode (0=idle-line protocol; 1=address-bit protocol)
! unsigned int :0;
! unsigned int ckpl: 1; //Clock polarity (0=normal; 1=inverted)
! unsigned int urxse: 1; //Receive start-edge detection (0=disabled; 1=enabled)
! unsigned int urxeie: 1; //Erroneous-character receive (0=rejected; 1=recieved and URXIFGx set)
! unsigned int urxwie: 1; //Wake-up interrupt-enable (0=all characters set URXIFGx; 1=only address sets URXIFGx)
! } msp430_uart_config_t;
! typedef enum {
/**
! The calculations were performed using the msp-uart.pl script:
! # msp-uart.pl -- calculates the uart registers for MSP430
! #
! # Copyright (C) 2002 - Pedro Zorzenon Neto - pzn dot debian dot org
! **/
!
//32KHZ = 32,768 Hz, 1MHZ = 1,048,576 Hz
! UBR_32KHZ_1200=0x001B, UMCTL_32KHZ_1200=0x94,
! UBR_32KHZ_1800=0x0012, UMCTL_32KHZ_1800=0x84,
! UBR_32KHZ_2400=0x000D, UMCTL_32KHZ_2400=0x6D,
! UBR_32KHZ_4800=0x0006, UMCTL_32KHZ_4800=0x77,
! UBR_32KHZ_9600=0x0003, UMCTL_32KHZ_9600=0x29, // (Warning: triggers MSP430 errata US14)
!
! UBR_1MHZ_1200=0x0369, UMCTL_1MHZ_1200=0x7B,
! UBR_1MHZ_1800=0x0246, UMCTL_1MHZ_1800=0x55,
! UBR_1MHZ_2400=0x01B4, UMCTL_1MHZ_2400=0xDF,
! UBR_1MHZ_4800=0x00DA, UMCTL_1MHZ_4800=0xAA,
! UBR_1MHZ_9600=0x006D, UMCTL_1MHZ_9600=0x44,
! UBR_1MHZ_19200=0x0036, UMCTL_1MHZ_19200=0xB5,
! UBR_1MHZ_38400=0x001B, UMCTL_1MHZ_38400=0x94,
! UBR_1MHZ_57600=0x0012, UMCTL_1MHZ_57600=0x84,
! UBR_1MHZ_76800=0x000D, UMCTL_1MHZ_76800=0x6D,
! UBR_1MHZ_115200=0x0009, UMCTL_1MHZ_115200=0x10,
! UBR_1MHZ_230400=0x0004, UMCTL_1MHZ_230400=0x55,
! } msp430_uart_rate_t;
!
! msp430_uart_config_t msp430_uart_default_config = {ubr: UBR_1MHZ_57600, umctl: UMCTL_1MHZ_57600, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0};
!
!
! typedef struct {
! unsigned int rxdmaen: 1; //RX to DMA (0=disabled; 1=enabled)
! unsigned int txdmaen: 1; //DMA to TX (0=disabled; 1=enabled)
! unsigned int xa: 1; //Extended addressing (0=7-bit addressing; 1=8-bit addressing)
! unsigned int listen: 1; //Listen enable (0=disabled; 1=enabled, feed tx back to receiver)
! //unsigned int mst: 1; //Master mode (0=slave; 1=master)
! unsigned int i2cword: 1; //Word mode (0=byte mode; 1=word mode)
! unsigned int i2crm: 1; //Repeat mode (0=use I2CNDAT; 1=count in software)
! unsigned int i2cssel: 2; //Clock source (00=disabled; 01=ACLK; 10=SMCLK; 11=SMCLK)
! unsigned int i2cpsc: 8; //Clock prescaler (values >0x04 not recomended)
! unsigned int i2csclh: 8; //High period (high period=[value+2]*i2cpsc; can not be lower than 5*i2cpsc)
! unsigned int i2cscll: 8; //Low period (low period=[value+2]*i2cpsc; can not be lower than 5*i2cpsc)
! union {
! unsigned int i2coa7: 6; //Own address 7-bit addressing (right justified; bit-6 is MSB)
! unsigned int i2coa10:10; //Own address 10-bit addressing (right justified; bit-9 is MSB)
! } msp430_i2c_oa_t;
! } msp430_i2c_config_t;
!
!
!
!
--- 107,188 ----
unsigned int stc: 1; //Slave transmit (0=4-pin SPI && STE enabled; 1=3-pin SPI && STE disabled)
unsigned int :0;
! } msp430_spi_config_t;
! msp430_spi_config_t msp430_spi_default_config = {ubr: 0x0002, ssel: 0x02, clen: 1, listen: 0, mm: 1, ckph: 1, ckpl: 0, stc:1};
! typedef struct {
! unsigned int ubr:16; //Baud rate (use enum msp430_uart_rate_t for predefined rates)
! unsigned int umctl: 8; //Modulation (use enum msp430_uart_rate_t for predefined rates)
! unsigned int ssel: 2; //Clock source (00=UCLKI; 01=ACLK; 10=SMCLK; 11=SMCLK)
! unsigned int pena: 1; //Parity enable (0=disabled; 1=enabled)
! unsigned int pev: 1; //Parity select (0=odd; 1=even)
! unsigned int spb: 1; //Stop bits (0=one stop bit; 1=two stop bits)
! unsigned int clen: 1; //Character length (0=7-bit data; 1=8-bit data)
! unsigned int listen: 1; //Listen enable (0=disabled; 1=enabled, feed tx back to receiver)
! unsigned int mm: 1; //Multiprocessor mode (0=idle-line protocol; 1=address-bit protocol)
! unsigned int :0;
! unsigned int ckpl: 1; //Clock polarity (0=normal; 1=inverted)
! unsigned int urxse: 1; //Receive start-edge detection (0=disabled; 1=enabled)
! unsigned int urxeie: 1; //Erroneous-character receive (0=rejected; 1=recieved and URXIFGx set)
! unsigned int urxwie: 1; //Wake-up interrupt-enable (0=all characters set URXIFGx; 1=only address sets URXIFGx)
! } msp430_uart_config_t;
! typedef enum {
/**
! The calculations were performed using the msp-uart.pl script:
! # msp-uart.pl -- calculates the uart registers for MSP430
! #
! # Copyright (C) 2002 - Pedro Zorzenon Neto - pzn dot debian dot org
! **/
!
//32KHZ = 32,768 Hz, 1MHZ = 1,048,576 Hz
! UBR_32KHZ_1200=0x001B, UMCTL_32KHZ_1200=0x94,
! UBR_32KHZ_1800=0x0012, UMCTL_32KHZ_1800=0x84,
! UBR_32KHZ_2400=0x000D, UMCTL_32KHZ_2400=0x6D,
! UBR_32KHZ_4800=0x0006, UMCTL_32KHZ_4800=0x77,
! UBR_32KHZ_9600=0x0003, UMCTL_32KHZ_9600=0x29, // (Warning: triggers MSP430 errata US14)
!
! UBR_1MHZ_1200=0x0369, UMCTL_1MHZ_1200=0x7B,
! UBR_1MHZ_1800=0x0246, UMCTL_1MHZ_1800=0x55,
! UBR_1MHZ_2400=0x01B4, UMCTL_1MHZ_2400=0xDF,
! UBR_1MHZ_4800=0x00DA, UMCTL_1MHZ_4800=0xAA,
! UBR_1MHZ_9600=0x006D, UMCTL_1MHZ_9600=0x44,
! UBR_1MHZ_19200=0x0036, UMCTL_1MHZ_19200=0xB5,
! UBR_1MHZ_38400=0x001B, UMCTL_1MHZ_38400=0x94,
! UBR_1MHZ_57600=0x0012, UMCTL_1MHZ_57600=0x84,
! UBR_1MHZ_76800=0x000D, UMCTL_1MHZ_76800=0x6D,
! UBR_1MHZ_115200=0x0009, UMCTL_1MHZ_115200=0x10,
! UBR_1MHZ_230400=0x0004, UMCTL_1MHZ_230400=0x55,
! } msp430_uart_rate_t;
+ msp430_uart_config_t msp430_uart_default_config = {ubr: UBR_1MHZ_57600, umctl: UMCTL_1MHZ_57600, ssel: 0x02, pena: 0, pev: 0, spb: 0, clen: 1, listen: 0, mm: 0, ckpl: 0, urxse: 0, urxeie: 1, urxwie: 0};
+ typedef struct {
+ unsigned int rxdmaen: 1; // Receive DMA enable. 0 = disabled.
+ unsigned int txdmaen: 1; // Transmit DMA enable. 0 = disabled.
+ unsigned int xa: 1; // Extended addressing. 0 = 7-bit addressing.
+ unsigned int listen: 1; // Listen. 0 = disabled.
+ unsigned int i2cword : 1; // Word mode. 0 = byte mode.
+ unsigned int i2crm : 1; // Repeat mode. 0 = I2CNDAT.
+ unsigned int i2cssel : 2; // Clock source select. 0=None, 1=ACLK, 2=SMCLK
+ unsigned int i2cpsc : 8; // Clock prescaler.
+ unsigned int i2csclh : 8; // Shift clock high register.
+ unsigned int i2cscll : 8; // Shift clock low register.
+ unsigned int i2coa : 10; // Own address register.
+ } msp430_i2c_config_t;
+ msp430_i2c_config_t msp430_i2c_default_config = {
+ rxdmaen : 0,
+ txdmaen : 0,
+ xa : 0,
+ listen : 0,
+ i2cword : 0,
+ i2crm : 1,
+ i2cssel : 2,
+ i2cpsc : 0,
+ i2csclh : 3,
+ i2cscll : 3,
+ i2coa : 0,
+ };
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