[Tinyos-2-commits] CVS: tinyos-2.x/tos/chips/lis3l02dq
HalLIS3L02DQAdvanced.nc, NONE, 1.1.2.1 HalLIS3L02DQControlP.nc,
NONE, 1.1.2.1 HalLIS3L02DQReaderP.nc, NONE,
1.1.2.1 HplLIS3L02DQLogicSPIP.nc, 1.1.2.1, 1.1.2.2 LIS3L02DQ.h,
1.1.2.1, 1.1.2.2
Philip Buonadonna
philipb at users.sourceforge.net
Thu Jul 6 16:21:43 PDT 2006
- Previous message: [Tinyos-2-commits] CVS: tinyos-2.x/tos/chips/max136x
HalMAX136xAdvanced.nc, NONE, 1.1.2.1 HalMAX136xControlP.nc,
NONE, 1.1.2.1 HalMAX136xReaderP.nc, NONE,
1.1.2.1 HplMAX136x.nc, 1.1.2.1, 1.1.2.2 HplMAX136xLogicP.nc,
1.1.2.1, 1.1.2.2 MAX136x.h, 1.1.2.1, 1.1.2.2
- Next message: [Tinyos-2-commits] CVS: tinyos-2.x/tos/sensorboards/im2sb
LIS3L02DQC.nc, NONE, 1.1.2.1 LIS3L02DQInternalC.nc, NONE,
1.1.2.1 LIS3L02DQInternalP.nc, NONE, 1.1.2.1 MAX136xC.nc, NONE,
1.1.2.1 MAX136xInternalC.nc, NONE, 1.1.2.1 MAX136xInternalP.nc,
NONE, 1.1.2.1 TMP175C.nc, NONE, 1.1.2.1 TMP175InternalC.nc,
NONE, 1.1.2.1 TMP175InternalP.nc, NONE, 1.1.2.1 im2sb.h,
1.1.2.1, 1.1.2.2
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Update of /cvsroot/tinyos/tinyos-2.x/tos/chips/lis3l02dq
In directory sc8-pr-cvs10.sourceforge.net:/tmp/cvs-serv8345
Modified Files:
Tag: tinyos-2_0_devel-BRANCH
HplLIS3L02DQLogicSPIP.nc LIS3L02DQ.h
Added Files:
Tag: tinyos-2_0_devel-BRANCH
HalLIS3L02DQAdvanced.nc HalLIS3L02DQControlP.nc
HalLIS3L02DQReaderP.nc
Log Message:
Updated support for ST LIS3L02DQC accelerometer sensor chip
--- NEW FILE: HalLIS3L02DQAdvanced.nc ---
/* $Id: HalLIS3L02DQAdvanced.nc,v 1.1.2.1 2006/07/06 23:21:40 philipb Exp $ */
/*
* Copyright (c) 2005 Arch Rock Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* Neither the name of the Arch Rock Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
* ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
* DAMAGE.
*/
/**
*
*
* @author Kaisen Lin
* @author Phil Buonadonna
*/
#include "LIS3L02DQ.h"
interface HalLIS3L02DQAdvanced {
command error_t setDecimation(uint8_t factor);
event void setDecimationDone(error_t error);
command error_t enableAxis(bool bX, bool bY, bool bZ);
event void enableAxisDone(error_t error);
command error_t enableAlert(lis_alertflags_t xFlags,
lis_alertflags_t yFlags,
lis_alertflags_t zFlags,
bool requireAll);
event void enableAlertDone(error_t error);
command error_t getAlertSource();
event void getAlertSourceDone(error_t error, uint8_t vector);
command error_t setTLow(uint8_t val);
event void setTLowDone(error_t error);
command error_t setTHigh(uint8_t val);
event void setTHighDone(error_t error);
event void alertThreshold();
}
--- NEW FILE: HalLIS3L02DQControlP.nc ---
/* $Id: HalLIS3L02DQControlP.nc,v 1.1.2.1 2006/07/06 23:21:40 philipb Exp $ */
/*
* Copyright (c) 2005 Arch Rock Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* Neither the name of the Arch Rock Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
* ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
* DAMAGE.
*/
/**
*
*
* @author Kaisen Lin
* @author Phil Buonadonna
*/
#include "LIS3L02DQ.h"
module HalLIS3L02DQControlP {
provides interface HalLIS3L02DQAdvanced as Advanced;
uses interface Resource;
uses interface HplLIS3L02DQ as Hpl;
}
implementation {
enum {
S_IDLE,
S_DECIMATION,
S_ENAXIS,
S_TLOW,
S_THIGH,
};
uint8_t state = S_IDLE;
uint8_t ctrlReg1Shadow = 0x7;
error_t clientResult;
uint8_t clientRegAddr;
uint8_t clientVal;
task void signal_Task() {
switch(state) {
case S_DECIMATION:
state = S_IDLE;
call Resource.release();
signal Advanced.setDecimationDone(clientResult);
break;
case S_ENAXIS:
state = S_IDLE;
call Resource.release();
signal Advanced.enableAxisDone(clientResult);
break;
case S_TLOW:
state = S_IDLE;
call Resource.release();
signal Advanced.setTLowDone(clientResult);
break;
case S_THIGH:
state = S_IDLE;
call Resource.release();
signal Advanced.setTHighDone(clientResult);
break;
default:
break;
}
}
event void Resource.granted() {
// intentionally left blank
}
command error_t Advanced.setDecimation(uint8_t factor) {
error_t status;
if(state != S_IDLE)
return FAIL;
status = call Resource.immediateRequest();
if(status != SUCCESS)
return status;
state = S_DECIMATION;
ctrlReg1Shadow &= ~LIS3L01DQ_CTRL_REG1_DF(3);
ctrlReg1Shadow |= LIS3L01DQ_CTRL_REG1_DF(factor);
call Hpl.setReg(LIS3L02DQ_CTRL_REG1, ctrlReg1Shadow);
return SUCCESS;
}
command error_t Advanced.enableAxis(bool bX, bool bY, bool bZ) {
error_t status;
if(state != S_IDLE)
return FAIL;
status = call Resource.immediateRequest();
if(status != SUCCESS)
return status;
state = S_ENAXIS;
ctrlReg1Shadow &= ~LIS3L01DQ_CTRL_REG1_DF(7);
// if any of them on, power it on
if(bZ || bY || bX)
ctrlReg1Shadow |= LIS3L01DQ_CTRL_REG1_PD(1);
// enable all the relevant axes
if(bZ)
ctrlReg1Shadow |= LIS3L01DQ_CTRL_REG1_DF(LIS3L01DQ_CTRL_REG1_ZEN);
if(bY)
ctrlReg1Shadow |= LIS3L01DQ_CTRL_REG1_DF(LIS3L01DQ_CTRL_REG1_YEN);
if(bX)
ctrlReg1Shadow |= LIS3L01DQ_CTRL_REG1_DF(LIS3L01DQ_CTRL_REG1_XEN);
call Hpl.setReg(LIS3L02DQ_CTRL_REG1, ctrlReg1Shadow);
return SUCCESS;
}
command error_t Advanced.setTLow(uint8_t val) {
error_t status;
if(state != S_IDLE)
return FAIL;
status = call Resource.immediateRequest();
if(status != SUCCESS)
return status;
state = S_TLOW;
call Hpl.setReg(LIS3L02DQ_THS_L, val);
return SUCCESS;
}
command error_t Advanced.setTHigh(uint8_t val) {
error_t status;
if(state != S_IDLE)
return FAIL;
status = call Resource.immediateRequest();
if(status != SUCCESS)
return status;
state = S_THIGH;
call Hpl.setReg(LIS3L02DQ_THS_H, val);
return SUCCESS;
}
async event void Hpl.getRegDone(error_t error, uint8_t regAddr, uint8_t val) {}
async event void Hpl.alertThreshold() {}
async event void Hpl.setRegDone(error_t error, uint8_t regAddr, uint8_t val) {
clientResult = error;
clientRegAddr = regAddr;
clientVal = val;
post signal_Task();
}
command error_t Advanced.enableAlert(lis_alertflags_t xFlags,
lis_alertflags_t yFlags,
lis_alertflags_t zFlags,
bool requireAll) {
return FAIL;
}
command error_t Advanced.getAlertSource() { return FAIL; }
}
--- NEW FILE: HalLIS3L02DQReaderP.nc ---
/* $Id: HalLIS3L02DQReaderP.nc,v 1.1.2.1 2006/07/06 23:21:40 philipb Exp $ */
/*
* Copyright (c) 2005 Arch Rock Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* Neither the name of the Arch Rock Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
* ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
* DAMAGE.
*/
/**
*
*
* @author Kaisen Lin
* @author Phil Buonadonna
*/
#include "LIS3L02DQ.h"
generic module HalLIS3L02DQReaderP() {
provides interface Read<uint16_t> as AccelX;
provides interface Read<uint16_t> as AccelY;
provides interface Read<uint16_t> as AccelZ;
uses interface Resource as AccelXResource;
uses interface Resource as AccelYResource;
uses interface Resource as AccelZResource;
uses interface HplLIS3L02DQ as Hpl;
}
implementation {
enum {
S_IDLE,
S_GET_XL,
S_GET_XH,
S_GET_YL,
S_GET_YH,
S_GET_ZL,
S_GET_ZH,
};
uint8_t state = S_IDLE;
uint16_t readResult;
uint8_t byteResult;
uint8_t errorResult;
task void complete_Task() {
switch(state) {
case S_GET_XL:
readResult += byteResult;
state = S_IDLE;
call AccelXResource.release();
signal AccelX.readDone(errorResult, readResult);
break;
case S_GET_XH:
readResult = (uint16_t) byteResult & 0xF;
readResult <<= 8;
state = S_GET_XL;
call Hpl.getReg(LIS3L02DQ_OUTX_L);
break;
case S_GET_YL:
readResult += byteResult;
state = S_IDLE;
call AccelYResource.release();
signal AccelY.readDone(errorResult, readResult);
break;
case S_GET_YH:
readResult = (uint16_t) byteResult & 0xF;
readResult <<= 8;
state = S_GET_YL;
call Hpl.getReg(LIS3L02DQ_OUTY_L);
break;
case S_GET_ZL:
readResult += byteResult;
state = S_IDLE;
call AccelZResource.release();
signal AccelZ.readDone(errorResult, readResult);
break;
case S_GET_ZH:
readResult = (uint16_t) byteResult & 0xF;
readResult <<= 8;
state = S_GET_ZL;
call Hpl.getReg(LIS3L02DQ_OUTZ_L);
break;
default:
break;
}
}
command error_t AccelX.read() {
return call AccelXResource.request();
}
command error_t AccelY.read() {
return call AccelYResource.request();
}
command error_t AccelZ.read() {
return call AccelZResource.request();
}
event void AccelXResource.granted() {
errorResult = call Hpl.getReg(LIS3L02DQ_OUTX_H);
if (errorResult != SUCCESS) {
state = S_GET_XL;
post complete_Task();
}
state = S_GET_XH;
}
event void AccelYResource.granted() {
errorResult = call Hpl.getReg(LIS3L02DQ_OUTY_H);
if (errorResult != SUCCESS) {
state = S_GET_YL;
post complete_Task();
}
state = S_GET_YH;
}
event void AccelZResource.granted() {
errorResult = call Hpl.getReg(LIS3L02DQ_OUTZ_H);
if (errorResult != SUCCESS) {
state = S_GET_ZL;
post complete_Task();
}
state = S_GET_ZH;
}
async event void Hpl.getRegDone(error_t error, uint8_t regAddr, uint8_t val) {
errorResult |= error;
byteResult = val;
post complete_Task();
}
async event void Hpl.setRegDone( error_t error , uint8_t regAddr, uint8_t val) {
// intentionally left blank
}
async event void Hpl.alertThreshold() { }
}
Index: HplLIS3L02DQLogicSPIP.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/lis3l02dq/Attic/HplLIS3L02DQLogicSPIP.nc,v
retrieving revision 1.1.2.1
retrieving revision 1.1.2.2
diff -C2 -d -r1.1.2.1 -r1.1.2.2
*** HplLIS3L02DQLogicSPIP.nc 25 May 2006 22:56:59 -0000 1.1.2.1
--- HplLIS3L02DQLogicSPIP.nc 6 Jul 2006 23:21:40 -0000 1.1.2.2
***************
*** 39,43 ****
*/
! generic module HplLIS3L02DQLogicP()
{
provides interface Init;
--- 39,43 ----
*/
! module HplLIS3L02DQLogicSPIP
{
provides interface Init;
***************
*** 47,50 ****
--- 47,55 ----
uses interface SpiPacket;
uses interface GpioInterrupt as InterruptAlert;
+
+ uses interface HplPXA27xGPIOPin as SPIRxD;
+ uses interface HplPXA27xGPIOPin as SPITxD;
+ uses interface HplPXA27xGPIOPin as SPICLK;
+ uses interface HplPXA27xGPIOPin as SPIFRM;
}
***************
*** 83,88 ****
if (!misInited) {
misInited = TRUE;
! mState = STATE_STOPPED:
}
}
}
--- 88,105 ----
if (!misInited) {
misInited = TRUE;
! mState = STATE_STOPPED;
}
+ call SPICLK.setGAFRpin(SSP1_SCLK_ALTFN);
+ call SPICLK.setGPDRbit(TRUE);
+
+ // Control CS pin manually
+ call SPIFRM.setGPSRbit(); // CS HIGH
+ call SPIFRM.setGPDRbit(TRUE);
+ //call SPIFRM.setGAFRpin(SSP1_SFRM_ALTFN);
+
+ call SPIRxD.setGAFRpin(SSP1_RXD_ALTFN);
+ call SPIRxD.setGPDRbit(FALSE);
+ call SPITxD.setGAFRpin(SSP1_TXD_ALTFN);
+ call SPITxD.setGPDRbit(TRUE);
}
}
***************
*** 101,105 ****
return error;
! return post StartDone();
}
--- 118,127 ----
return error;
! mSPITxBuf[0] = LIS3L02DQ_CTRL_REG1;
! mSPITxBuf[1] = 0;
! mSPITxBuf[1] = (LIS3L01DQ_CTRL_REG1_PD(1) | /*LIS3L01DQ_CTRL_REG1_ST |*/ LIS3L01DQ_CTRL_REG1_XEN | LIS3L01DQ_CTRL_REG1_YEN | LIS3L01DQ_CTRL_REG1_ZEN);
! call SPIFRM.setGPCRbit(); // CS LOW
! error = call SpiPacket.send(mSPITxBuf,mSPIRxBuf,2);
! return error;
}
***************
*** 124,128 ****
error_t error = SUCCESS;
! if((regAddr < 0x16) || (regAddr > 0x2A)) {
error = EINVAL;
return error;
--- 146,150 ----
error_t error = SUCCESS;
! if((regAddr < 0x16) || (regAddr > 0x2F)) {
error = EINVAL;
return error;
***************
*** 130,134 ****
mSPITxBuf[0] = regAddr | (1 << 7); // Set the READ bit
mSPIRxBuf[1] = 0;
! error = call SPIPacket.send(mSPITxBuf,mSPIRxBuf,2);
return error;
--- 152,158 ----
mSPITxBuf[0] = regAddr | (1 << 7); // Set the READ bit
mSPIRxBuf[1] = 0;
! mState = STATE_GETREG;
! call SPIFRM.setGPCRbit(); // CS LOW
! error = call SpiPacket.send(mSPITxBuf,mSPIRxBuf,2);
return error;
***************
*** 139,154 ****
error_t error = SUCCESS;
! if((regAddr < 0x16) || (regAddr > 0x2A)) {
error = EINVAL;
return error;
}
mSPITxBuf[0] = regAddr;
! mSPIRxBuf[1] = val;
! error = call SPIPacket.send(mSPITxBuf,mSPIRxBuf,2);
return error;
}
! async event void SPIPacket.sendDone(uint8_t* txBuf, uint8_t* rxBuf, uint16_t len, error_t spi_error ) {
error_t error = spi_error;
--- 163,179 ----
error_t error = SUCCESS;
! if((regAddr < 0x16) || (regAddr > 0x2F)) {
error = EINVAL;
return error;
}
mSPITxBuf[0] = regAddr;
! mSPITxBuf[1] = val;
! mState = STATE_SETREG;
! error = call SpiPacket.send(mSPITxBuf,mSPIRxBuf,2);
return error;
}
! async event void SpiPacket.sendDone(uint8_t* txBuf, uint8_t* rxBuf, uint16_t len, error_t spi_error ) {
error_t error = spi_error;
***************
*** 156,164 ****
case STATE_GETREG:
mState = STATE_IDLE;
! signal HplLIS3L02DQ.getReg(error, (txBuf[0] & 0x7F) , rxBuf[1]);
break;
case STATE_SETREG:
mState = STATE_IDLE;
! signal HplLIS3L02DQ.getReg(error, (txBuf[0] & 0x7F), txBuf[1]);
break;
default:
--- 181,195 ----
case STATE_GETREG:
mState = STATE_IDLE;
! call SPIFRM.setGPSRbit(); // CS HIGH
! signal HplLIS3L02DQ.getRegDone(error, (txBuf[0] & 0x7F) , rxBuf[1]);
break;
case STATE_SETREG:
mState = STATE_IDLE;
! signal HplLIS3L02DQ.setRegDone(error, (txBuf[0] & 0x7F), txBuf[1]);
! break;
! case STATE_STARTING:
! mState = STATE_IDLE;
! call SPIFRM.setGPSRbit();
! post StartDone();
break;
default:
***************
*** 176,183 ****
}
default event void SplitControl.startDone( error_t error ) { return; }
default event void SplitControl.stopDone( error_t error ) { return; }
! default event void HplLIS3L02DQ.alertThreshold(){ return; }
}
--- 207,219 ----
}
+ async event void SPITxD.interruptGPIOPin() {}
+ async event void SPIRxD.interruptGPIOPin() {}
+ async event void SPICLK.interruptGPIOPin() {}
+ async event void SPIFRM.interruptGPIOPin() {}
+
default event void SplitControl.startDone( error_t error ) { return; }
default event void SplitControl.stopDone( error_t error ) { return; }
! default async event void HplLIS3L02DQ.alertThreshold(){ return; }
}
Index: LIS3L02DQ.h
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/lis3l02dq/Attic/LIS3L02DQ.h,v
retrieving revision 1.1.2.1
retrieving revision 1.1.2.2
diff -C2 -d -r1.1.2.1 -r1.1.2.2
*** LIS3L02DQ.h 25 May 2006 22:56:59 -0000 1.1.2.1
--- LIS3L02DQ.h 6 Jul 2006 23:21:40 -0000 1.1.2.2
***************
*** 3,7 ****
* All rights reserved.
*
! * Redistribution and use in so1urce and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
--- 3,7 ----
* All rights reserved.
*
! * Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
***************
*** 91,93 ****
--- 91,100 ----
#define LIS3L02DQ_WAKE_UP_CFG_XLIE (1 << 0)
+ typedef enum {
+ LIS_AFLAGS_NONE,
+ LIS_AFLAGS_HIGH,
+ LIS_AFLAGS_LOW,
+ LIS_AFLAGS_BOTH
+ } lis_alertflags_t;
+
#endif /* _LIS3L02DQ_H */
- Previous message: [Tinyos-2-commits] CVS: tinyos-2.x/tos/chips/max136x
HalMAX136xAdvanced.nc, NONE, 1.1.2.1 HalMAX136xControlP.nc,
NONE, 1.1.2.1 HalMAX136xReaderP.nc, NONE,
1.1.2.1 HplMAX136x.nc, 1.1.2.1, 1.1.2.2 HplMAX136xLogicP.nc,
1.1.2.1, 1.1.2.2 MAX136x.h, 1.1.2.1, 1.1.2.2
- Next message: [Tinyos-2-commits] CVS: tinyos-2.x/tos/sensorboards/im2sb
LIS3L02DQC.nc, NONE, 1.1.2.1 LIS3L02DQInternalC.nc, NONE,
1.1.2.1 LIS3L02DQInternalP.nc, NONE, 1.1.2.1 MAX136xC.nc, NONE,
1.1.2.1 MAX136xInternalC.nc, NONE, 1.1.2.1 MAX136xInternalP.nc,
NONE, 1.1.2.1 TMP175C.nc, NONE, 1.1.2.1 TMP175InternalC.nc,
NONE, 1.1.2.1 TMP175InternalP.nc, NONE, 1.1.2.1 im2sb.h,
1.1.2.1, 1.1.2.2
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