[Tinyos-2-commits] CVS: tinyos-2.x/tos/chips/pxa27x/uart
HalPXA27xSerialCntl.nc, NONE, 1.1.2.1 HalPXA27xSerialPacket.nc,
NONE, 1.1.2.1 HplPXA27xBTUARTC.nc, NONE,
1.1.2.1 HplPXA27xFFUARTC.nc, NONE, 1.1.2.1 HplPXA27xUARTP.nc,
NONE, 1.1.2.1 PXA27X_UARTREG.h, NONE, 1.1.2.1 pxa27x_serial.h,
NONE, 1.1.2.1 HalPXA27xSerialP.nc, 1.1.2.1,
1.1.2.2 HplPXA27xSTUARTC.nc, 1.1.2.1,
1.1.2.2 HplPXA27xSTUARTP.nc, 1.1.2.1, 1.1.2.2
Philip Buonadonna
philipb at users.sourceforge.net
Wed Jul 12 12:10:05 PDT 2006
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CVS: tinyos-2.x/tos/chips/pxa27x/dma DMA.h, NONE,
1.1.2.1 HalPXA27xDMAChannel.nc, NONE,
1.1.2.1 HalPXA27xDMAChannelC.nc, NONE,
1.1.2.1 HalPXA27xDMAChannelM.nc, NONE, 1.1.2.1
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Update of /cvsroot/tinyos/tinyos-2.x/tos/chips/pxa27x/uart
In directory sc8-pr-cvs10.sourceforge.net:/tmp/cvs-serv13446
Modified Files:
Tag: tinyos-2_0_devel-BRANCH
HalPXA27xSerialP.nc HplPXA27xSTUARTC.nc HplPXA27xSTUARTP.nc
Added Files:
Tag: tinyos-2_0_devel-BRANCH
HalPXA27xSerialCntl.nc HalPXA27xSerialPacket.nc
HplPXA27xBTUARTC.nc HplPXA27xFFUARTC.nc HplPXA27xUARTP.nc
PXA27X_UARTREG.h pxa27x_serial.h
Log Message:
Updated UART components and additions
--- NEW FILE: HalPXA27xSerialCntl.nc ---
/* $Id: HalPXA27xSerialCntl.nc,v 1.1.2.1 2006/07/12 19:09:59 philipb Exp $ */
/*
* Copyright (c) 2005 Arch Rock Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* Neither the name of the Arch Rock Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
* ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
* DAMAGE.
*/
/**
* @author Phil Buonadonna
*/
interface HalPXA27xSerialCntl
{
/**
* Modify runtime port parameters
*
* @param baudrate The integer value of baudrate
* @param databits The Number of data bits
* @param partiy Values of EVEN,ODD or NONE
* @param stopbits Values of 1 or 2
* @param flow_cntl TRUE to enable hardware flow control
*
* @return SUCCESS if parameters successfully applied. FAIL otherwise
*/
async command error_t configPort(uint32_t baudrate,
uint8_t databits,
enum parity,
uin8_t stopbits,
bool flow_cntl);
/**
* Flush the port FIFOs
*
* @return SUCCESS if flushed, FAIL otherwise.
*/
async command error_t flushPort();
}
--- NEW FILE: HalPXA27xSerialPacket.nc ---
/* $Id: HalPXA27xSerialPacket.nc,v 1.1.2.1 2006/07/12 19:09:59 philipb Exp $ */
/*
* Copyright (c) 2005 Arch Rock Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* Neither the name of the Arch Rock Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
* ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
* DAMAGE.
*/
/**
* @author Phil Buonadonna
*/
interface HalPXA27xSerialPacket
{
/**
* Begin transmission of a UART stream. If SUCCESS is returned,
* <code>sendDone</code> will be signalled when transmission is
* complete.
*
* @param buf Buffer for bytes to send.
* @param len Number of bytes to send.
* @return SUCCESS if request was accepted, FAIL otherwise.
*/
async command error_t send(uint8_t *buf, uint16_t len);
/**
* Signal completion of sending a stream.
*
* @param buf Bytes sent.
* @param len Number of bytes sent.
* @param status UART error status.
*
* @return buf A pointer to a new buffer of equal length
* as in the original <code>senc</code> call that is to be transmitted (chained
* send). Set to NULL to end further transmissions.
*/
async event uint8_t *sendDone(uint8_t *buf, uint16_t len, uart_status_t status);
/**
* Begin reception of a UART stream. If SUCCESS is returned,
* <code>receiveDone</code> will be signalled when reception is
* complete.
*
* @param buf Buffer for received bytes.
* @param len Number of bytes to receive.
* @param timeout Timeout, in milliseconds, for receive operation
*
* @return SUCCESS if request was accepted, FAIL otherwise.
*/
async command error_t receive(uint8_t *buf, uint16_t len, uint16_t timeout);
/**
* Signal completion of receiving a stream.
*
* @param buf Buffer for bytes received.
* @param len Number of bytes received.
* @param status UART error status
*
* @return buf A pointer to a new buffer of equal or greater length
* as in the original <code>receive</code> call in which it intiate a
* new packet reception (chained receive). Set to NULL to terminate further
* reception.
*/
async event uint8_t *receiveDone(uint8_t *buf, uint16_t len, uart_status_t status);
}
--- NEW FILE: HplPXA27xBTUARTC.nc ---
/* $Id: HplPXA27xBTUARTC.nc,v 1.1.2.1 2006/07/12 19:10:00 philipb Exp $ */
/*
* Copyright (c) 2005 Arch Rock Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* Neither the name of the Arch Rock Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
* ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
* DAMAGE.
*/
/**
*
* @author Phil Buonadonna
*/
configuration HplPXA27xBTUARTC
{
provides interface Init;
provides interface HplPXA27xUART as BTUART;
}
implementation
{
components HplPXA27xUARTP(&BTRBR);
components HplPXA27xInterruptM;
Init = HplPXA27xUARTP;
BTUART = HplPXA27xUARTP.UART;
HplPXA27xUARTP.UARTIrq -> HplPXA27xInterruptM.PXA27xIrq[PPID_BTUART];
}
--- NEW FILE: HplPXA27xFFUARTC.nc ---
/* $Id: HplPXA27xFFUARTC.nc,v 1.1.2.1 2006/07/12 19:10:00 philipb Exp $ */
/*
* Copyright (c) 2005 Arch Rock Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* Neither the name of the Arch Rock Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
* ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
* DAMAGE.
*/
/**
*
* @author Phil Buonadonna
*/
configuration HplPXA27xFFUARTC
{
provides interface Init;
provides interface HplPXA27xUART as FFUART;
}
implementation
{
components HplPXA27xUARTP(&FFRBR);
components HplPXA27xInterruptM;
Init = HplPXA27xUARTP;
FFUART = HplPXA27xUARTP.UART;
HplPXA27xUARTP.UARTIrq -> HplPXA27xInterruptM.PXA27xIrq[PPID_FFUART];
}
--- NEW FILE: HplPXA27xUARTP.nc ---
/* $Id: HplPXA27xUARTP.nc,v 1.1.2.1 2006/07/12 19:10:00 philipb Exp $ */
/*
* Copyright (c) 2005 Arched Rock Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* Neither the name of the Arched Rock Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
* ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
* DAMAGE.
*/
/**
* Provides low-level initialization, 1st level interrupt dispatch and register
* access to the STUART.
* This component automatically handles setting of the DLAB bit for
* divisor register access (DLL and DLH)
*
* @author Phil Buonadonna
*/
module HplPXA27xSTUARTP
{
provides interface Init;
provides interface HplPXA27xUART as STUART;
uses interface HplPXA27xInterrupt as STUARTIrq;
}
implementation
{
bool m_fInit = FALSE;
command error_t Init.init() {
bool isInited;
atomic {
isInited = m_fInit;
m_fInit = TRUE;
}
if (!isInited) {
CKEN |= CKEN5_STUART;
call STUARTIrq.allocate();
call STUARTIrq.enable();
STLCR |= LCR_DLAB;
STDLL = 0x04;
STDLH = 0x00;
STLCR &= ~LCR_DLAB;
}
return SUCCESS;
}
async command uint32_t STUART.getRBR() { return STRBR; }
async command void STUART.setTHR(uint32_t val) { STRBR = val; }
async command void STUART.setDLL(uint32_t val) {
STLCR |= LCR_DLAB;
STDLL = val;
STLCR &= ~LCR_DLAB;
}
async command uint32_t STUART.getDLL() {
uint32_t val;
STLCR |= LCR_DLAB;
val = STDLL;
STLCR &= ~LCR_DLAB;
return val;
}
async command void STUART.setDLH(uint32_t val) {
STLCR |= LCR_DLAB;
STDLH = val;
STLCR &= ~LCR_DLAB;
}
async command uint32_t STUART.getDLH() {
uint32_t val;
STLCR |= LCR_DLAB;
val = STDLH;
STLCR &= ~LCR_DLAB;
return val;
}
async command void STUART.setIER(uint32_t val) { STIER = val; }
async command uint32_t STUART.getIER() { return STIER; }
async command uint32_t STUART.getIIR() { return STIIR; }
async command void STUART.setFCR(uint32_t val) { STFCR = val; }
async command void STUART.setLCR(uint32_t val) { STLCR = val; }
async command uint32_t STUART.getLCR() { return STLCR; }
async command void STUART.setMCR(uint32_t val) { STMCR = val; }
async command uint32_t STUART.getMCR() { return STMCR; }
async command uint32_t STUART.getLSR() { return STLSR; }
async command uint32_t STUART.getMSR() { return STMSR; }
async command void STUART.setSPR(uint32_t val) { STSPR = val; }
async command uint32_t STUART.getSPR() { return STSPR; }
async command void STUART.setISR(uint32_t val) { STISR = val; }
async command uint32_t STUART.getISR() { return STISR; }
async command void STUART.setFOR(uint32_t val) { STFOR = val; }
async command uint32_t STUART.getFOR() { return STFOR; }
async command void STUART.setABR(uint32_t val) { STABR = val; }
async command uint32_t STUART.getABR() { return STABR; }
async command uint32_t STUART.getACR() { return STACR; }
async event void STUARTIrq.fired () {
signal STUART.interruptUART();
}
default async event void STUART.interruptUART() { return; }
}
--- NEW FILE: PXA27X_UARTREG.h ---
/* $Id: PXA27X_UARTREG.h,v 1.1.2.1 2006/07/12 19:10:00 philipb Exp $ */
/*
* Copyright (c) 2005 Arch Rock Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* Neither the name of the Arched Rock Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
* ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
* DAMAGE.
*/
/*
* Helper macros to make programming the HplPXA27xUARTP component easier
*/
#ifndef _PXA27X_UARTREG_H
#define _PXA27X_UARTREG_H
#define UARTRBR(_base) _PXAREG_OFFSET(_base,0)
#define UARTTHR(_base) _PXAREG_OFFSET(_base,0)
#define UARTIER(_base) _PXAREG_OFFSET(_base,0x04)
#define UARTIIR(_base) _PXAREG_OFFSET(_base,0x08)
#define UARTFCR(_base) _PXAREG_OFFSET(_base,0x08)
#define UARTLCR(_base) _PXAREG_OFFSET(_base,0x0C)
#define UARTMCR(_base) _PXAREG_OFFSET(_base,0x10)
#define UARTLSR(_base) _PXAREG_OFFSET(_base,0x14)
#define UARTMSR(_base) _PXAREG_OFFSET(_base,0x18)
#define UARTSCR(_base) _PXAREG_OFFSET(_base,0x1C)
#define UARTISR(_base) _PXAREG_OFFSET(_base,0x20)
#define UARTFOR(_base) _PXAREG_OFFSET(_base,0x24)
#define UARTABR(_base) _PXAREG_OFFSET(_base,0x28)
#define UARTACR(_base) _PXAREG_OFFSET(_base,0x2C)
#define UARTDLL(_base) _PXAREG_OFFSET(_base,0)
#define UARTDLH(_base) _PXAREG_OFFSET(_base,0x04)
#endif /* _PXA27X_UARTREG_H */
--- NEW FILE: pxa27x_serial.h ---
/* $Id: pxa27x_serial.h,v 1.1.2.1 2006/07/12 19:10:00 philipb Exp $ */
/*
* Copyright (c) 2005 Arched Rock Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* Neither the name of the Arched Rock Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
* ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
* USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
* DAMAGE.
*/
#ifndef _pxa27x_serial_h
#define _pxa27x_serial_h
enum {
EVEN,
ODD,
NONE
};
#endif /* _pxa27x_serial_h */
Index: HalPXA27xSerialP.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/pxa27x/uart/HalPXA27xSerialP.nc,v
retrieving revision 1.1.2.1
retrieving revision 1.1.2.2
diff -C2 -d -r1.1.2.1 -r1.1.2.2
*** HalPXA27xSerialP.nc 7 Dec 2005 23:33:19 -0000 1.1.2.1
--- HalPXA27xSerialP.nc 12 Jul 2006 19:09:59 -0000 1.1.2.2
***************
*** 71,74 ****
--- 71,76 ----
*/
+ #include "pxa27x_serial.h"
+
generic module HalPXA27xSerialP(uint32_t defaultRate)
{
***************
*** 77,84 ****
--- 79,92 ----
interface StdControl;
interface SerialByteComm;
+ interface HalPXA27xSerialPacket;
+ interface HalPXA27xSerialCntl;
}
uses {
interface Init as UARTInit;
interface HplPXA27xUART as UART;
+ interface HplPXA27xDMAChnl as RxDMA;
+ interface HplPXA27xDMAChnl as TxDMA;
+ interface HplPXA27xDMAInfo as UARTRxDMAInfo;
+ interface HplPXA27xDMAInfo as UARTTxDMAInfo;
}
}
***************
*** 87,93 ****
{
command error_t Init.init() {
uint32_t uiDivisor;
-
if (defaultRate == 0) {
return EINVAL;
--- 95,105 ----
{
+ uint8_t *txCurrentBuf, *rxCurrentBuf;
+ uint32_t lenCurrent;
+
command error_t Init.init() {
+ error_t error = SUCCESS;
+ #if 0
uint32_t uiDivisor;
if (defaultRate == 0) {
return EINVAL;
***************
*** 110,115 ****
call UART.setFCR(FCR_TRFIFOE);
}
! return SUCCESS;
}
--- 122,132 ----
call UART.setFCR(FCR_TRFIFOE);
}
+ #endif
! atomic {
! call UARTInit.init();
! }
! error = call HalPXA27xSerialCntl.configPort(defaultRate,8,NONE,1,FALSE);
! return error;
}
***************
*** 132,135 ****
--- 149,264 ----
return SUCCESS;
}
+
+ async command error_t HalPXA27xSerialPacket.send(uint8_t *buf, uint16_t len) {
+
+ uint32_t tmp;
+ uint32_t txAddr;
+ uint32_t DMAFlags;
+ error_t error = FAIL;
+
+ atomic {
+ txCurrentBuf = buf;
+ lenCurrent = len;
+ }
+
+ DMAFlags = (DCMD_FLOWTRG | DCMD_BURST8 | DCMD_WIDTH1
+ | DCMD_LEN(len));
+
+ txAddr = (uint32_t) buf;
+ txDMAFlags |= DCMD_INCSRCADDR;
+
+ call TxDMA.setDCSR(DCSR_NODESCFETCH);
+ call TxDMA.setDSADR(txAddr);
+ call TxDMA.setDTADR(call UARTTxDMAInfo.getAddr());
+ call TxDMA.setDCMD(DMAFlags);
+
+ call UART.setIER(IER_DMAE);
+
+ call TxDMA.setDCSR(DCSR_RUN | DCSR_NODESCFETCH);
+
+ error = SUCCESS;
+
+ return error;
+ }
+
+
+ async command error_t HalPXA27xSerialPacket.receive(uint8_t *buf, uint16_t len,
+ uint16_t timeout) {
+
+
+ }
+
+ async event void RxDMA.interruptDMA() {
+
+ }
+
+ async event void TxDMA.interruptDMA() {
+
+ }
+
+
+ async command error_t HalPXA27xSerialCntl.configPort(uint32_t baudrate,
+ uint8_t databits,
+ enum parity,
+ uint8_t stopbits,
+ bool flow_cntl) {
+ uint32_t uiDivisor;
+ uint32_t valLCR = 0;
+ uint32_t valMCR = MCR_OUT2;
+
+ uiDivisor = 921600/baudrate;
+ // Check for invalid baud rate divisor value.
+ // XXX - Eventually could use '0' to imply auto rate detection
+ if ((uiDivisor & 0xFFFF0000) || (uiDivisor == 0)) {
+ return EINVAL;
+ }
+
+ if ((databits > 8 || databits < 5)) {
+ return EINVAL;
+ }
+ valLCR |= LCR_WLS((databits-5));
+
+ switch (parity) {
+ case EVEN:
+ valLCR |= LCR_EPS;
+ // Fall through to enable
+ case ODD:
+ valLCR |= LCR_PEN;
+ break;
+ case NONE:
+ break;
+ default:
+ return EINVAL;
+ break;
+ }
+
+ if ((stopbits > 2) || (stopbits < 1)) {
+ return EINVAL;
+ }
+ else if (stopbits == 2) {
+ valLCR |= LCR_STB;
+ }
+
+ if (flow_cntl) {
+ valMCR |= MCR_AFE;
+ }
+
+ atomic {
+ call UART.setDLL((uiDivisor & 0xFF));
+ call UART.setDLH(((uiDivisor >> 8) & 0xFF));
+ call UART.setLCR(valLCR);
+ call UART.setMCR(valMCR);
+ }
+
+ }
+
+ async command error_t HplPXA27xSerialCntl.flushPort() {
+
+ atomic {
+ call UART.setFCR(FCR_RESETTF | FCR_RESETRF);
+ }
+
+ return SUCCESS;
+ }
async event void UART.interruptUART() {
***************
*** 163,165 ****
--- 292,307 ----
default async event void SerialByteComm.putDone() { return; }
+ default async event uint8_t* HalPXA27xSerialPacket.sendDone(uint8_t *buf,
+ uint16_t len,
+ uart_status_t status) {
+ return NULL;
+ }
+
+ default async event uint8_t* HalPXA27xSerialPacket.receiveDone(uint8_t *buf,
+ uint16_t len,
+ uart_status_t status) {
+ return NULL;
+ }
+
+
}
Index: HplPXA27xSTUARTC.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/pxa27x/uart/HplPXA27xSTUARTC.nc,v
retrieving revision 1.1.2.1
retrieving revision 1.1.2.2
diff -C2 -d -r1.1.2.1 -r1.1.2.2
*** HplPXA27xSTUARTC.nc 7 Dec 2005 23:33:19 -0000 1.1.2.1
--- HplPXA27xSTUARTC.nc 12 Jul 2006 19:10:00 -0000 1.1.2.2
***************
*** 1,5 ****
/* $Id$ */
/*
! * Copyright (c) 2005 Arched Rock Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
--- 1,5 ----
/* $Id$ */
/*
! * Copyright (c) 2005 Arch Rock Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
***************
*** 12,16 ****
* documentation and/or other materials provided with the distribution.
*
! * Neither the name of the Arched Rock Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
--- 12,16 ----
* documentation and/or other materials provided with the distribution.
*
! * Neither the name of the Arch Rock Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
***************
*** 42,52 ****
implementation
{
! components HplPXA27xSTUARTP;
components HplPXA27xInterruptM;
! Init = HplPXA27xSTUARTP;
! STUART = HplPXA27xSTUARTP;
! HplPXA27xSTUARTP.STUARTIrq -> HplPXA27xInterruptM.PXA27xIrq[PPID_STUART];
}
--- 42,52 ----
implementation
{
! components HplPXA27xUARTP(&STRBR);
components HplPXA27xInterruptM;
! Init = HplPXA27xUARTP;
! STUART = HplPXA27xUARTP.UART;
! HplPXA27xUARTP.UARTIrq -> HplPXA27xInterruptM.PXA27xIrq[PPID_STUART];
}
Index: HplPXA27xSTUARTP.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/pxa27x/uart/HplPXA27xSTUARTP.nc,v
retrieving revision 1.1.2.1
retrieving revision 1.1.2.2
diff -C2 -d -r1.1.2.1 -r1.1.2.2
*** HplPXA27xSTUARTP.nc 7 Dec 2005 23:33:19 -0000 1.1.2.1
--- HplPXA27xSTUARTP.nc 12 Jul 2006 19:10:00 -0000 1.1.2.2
***************
*** 31,35 ****
/**
* Provides low-level initialization, 1st level interrupt dispatch and register
! * access to the STUART.
* This component automatically handles setting of the DLAB bit for
* divisor register access (DLL and DLH)
--- 31,39 ----
/**
* Provides low-level initialization, 1st level interrupt dispatch and register
! * access for the different uarts. It is a generic that's bound to
! * the particular UART upon creation.
! *
! * @param baseaddr. The base address of the associated uart. One of
! * &FFRBR, &BTRBR or &STRBR.
* This component automatically handles setting of the DLAB bit for
* divisor register access (DLL and DLH)
***************
*** 38,46 ****
*/
! module HplPXA27xSTUARTP
{
provides interface Init;
! provides interface HplPXA27xUART as STUART;
! uses interface HplPXA27xInterrupt as STUARTIrq;
}
--- 42,52 ----
*/
! #include "PXA27X_UARTREG.h"
!
! generic module HplPXA27xUARTP{uint32_t base_addr)
{
provides interface Init;
! provides interface HplPXA27xUART as UART;
! uses interface HplPXA27xInterrupt as UARTIrq;
}
***************
*** 58,68 ****
if (!isInited) {
! CKEN |= CKEN5_STUART;
! call STUARTIrq.allocate();
! call STUARTIrq.enable();
! STLCR |= LCR_DLAB;
! STDLL = 0x04;
! STDLH = 0x00;
! STLCR &= ~LCR_DLAB;
}
--- 64,86 ----
if (!isInited) {
! switch (uartid) {
! case (0x40100000):
! CKEN |= CKEN6_FFUART;
! break;
! case (0x40200000):
! CKEN |= CKEN7_BTUART;
! break;
! case (0x40700000):
! CKEN |= CKEN5_STUART;
! break;
! default:
! breakt;
! }
! call UARTIrq.allocate();
! call UARTIrq.enable();
! UARTLCR(base_addr) |= LCR_DLAB;
! UARTDLL(base_addr) = 0x04;
! UARTDLH(base_addr) = 0x00;
! UARTLCR(base_addr) &= ~LCR_DLAB;
}
***************
*** 70,125 ****
}
! async command uint32_t STUART.getRBR() { return STRBR; }
! async command void STUART.setTHR(uint32_t val) { STRBR = val; }
! async command void STUART.setDLL(uint32_t val) {
! STLCR |= LCR_DLAB;
! STDLL = val;
! STLCR &= ~LCR_DLAB;
}
! async command uint32_t STUART.getDLL() {
uint32_t val;
! STLCR |= LCR_DLAB;
! val = STDLL;
! STLCR &= ~LCR_DLAB;
return val;
}
! async command void STUART.setDLH(uint32_t val) {
! STLCR |= LCR_DLAB;
! STDLH = val;
! STLCR &= ~LCR_DLAB;
}
! async command uint32_t STUART.getDLH() {
uint32_t val;
! STLCR |= LCR_DLAB;
! val = STDLH;
! STLCR &= ~LCR_DLAB;
return val;
}
! async command void STUART.setIER(uint32_t val) { STIER = val; }
! async command uint32_t STUART.getIER() { return STIER; }
! async command uint32_t STUART.getIIR() { return STIIR; }
! async command void STUART.setFCR(uint32_t val) { STFCR = val; }
! async command void STUART.setLCR(uint32_t val) { STLCR = val; }
! async command uint32_t STUART.getLCR() { return STLCR; }
! async command void STUART.setMCR(uint32_t val) { STMCR = val; }
! async command uint32_t STUART.getMCR() { return STMCR; }
! async command uint32_t STUART.getLSR() { return STLSR; }
! async command uint32_t STUART.getMSR() { return STMSR; }
! async command void STUART.setSPR(uint32_t val) { STSPR = val; }
! async command uint32_t STUART.getSPR() { return STSPR; }
! async command void STUART.setISR(uint32_t val) { STISR = val; }
! async command uint32_t STUART.getISR() { return STISR; }
! async command void STUART.setFOR(uint32_t val) { STFOR = val; }
! async command uint32_t STUART.getFOR() { return STFOR; }
! async command void STUART.setABR(uint32_t val) { STABR = val; }
! async command uint32_t STUART.getABR() { return STABR; }
! async command uint32_t STUART.getACR() { return STACR; }
! async event void STUARTIrq.fired () {
! signal STUART.interruptUART();
}
! default async event void STUART.interruptUART() { return; }
}
--- 88,143 ----
}
! async command uint32_t UART.getRBR() { return UARTRBR(base_addr); }
! async command void UART.setTHR(uint32_t val) { UARTTHR(base_addr) = val; }
! async command void UART.setDLL(uint32_t val) {
! UARTLCR(base_addr) |= LCR_DLAB;
! UARTDLL(base_addr) = val;
! UARTLCR(base_addr) &= ~LCR_DLAB;
}
! async command uint32_t UART.getDLL() {
uint32_t val;
! UARTLCR(base_addr) |= LCR_DLAB;
! val = UARTDLL(base_addr);
! UARTLCR(base_addr) &= ~LCR_DLAB;
return val;
}
! async command void UART.setDLH(uint32_t val) {
! UARTLCR(base_addr) |= LCR_DLAB;
! UARTDLH(base_addr) = val;
! UARTLCR(base_addr) &= ~LCR_DLAB;
}
! async command uint32_t UART.getDLH() {
uint32_t val;
! UARTLCR(base_addr) |= LCR_DLAB;
! val = UARTDLH(base_addr);
! UARTLCR(base_addr) &= ~LCR_DLAB;
return val;
}
! async command void UART.setIER(uint32_t val) { UARTIER(base_addr) = val; }
! async command uint32_t UART.getIER() { return UARTIER(base_addr); }
! async command uint32_t UART.getIIR() { return UARTIIR(base_addr); }
! async command void UART.setFCR(uint32_t val) { UARTFCR(base_addr) = val; }
! async command void UART.setLCR(uint32_t val) { UARTLCR(base_addr) = val; }
! async command uint32_t UART.getLCR() { return UARTLCR(base_addr); }
! async command void UART.setMCR(uint32_t val) { UARTMCR(base_addr) = val; }
! async command uint32_t UART.getMCR() { return UARTMCR(base_addr); }
! async command uint32_t UART.getLSR() { return UARTLSR(base_addr); }
! async command uint32_t UART.getMSR() { return UARTMSR(base_addr); }
! async command void UART.setSPR(uint32_t val) { UARTSPR(base_addr) = val; }
! async command uint32_t UART.getSPR() { return UARTSPR(base_addr); }
! async command void UART.setISR(uint32_t val) { UARTISR(base_addr) = val; }
! async command uint32_t UART.getISR() { return UARTISR(base_addr); }
! async command void UART.setFOR(uint32_t val) { UARTFOR(base_addr) = val; }
! async command uint32_t UART.getFOR() { return UARTFOR(base_addr); }
! async command void UART.setABR(uint32_t val) { UARTABR(base_addr) = val; }
! async command uint32_t UART.getABR() { return UARTABR(base_addr); }
! async command uint32_t UART.getACR() { return UARTACR(base_addr); }
! async event void UARTIrq.fired () {
! signal UART.interruptUART();
}
! default async event void UART.interruptUART() { return; }
}
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