[Tinyos-2-commits] CVS: tinyos-2.x/tos/chips/lis3l02dq HplLIS3L02DQ.nc, NONE, 1.1.2.1 HplLIS3L02DQLogicSPIP.nc, NONE, 1.1.2.1 LIS3L02DQ.h, NONE, 1.1.2.1

Thu May 25 15:57:01 PDT 2006

Update of /cvsroot/tinyos/tinyos-2.x/tos/chips/lis3l02dq
In directory sc8-pr-cvs10.sourceforge.net:/tmp/cvs-serv7044

Added Files:
      Tag: tinyos-2_0_devel-BRANCH
	HplLIS3L02DQ.nc HplLIS3L02DQLogicSPIP.nc LIS3L02DQ.h 
Log Message:
Initial HPL support for the ST LIS3L02DQ chip.

--- NEW FILE: HplLIS3L02DQ.nc ---
/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Hpl interface for the ST LIS3L02DQ 3-Axis Accelerometer
 *
 * @author Phil Buonadonna <pbuonadonna at archrock.com>
 * @version $Revision: 1.1.2.1 $ $Date: 2006/05/25 22:56:59 $
 */

interface HplLIS3L02DQ {

  command error_t getReg(uint8_t regAddr);
  async event void getRegDone( error_t error, uint8_t regAddr, uint8_t val);

  command error_t setReg( uint8_t regAddr, uint8_t val);
  async event void setRegDone( error_t error , uint8_t regAddr, uint8_t val);

  async event void alertThreshold();

}

--- NEW FILE: HplLIS3L02DQLogicSPIP.nc ---
/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * This module is the driver components for the ST LIS3L02DQ 3-axis 
 * accelerometer in the 4 wire SPI mode. It requires the SPI packet
 * interface and provides the HplLIS3L02DQ HPL interface.
 *
 * @author Phil Buonadonna <pbuonadonna at archrock.com>
 * @version $Revision: 1.1.2.1 $ $Date: 2006/05/25 22:56:59 $
 */

generic module HplLIS3L02DQLogicP()
{
  provides interface Init;
  provides interface SplitControl;
  provides interface HplLIS3L02DQ;

  uses interface SpiPacket;
  uses interface GpioInterrupt as InterruptAlert;
}

implementation {

  enum {
    STATE_IDLE,
    STATE_STARTING,
    STATE_STOPPING,
    STATE_STOPPED,
    STATE_GETREG,
    STATE_SETREG,
    STATE_ERROR
  };

  uint8_t mSPIRxBuf[4],mSPITxBuf[4];
  uint8_t mState;
  bool misInited = FALSE;
  norace error_t mSSError;

  task void StartDone() {
    atomic mState = STATE_IDLE;
    signal SplitControl.startDone(SUCCESS);
    return;
  }

  task void StopDone() {
    atomic mState = STATE_STOPPED;
    signal SplitControl.stopDone(mSSError);
    return;
  }

  command error_t Init.init() {
    atomic {
      if (!misInited) {
	misInited = TRUE;
	mState = STATE_STOPPED:
      }
    }
  }

  command error_t SplitControl.start() {
    error_t error = SUCCESS;
    atomic {
      if (mState == STATE_STOPPED) { 
	mState = STATE_STARTING;
      }
      else {
	error = EBUSY;
      }
    }
    if (error) 
      return error;

    return post StartDone();
  }

  command error_t SplitControl.stop() {
    error_t error = SUCCESS;

    atomic {
      if (mState == STATE_IDLE) {
	mState = STATE_STOPPING;
      }
      else { 
	error = EBUSY;
      }
    }
    if (error)
      return error;

    return post StopDone();
  }

  command error_t HplLIS3L02DQ.getReg(uint8_t regAddr) {
    error_t error = SUCCESS;

    if((regAddr < 0x16) || (regAddr > 0x2A)) {
      error = EINVAL;
      return error;
    }
    mSPITxBuf[0] = regAddr | (1 << 7); // Set the READ bit
    mSPIRxBuf[1] = 0;
    error = call SPIPacket.send(mSPITxBuf,mSPIRxBuf,2);

    return error;

  }

  command error_t HplLIS3L02DQ.setReg(uint8_t regAddr, uint8_t val) {
    error_t error = SUCCESS;

    if((regAddr < 0x16) || (regAddr > 0x2A)) {
      error = EINVAL;
      return error;
    }
    mSPITxBuf[0] = regAddr;
    mSPIRxBuf[1] = val;
    error = call SPIPacket.send(mSPITxBuf,mSPIRxBuf,2);

    return error;
  }

  async event void SPIPacket.sendDone(uint8_t* txBuf, uint8_t* rxBuf, uint16_t len, error_t spi_error ) {
    error_t error = spi_error;

    switch (mState) {
    case STATE_GETREG:
      mState = STATE_IDLE;
      signal HplLIS3L02DQ.getReg(error, (txBuf[0] & 0x7F) , rxBuf[1]);
      break;
    case STATE_SETREG:
      mState = STATE_IDLE;
      signal HplLIS3L02DQ.getReg(error, (txBuf[0] & 0x7F), txBuf[1]);
      break;
    default:
      mState = STATE_IDLE;
      break;
    }
    return;
  }

  async event void InterruptAlert.fired() {
    // This alert is decoupled from whatever state the MAX136x is in. 
    // Upper layers must handle dealing with this alert appropriately.
    signal HplLIS3L02DQ.alertThreshold();
    return;
  }

  default event void SplitControl.startDone( error_t error ) { return; }
  default event void SplitControl.stopDone( error_t error ) { return; }

  default event void HplLIS3L02DQ.alertThreshold(){ return; }

}

--- NEW FILE: LIS3L02DQ.h ---
/*
 * Copyright (c) 2005-2006 Arch Rock Corporation
 * All rights reserved.
 *
 * Redistribution and use in so1urce and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the
 *   distribution.
 * - Neither the name of the Arch Rock Corporation nor the names of
 *   its contributors may be used to endorse or promote products derived
 *   from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
 * ARCHED ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
 * OF THE POSSIBILITY OF SUCH DAMAGE
 */

/**
 * Types and definitions for the ST LIS3L02DQ 3-axis Accelerometer
 *
 * @author Phil Buonadonna <pbuonadonna at archrock.com>
 * @version $Revision: 1.1.2.1 $ $Date: 2006/05/25 22:56:59 $
 */

#ifndef _LIS3L02DQ_H
#define _LIS3L02DQ_H

#define LIS3L02DQ_OFFSET_X		(0x16)
#define LIS3L02DQ_OFFSET_Y		(0x17)
#define LIS3L02DQ_OFFSET_Z		(0x18)
#define LIS3L02DQ_GAIN_X		(0x19)
#define LIS3L02DQ_GAIN_Y		(0x1A)
#define LIS3L02DQ_GAIN_Z		(0x1B)

#define LIS3L02DQ_CTRL_REG1		(0x20)
#define LIS3L02DQ_CTRL_REG2		(0x21)

#define LIS3L02DQ_WAKE_UP_CFG		(0x23)
#define LIS3L02DQ_WAKE_UP_SRC		(0x24)
#define LIS3L02DQ_WAKE_UP_ACK		(0x25)

#define LIS3L02DQ_STATUS_REG		(0x27)

#define LIS3L02DQ_OUTX_L		(0x28)
#define LIS3L02DQ_OUTX_H		(0x29)
#define LIS3L02DQ_OUTY_L		(0x2A)
#define LIS3L02DQ_OUTY_H		(0x2B)
#define LIS3L02DQ_OUTZ_L		(0x2C)
#define LIS3L02DQ_OUTZ_H		(0x2D)

#define LIS3L02DQ_THS_L			(0x2E)
#define LIS3L02DQ_THS_H			(0x2F)

#define LIS3L01DQ_CTRL_REG1_PD(_x)	(((_x) & 0x3) << 6)
#define LIS3L01DQ_CTRL_REG1_DF(_x)	(((_x) & 0x3) << 4)
#define LIS3L01DQ_CTRL_REG1_ST		(1 << 3)
#define LIS3L01DQ_CTRL_REG1_ZEN		(1 << 2)
#define LIS3L01DQ_CTRL_REG1_YEN		(1 << 1)
#define LIS3L01DQ_CTRL_REG1_XEN		(1 << 1)

#define LIS3L01DQ_CTRL_REG2_RES		(1 << 7)
#define LIS3L01DQ_CTRL_REG2_BDU		(1 << 6)
#define LIS3L01DQ_CTRL_REG2_BLE		(1 << 5)
#define LIS3L01DQ_CTRL_REG2_BOOT	(1 << 4)
#define LIS3L01DQ_CTRL_REG2_IEN		(1 << 3)
#define LIS3L01DQ_CTRL_REG2_DRDY	(1 << 2)
#define LIS3L01DQ_CTRL_REG2_SIM		(1 << 1)
#define LIS3L01DQ_CTRL_REG2_DAS		(1 << 0)

#define LIS3L02DQ_WAKE_UP_CFG_AOI	(1 << 7)
#define LIS3L02DQ_WAKE_UP_CFG_LIR	(1 << 6)
#define LIS3L02DQ_WAKE_UP_CFG_ZHIE	(1 << 5)
#define LIS3L02DQ_WAKE_UP_CFG_ZLIE	(1 << 4)
#define LIS3L02DQ_WAKE_UP_CFG_YHIE	(1 << 3)
#define LIS3L02DQ_WAKE_UP_CFG_YLIE	(1 << 2)
#define LIS3L02DQ_WAKE_UP_CFG_XHIE	(1 << 1)
#define LIS3L02DQ_WAKE_UP_CFG_XLIE	(1 << 0)

#endif /* _LIS3L02DQ_H */