[Tinyos-2-commits]
CVS: tinyos-2.x/tos/chips/atm128 Atm128Uart0C.nc, NONE,
1.1.2.1 Atm128UartP.nc, NONE, 1.1.2.1 HplAtm128Uart.nc, NONE,
1.1.2.1 HplAtm128UartC.nc, 1.1.2.5, 1.1.2.6 HplAtm128UartP.nc,
1.1.2.4, 1.1.2.5
Jonathan Hui
jwhui at users.sourceforge.net
Tue Oct 10 12:18:44 PDT 2006
Update of /cvsroot/tinyos/tinyos-2.x/tos/chips/atm128
In directory sc8-pr-cvs10.sourceforge.net:/tmp/cvs-serv7771/chips/atm128
Modified Files:
Tag: tinyos-2_0_devel-BRANCH
HplAtm128UartC.nc HplAtm128UartP.nc
Added Files:
Tag: tinyos-2_0_devel-BRANCH
Atm128Uart0C.nc Atm128UartP.nc HplAtm128Uart.nc
Log Message:
Match interfaces proposed in tep117.
--- NEW FILE: Atm128Uart0C.nc ---
/*
* Copyright (c) 2006 Arch Rock Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
* - Neither the name of the Arch Rock Corporation nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE
*/
/**
* @author Alec Woo <awoo at archrock.com>
* @author Jonathan Hui <jhui at archrock.com>
* @version $Revision: 1.1.2.1 $ $Date: 2006/10/10 19:18:42 $
*/
configuration Atm128Uart0C {
provides interface StdControl;
provides interface UartByte;
provides interface UartStream;
uses interface Counter<TMicro, uint16_t>;
}
implementation{
components new Atm128UartP() as UartP;
StdControl = UartP;
UartByte = UartP;
UartStream = UartP;
UartP.Counter = Counter;
components HplAtm128UartP as HplUartP;
UartP.HplUartTxControl -> HplUartP.Uart0TxControl;
UartP.HplUartRxControl -> HplUartP.Uart0RxControl;
UartP.HplUart -> HplUartP.HplUart0;
components PlatformC;
HplUartP.Atm128Calibrate -> PlatformC;
components McuSleepC;
HplUartP.McuPowerState -> McuSleepC;
components MainC;
MainC.SoftwareInit -> UartP;
}
--- NEW FILE: Atm128UartP.nc ---
/*
* Copyright (c) 2006 Arch Rock Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
* - Neither the name of the Arch Rock Corporation nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE
*/
/**
* @author Alec Woo <awoo at archrock.com>
* @author Jonathan Hui <jhui at archrock.com>
* @version $Revision: 1.1.2.1 $ $Date: 2006/10/10 19:18:42 $
*/
#include <Timer.h>
generic module Atm128UartP(){
provides interface Init;
provides interface StdControl;
provides interface UartByte;
provides interface UartStream;
uses interface StdControl as HplUartTxControl;
uses interface StdControl as HplUartRxControl;
uses interface HplAtm128Uart as HplUart;
uses interface Counter<TMicro, uint16_t>;
}
implementation{
norace uint8_t *m_tx_buf, *m_rx_buf;
norace uint16_t m_tx_len, m_rx_len;
norace uint16_t m_tx_pos, m_rx_pos;
norace uint16_t m_byte_time;
command error_t Init.init() {
if (PLATFORM_BAUDRATE == 19200UL)
m_byte_time = 200; // 1 TMicor ~= 2.12 us, one byte = 417us ~= 200
else if (PLATFORM_BAUDRATE == 57600UL)
m_byte_time = 68; // 1 TMicor ~= 2.12 us, one byte = 138us ~= 65
return SUCCESS;
}
command error_t StdControl.start(){
call HplUartTxControl.start();
return SUCCESS;
}
command error_t StdControl.stop(){
call HplUartTxControl.stop();
return SUCCESS;
}
async command error_t UartStream.enableReceiveInterrupt(){
call HplUartRxControl.start();
return SUCCESS;
}
async command error_t UartStream.disableReceiveInterrupt(){
call HplUartRxControl.stop();
return SUCCESS;
}
async command error_t UartStream.receive( uint8_t* buf, uint16_t len ){
if ( len == 0 )
return FAIL;
atomic {
if ( m_rx_buf )
return EBUSY;
m_rx_buf = buf;
m_rx_len = len;
m_rx_pos = 0;
}
return SUCCESS;
}
async event void HplUart.rxDone( uint8_t data ) {
if ( m_rx_buf ) {
m_rx_buf[ m_rx_pos++ ] = data;
if ( m_rx_pos >= m_rx_len ) {
uint8_t* buf = m_rx_buf;
m_rx_buf = NULL;
signal UartStream.receiveDone( buf, m_rx_len, SUCCESS );
}
}
else {
signal UartStream.receivedByte( data );
}
}
async command error_t UartStream.send( uint8_t *buf, uint16_t len){
if ( len == 0 )
return FAIL;
else if ( m_tx_buf )
return EBUSY;
m_tx_buf = buf;
m_tx_len = len;
m_tx_pos = 0;
call HplUart.tx( buf[ m_tx_pos++ ] );
return SUCCESS;
}
async event void HplUart.txDone() {
if ( m_tx_pos < m_tx_len ) {
call HplUart.tx( m_tx_buf[ m_tx_pos++ ] );
}
else {
uint8_t* buf = m_tx_buf;
m_tx_buf = NULL;
signal UartStream.sendDone( buf, m_tx_len, SUCCESS );
}
}
async command error_t UartByte.send( uint8_t byte ){
call HplUart.tx( byte );
while ( !call HplUart.isTxEmpty() );
return SUCCESS;
}
async command error_t UartByte.receive( uint8_t * byte, uint8_t timeout){
uint16_t timeout_micro = m_byte_time * timeout + 1;
uint16_t start;
start = call Counter.get();
while ( call HplUart.isRxEmpty() ) {
if ( ( call Counter.get() - start ) >= timeout_micro )
return FAIL;
}
*byte = call HplUart.rx();
return SUCCESS;
}
async event void Counter.overflow() {}
default async event void UartStream.sendDone( uint8_t* buf, uint16_t len, error_t error ){}
default async event void UartStream.receivedByte( uint8_t byte ){}
default async event void UartStream.receiveDone( uint8_t* buf, uint16_t len, error_t error ){}
}
--- NEW FILE: HplAtm128Uart.nc ---
/*
* Copyright (c) 2006 Arch Rock Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the
* distribution.
* - Neither the name of the Arch Rock Corporation nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
* OF THE POSSIBILITY OF SUCH DAMAGE
*/
/**
* @author Alec Woo <awoo at archrock.com>
* @author Jonathan Hui <jhui at archrock.com>
* @version $Revision: 1.1.2.1 $ $Date: 2006/10/10 19:18:42 $
*/
interface HplAtm128Uart {
async command error_t enableTxIntr();
async command error_t disableTxIntr();
async command error_t enableRxIntr();
async command error_t disableRxIntr();
async command bool isTxEmpty();
async command bool isRxEmpty();
async command void tx( uint8_t data );
async event void txDone();
async command uint8_t rx();
async event void rxDone( uint8_t data );
}
Index: HplAtm128UartC.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/atm128/HplAtm128UartC.nc,v
retrieving revision 1.1.2.5
retrieving revision 1.1.2.6
diff -C2 -d -r1.1.2.5 -r1.1.2.6
*** HplAtm128UartC.nc 22 Sep 2006 19:12:14 -0000 1.1.2.5
--- HplAtm128UartC.nc 10 Oct 2006 19:18:42 -0000 1.1.2.6
***************
*** 36,48 ****
{
provides {
- interface Init as Uart0Init;
interface StdControl as Uart0TxControl;
interface StdControl as Uart0RxControl;
! interface SerialByteComm as Uart0;
- interface Init as Uart1Init;
interface StdControl as Uart1TxControl;
interface StdControl as Uart1RxControl;
! interface SerialByteComm as Uart1;
}
}
--- 36,46 ----
{
provides {
interface StdControl as Uart0TxControl;
interface StdControl as Uart0RxControl;
! interface HplAtm128Uart as HplUart0;
interface StdControl as Uart1TxControl;
interface StdControl as Uart1RxControl;
! interface HplAtm128Uart as HplUart1;
}
}
***************
*** 51,60 ****
components HplAtm128UartP, PlatformC, McuSleepC;
- Uart0Init = HplAtm128UartP.Uart0Init;
Uart0TxControl = HplAtm128UartP.Uart0TxControl;
Uart0RxControl = HplAtm128UartP.Uart0RxControl;
Uart0 = HplAtm128UartP.Uart0;
- Uart1Init = HplAtm128UartP.Uart1Init;
Uart1TxControl = HplAtm128UartP.Uart1TxControl;
Uart1RxControl = HplAtm128UartP.Uart1RxControl;
--- 49,56 ----
***************
*** 63,65 ****
--- 59,66 ----
HplAtm128UartP.Atm128Calibrate -> PlatformC;
HplAtm128UartP.McuPowerState -> McuSleepC;
+
+ components MainC;
+ MainC.SoftwareInit -> HplAtm128UartP.Uart0Init;
+ MainC.SoftwareINit -> HplAtm128UartP.Uart1Init;
+
}
Index: HplAtm128UartP.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/atm128/HplAtm128UartP.nc,v
retrieving revision 1.1.2.4
retrieving revision 1.1.2.5
diff -C2 -d -r1.1.2.4 -r1.1.2.5
*** HplAtm128UartP.nc 22 Sep 2006 19:12:14 -0000 1.1.2.4
--- HplAtm128UartP.nc 10 Oct 2006 19:18:42 -0000 1.1.2.5
***************
*** 1,3 ****
! /// $Id$
/*
--- 1,38 ----
! /*
! * Copyright (c) 2006 Arch Rock Corporation
! * All rights reserved.
! *
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions
! * are met:
! * - Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * - Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the
! * distribution.
! * - Neither the name of the Arch Rock Corporation nor the names of
! * its contributors may be used to endorse or promote products derived
! * from this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
! * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
! * ARCH ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
! * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
! * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
! * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
! * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
! * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
! * OF THE POSSIBILITY OF SUCH DAMAGE
! */
!
! /**
! * @author Alec Woo <awoo at archrock.com>
! * @author Jonathan Hui <jhui at archrock.com>
! * @version $Revision$ $Date$
! */
/*
***************
*** 23,28 ****
*/
- #include <Atm128Uart.h>
-
/**
* Private component of the Atmega128 serial port HPL.
--- 58,61 ----
***************
*** 32,55 ****
*/
! module HplAtm128UartP
! {
! provides {
! interface Init as Uart0Init;
! interface StdControl as Uart0TxControl;
! interface StdControl as Uart0RxControl;
! interface SerialByteComm as Uart0;
! interface Init as Uart1Init;
! interface StdControl as Uart1TxControl;
! interface StdControl as Uart1RxControl;
! interface SerialByteComm as Uart1;
! }
! uses {
! interface Atm128Calibrate;
! interface McuPowerState;
! }
}
! implementation
! {
//=== Uart Init Commands. ====================================
command error_t Uart0Init.init() {
--- 65,88 ----
*/
! #include <Atm128Uart.h>
!
! module HplAtm128UartP {
!
! provides interface Init as Uart0Init;
! provides interface StdControl as Uart0TxControl;
! provides interface StdControl as Uart0RxControl;
! provides interface HplAtm128Uart as HplUart0;
! provides interface Init as Uart1Init;
! provides interface StdControl as Uart1TxControl;
! provides interface StdControl as Uart1RxControl;
! provides interface HplAtm128Uart as HplUart1;
!
! uses interface Atm128Calibrate;
! uses interface McuPowerState;
!
}
! implementation {
!
//=== Uart Init Commands. ====================================
command error_t Uart0Init.init() {
***************
*** 112,116 ****
--- 145,208 ----
return SUCCESS;
}
+
+ async command error_t HplUart0.enableTxIntr() {
+ Atm128UartControl_t ctrl;
+ ctrl.flat = UCSR0B;
+ ctrl.bits.txen = 1;
+ UCSR0B = ctrl.flat;
+ return SUCCESS;
+ }
+
+ async command error_t HplUart0.disableTxIntr(){
+ Atm128UartControl_t ctrl;
+ ctrl.flat = UCSR0B;
+ ctrl.bits.txen = 0;
+ UCSR0B = ctrl.flat;
+ return SUCCESS;
+ }
+
+ async command error_t HplUart0.enableRxIntr(){
+ Atm128UartControl_t ctrl;
+ ctrl.flat = UCSR0B;
+ ctrl.bits.rxen = 1;
+ UCSR0B = ctrl.flat;
+ return SUCCESS;
+ }
+ async command error_t HplUart0.disableRxIntr(){
+ Atm128UartControl_t ctrl;
+ ctrl.flat = UCSR0B;
+ ctrl.bits.rxen = 0;
+ UCSR0B = ctrl.flat;
+ return SUCCESS;
+ }
+
+ async command bool HplUart0.isTxEmpty(){
+ return READ_BIT(UCSR0A, TXC);
+ }
+
+ async command bool HplUart0.isRxEmpty(){
+ return !READ_BIT(UCSR0A, RXC);
+ }
+
+ async command uint8_t HplUart0.rx(){
+ return UDR0;
+ }
+
+ async command void HplUart0.tx(uint8_t data) {
+ atomic{
+ UDR0 = data;
+ SET_BIT(UCSR0A, TXC);
+ }
+ }
+
+ AVR_ATOMIC_HANDLER(SIG_UART0_RECV) {
+ if (READ_BIT(UCSR0A, RXC))
+ signal HplUart0.rxDone(UDR0);
+ }
+
+ AVR_NONATOMIC_HANDLER(SIG_UART0_TRANS) {
+ signal HplUart0.txDone();
+ }
command error_t Uart1Init.init() {
***************
*** 173,228 ****
return SUCCESS;
}
! /* //=== Uart Stop Commands. ==================================== */
! /* async command error_t Uart0.stop() { */
! /* UCSR0A = 0; */
! /* UCSR0B = 0; */
! /* UCSR0C = 0; */
! /* return SUCCESS; */
! /* } */
! /* async command error_t Uart1.stop() { */
! /* UCSR0A = 0; */
! /* UCSR0B = 0; */
! /* UCSR0C = 0; */
! /* return SUCCESS; */
! /* } */
! //=== Uart Put Commands. ====================================
! async command error_t Uart0.put(uint8_t data) {
! atomic{
! UDR0 = data;
! SET_BIT(UCSR0A, TXC);
! }
return SUCCESS;
}
! async command error_t Uart1.put(uint8_t data) {
atomic{
UDR1 = data;
SET_BIT(UCSR1A, TXC);
}
- return SUCCESS;
}
- //=== Uart Get Events. ======================================
- default async event void Uart0.get(uint8_t data) { return; }
- AVR_ATOMIC_HANDLER(SIG_UART0_RECV) {
- if (READ_BIT(UCSR0A, RXC))
- signal Uart0.get(UDR0);
- }
- default async event void Uart1.get(uint8_t data) { return; }
AVR_ATOMIC_HANDLER(SIG_UART1_RECV) {
if (READ_BIT(UCSR1A, RXC))
! signal Uart1.get(UDR1);
! }
!
! //=== Uart Put Done Events. =================================
! default async event void Uart0.putDone() { return; }
! AVR_NONATOMIC_HANDLER(SIG_UART0_TRANS) {
! signal Uart0.putDone();
}
! default async event void Uart1.putDone() { return; }
AVR_NONATOMIC_HANDLER(SIG_UART1_TRANS) {
! signal Uart1.putDone();
}
!
}
--- 265,333 ----
return SUCCESS;
}
+
+ async command error_t HplUart1.enableTxIntr() {
+ Atm128UartControl_t ctrl;
+ ctrl.flat = UCSR1B;
+ ctrl.bits.txen = 1;
+ UCSR1B = ctrl.flat;
+ return SUCCESS;
+ }
! async command error_t HplUart1.disableTxIntr() {
! Atm128UartControl_t ctrl;
! ctrl.flat = UCSR1B;
! ctrl.bits.txen = 0;
! UCSR1B = ctrl.flat;
! return SUCCESS;
! }
! async command error_t HplUart1.enableRxIntr() {
! Atm128UartControl_t ctrl;
! ctrl.flat = UCSR1B;
! ctrl.bits.rxen = 1;
! UCSR1B = ctrl.flat;
return SUCCESS;
}
!
! async command error_t HplUart1.disableRxIntr() {
! Atm128UartControl_t ctrl;
! ctrl.flat = UCSR1B;
! ctrl.bits.rxen = 0;
! UCSR1B = ctrl.flat;
! return SUCCESS;
! }
!
! async command bool HplUart1.isTxEmpty() {
! return READ_BIT(UCSR1A, TXC);
! }
!
! async command bool HplUart1.isRxEmpty() {
! return !READ_BIT(UCSR1A, RXC);
! }
!
! async command uint8_t HplUart1.rx(){
! return UDR1;
! }
!
! async command void HplUart1.tx(uint8_t data) {
atomic{
UDR1 = data;
SET_BIT(UCSR1A, TXC);
}
}
AVR_ATOMIC_HANDLER(SIG_UART1_RECV) {
if (READ_BIT(UCSR1A, RXC))
! signal HplUart1.rxDone(UDR1);
}
!
AVR_NONATOMIC_HANDLER(SIG_UART1_TRANS) {
! signal HplUart1.txDone();
}
!
! default async event void HplUart0.txDone() {}
! default async event void HplUart0.rxDone(uint8_t data) {}
! default async event void HplUart1.txDone() {}
! default async event void HplUart1.rxDone(uint8_t data) {}
!
}
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