[Tinyos-2-commits] CVS: tinyos-2.x/tos/chips/msp430/timer
Msp430ClockInit.nc, 1.2, 1.3 Msp430ClockP.nc, 1.5,
1.6 Msp430DcoSpec.h, 1.1, 1.2
Vlado Handziski
vlahan at users.sourceforge.net
Mon Jul 9 17:24:33 PDT 2007
Update of /cvsroot/tinyos/tinyos-2.x/tos/chips/msp430/timer
In directory sc8-pr-cvs10.sourceforge.net:/tmp/cvs-serv6336/chips/msp430/timer
Modified Files:
Msp430ClockInit.nc Msp430ClockP.nc Msp430DcoSpec.h
Log Message:
- Set DCO calibrate target back to 4096 binary kHz
- Add new command/event in Msp430ClockInit to enable overriding of the startup values for the DCO calibrate routine
- Modify PlatformC/PlatformP in platform/telosa to use intermediate configuration MoteClockC that can be used to override the default clock initialization via MoteClockP
- Add MoteClockC and MoteClockP in platform/telosb to allow for usage of the DCOR flag / ROSC on tmote sky. The overriding configuration is currently disabled pending closer review of the calibration routine behavior for the new setup and other potential gotchas
Index: Msp430ClockInit.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/msp430/timer/Msp430ClockInit.nc,v
retrieving revision 1.2
retrieving revision 1.3
diff -C2 -d -r1.2 -r1.3
*** Msp430ClockInit.nc 12 Jul 2006 17:01:44 -0000 1.2
--- Msp430ClockInit.nc 10 Jul 2007 00:24:31 -0000 1.3
***************
*** 22,33 ****
--- 22,36 ----
/**
* @author Cory Sharp <cssharp at eecs.berkeley.edu>
+ * @author Vlado Handziski <handzisk at tkn.tu-berlin.de>
*/
interface Msp430ClockInit
{
+ event void setupDcoCalibrate();
event void initClocks();
event void initTimerA();
event void initTimerB();
+ command void defaultSetupDcoCalibrate();
command void defaultInitClocks();
command void defaultInitTimerA();
Index: Msp430ClockP.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/msp430/timer/Msp430ClockP.nc,v
retrieving revision 1.5
retrieving revision 1.6
diff -C2 -d -r1.5 -r1.6
*** Msp430ClockP.nc 5 Apr 2007 05:53:52 -0000 1.5
--- Msp430ClockP.nc 10 Jul 2007 00:24:31 -0000 1.6
***************
*** 23,26 ****
--- 23,27 ----
/**
* @author Cory Sharp <cssharp at eecs.berkeley.edu>
+ * @author Vlado Handziski <handzisk at tkn.tu-berlind.de>
*/
***************
*** 45,52 ****
{
ACLK_CALIB_PERIOD = 8,
! ACLK_HZ = 32768U,
! TARGET_DCO_DELTA = (TARGET_DCO_HZ / ACLK_HZ) * ACLK_CALIB_PERIOD,
};
command void Msp430ClockInit.defaultInitClocks()
{
--- 46,65 ----
{
ACLK_CALIB_PERIOD = 8,
! TARGET_DCO_DELTA = (TARGET_DCO_KHZ / ACLK_KHZ) * ACLK_CALIB_PERIOD,
};
+
+ command void Msp430ClockInit.defaultSetupDcoCalibrate()
+ {
+
+ // --- setup ---
+
+ TACTL = TASSEL1 | MC1; // source SMCLK, continuous mode, everything else 0
+ TBCTL = TBSSEL0 | MC1;
+ BCSCTL1 = XT2OFF | RSEL2;
+ BCSCTL2 = 0;
+ TBCCTL0 = CM0;
+ }
+
command void Msp430ClockInit.defaultInitClocks()
{
***************
*** 100,103 ****
--- 113,121 ----
}
+ default event void Msp430ClockInit.setupDcoCalibrate()
+ {
+ call Msp430ClockInit.defaultSetupDcoCalibrate();
+ }
+
default event void Msp430ClockInit.initClocks()
{
***************
*** 175,186 ****
int step;
- // --- setup ---
-
- TACTL = TASSEL1 | MC1; // source SMCLK, continuous mode, everything else 0
- TBCTL = TBSSEL0 | MC1;
- BCSCTL1 = XT2OFF | RSEL2;
- BCSCTL2 = 0;
- TBCCTL0 = CM0;
-
// --- calibrate ---
--- 193,196 ----
***************
*** 212,215 ****
--- 222,226 ----
atomic
{
+ signal Msp430ClockInit.setupDcoCalibrate();
busyCalibrateDco();
signal Msp430ClockInit.initClocks();
Index: Msp430DcoSpec.h
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/msp430/timer/Msp430DcoSpec.h,v
retrieving revision 1.1
retrieving revision 1.2
diff -C2 -d -r1.1 -r1.2
*** Msp430DcoSpec.h 5 Apr 2007 05:53:52 -0000 1.1
--- Msp430DcoSpec.h 10 Jul 2007 00:24:31 -0000 1.2
***************
*** 31,35 ****
* Specify the target cpu clock speed of your platform by overriding this file.
*
! * Be aware that tinyos relies on binary 4Mhz, that is 4096000 Hz. Some
* platforms have an external high frequency oscilator to generate the SMCLK
* (e.g. eyesIFX, and possibly future ZigBee compliant nodes). These
--- 31,35 ----
* Specify the target cpu clock speed of your platform by overriding this file.
*
! * Be aware that tinyos relies on binary 4MHz, that is 4096 binary kHz. Some
* platforms have an external high frequency oscilator to generate the SMCLK
* (e.g. eyesIFX, and possibly future ZigBee compliant nodes). These
***************
*** 45,49 ****
#define MS430DCOSPEC_H
! #define TARGET_DCO_HZ 4096000 // the cpu clock rate in Hz
!
#endif
--- 45,49 ----
#define MS430DCOSPEC_H
! #define TARGET_DCO_KHZ 4096 // the target DCO clock rate in binary kHz
! #define ACLK_KHZ 32 // the ACLK rate in binary kHz
#endif
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