[Tinyos-2-commits] CVS: tinyos-2.x/tos/chips/atm128/timer
HplAtm128TimerAsync.nc, NONE, 1.1 Atm128AlarmAsyncC.nc, 1.1,
1.2 Atm128AlarmAsyncP.nc, 1.4, 1.5 Atm128Timer.h, 1.4,
1.5 HplAtm128Timer0AsyncC.nc, 1.6,
1.7 HplAtm128Timer0AsyncP.nc, 1.1, 1.2
David Gay
idgay at users.sourceforge.net
Thu Mar 29 14:07:28 PDT 2007
Update of /cvsroot/tinyos/tinyos-2.x/tos/chips/atm128/timer
In directory sc8-pr-cvs10.sourceforge.net:/tmp/cvs-serv21267
Modified Files:
Atm128AlarmAsyncC.nc Atm128AlarmAsyncP.nc Atm128Timer.h
HplAtm128Timer0AsyncC.nc HplAtm128Timer0AsyncP.nc
Added Files:
HplAtm128TimerAsync.nc
Log Message:
a nicer version, w/ cleaner HPL access
in particular, HPL for timer0 now has less magic in it (this means that
users of it have to be more aware of the asynchronous timer access rules,
though)
--- NEW FILE: HplAtm128TimerAsync.nc ---
// $Id: HplAtm128TimerAsync.nc,v 1.1 2007/03/29 21:07:25 idgay Exp $
/*
* Copyright (c) 2007 Intel Corporation
* All rights reserved.
*
* This file is distributed under the terms in the attached INTEL-LICENSE
* file. If you do not find these files, copies can be found by writing to
* Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
* 94704. Attention: Intel License Inquiry.
*/
/**
*
* @author David Gay
*/
interface HplAtm128TimerAsync
{
/**
* Read timer0 asynchronous status register (ASSR)
* @return Current value of ASSR
*/
async command Atm128Assr_t getAssr();
/**
* Set timer0 asynchronous status register (ASSR)
* @param x New value for ASSR
*/
async command void setAssr(Atm128Assr_t x);
/**
* Turn on timer 0 asynchronous mode
*/
async command void setTimer0Asynchronous();
/**
* Check if control register TCCR0 is busy (should not be updated if true)
* @return TRUE if TCCR0 is busy, FALSE otherwise (can be updated)
*/
async command bool controlBusy();
/**
* Check if compare register OCR0 is busy (should not be updated if true)
* @return TRUE if OCR0 is busy, FALSE otherwise (can be updated)
*/
async command bool compareBusy();
/**
* Check if current timer value (TCNT0) is busy (should not be updated if true)
* @return TRUE if TCNT0 is busy, FALSE otherwise (can be updated)
*/
async command bool countBusy();
}
Index: Atm128AlarmAsyncC.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/atm128/timer/Atm128AlarmAsyncC.nc,v
retrieving revision 1.1
retrieving revision 1.2
diff -C2 -d -r1.1 -r1.2
*** Atm128AlarmAsyncC.nc 26 Mar 2007 21:23:20 -0000 1.1
--- Atm128AlarmAsyncC.nc 29 Mar 2007 21:07:25 -0000 1.2
***************
*** 12,16 ****
Init = Atm128AlarmAsyncP;
- Init = HplAtm128Timer0AsyncC;
Alarm = Atm128AlarmAsyncP;
Counter = Atm128AlarmAsyncP;
--- 12,15 ----
***************
*** 19,21 ****
--- 18,21 ----
Atm128AlarmAsyncP.TimerCtrl -> HplAtm128Timer0AsyncC;
Atm128AlarmAsyncP.Compare -> HplAtm128Timer0AsyncC;
+ Atm128AlarmAsyncP.TimerAsync -> HplAtm128Timer0AsyncC;
}
Index: Atm128AlarmAsyncP.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/atm128/timer/Atm128AlarmAsyncP.nc,v
retrieving revision 1.4
retrieving revision 1.5
diff -C2 -d -r1.4 -r1.5
*** Atm128AlarmAsyncP.nc 29 Mar 2007 17:12:15 -0000 1.4
--- Atm128AlarmAsyncP.nc 29 Mar 2007 21:07:25 -0000 1.5
***************
*** 1,5 ****
// $Id$
/*
! * Copyright (c) 2005-2006 Intel Corporation
* All rights reserved.
*
--- 1,5 ----
// $Id$
/*
! * Copyright (c) 2007 Intel Corporation
* All rights reserved.
*
***************
*** 18,21 ****
--- 18,23 ----
* Martin Turon) directly builds a 32-bit alarm and counter on top of timer 0
* and never lets timer 0 overflow.
+ *
+ * @author David Gay
*/
generic module Atm128AlarmAsyncP(typedef precision, int divider) {
***************
*** 29,32 ****
--- 31,35 ----
interface HplAtm128TimerCtrl8 as TimerCtrl;
interface HplAtm128Compare<uint8_t> as Compare;
+ interface HplAtm128TimerAsync as TimerAsync;
}
}
***************
*** 54,63 ****
Atm128TimerControl_t x;
! call Compare.start();
x.flat = 0;
x.bits.cs = divider;
x.bits.wgm1 = 1; /* We use the clear-on-compare mode */
call TimerCtrl.setControl(x);
! call Compare.set(MAXT);
setInterrupt();
}
--- 57,67 ----
Atm128TimerControl_t x;
! call TimerAsync.setTimer0Asynchronous();
x.flat = 0;
x.bits.cs = divider;
x.bits.wgm1 = 1; /* We use the clear-on-compare mode */
call TimerCtrl.setControl(x);
! call Compare.set(MAXT); /* setInterrupt needs a valid value here */
! call Compare.start();
setInterrupt();
}
***************
*** 67,78 ****
/* Set compare register for timer 0 to n. But increment n by 1 if TCNT0
reaches this value before we can set the compare register.
- Direct register access used because the HPL doesn't allow us to do this.
*/
void setOcr0(uint8_t n) {
! while (ASSR & 1 << OCR0UB)
;
! if (n == TCNT0)
n++;
- #if 1
/* Support for overflow. Force interrupt at wrap around value.
This does not cause a backwards-in-time value as we do this
--- 71,80 ----
/* Set compare register for timer 0 to n. But increment n by 1 if TCNT0
reaches this value before we can set the compare register.
*/
void setOcr0(uint8_t n) {
! while (call TimerAsync.compareBusy())
;
! if (n == call Timer.get())
n++;
/* Support for overflow. Force interrupt at wrap around value.
This does not cause a backwards-in-time value as we do this
***************
*** 80,85 ****
if (base + n + 1 < base)
n = -base - 1;
! #endif
! OCR0 = n;
}
--- 82,86 ----
if (base + n + 1 < base)
n = -base - 1;
! call Compare.set(n);
}
***************
*** 150,157 ****
base += call Compare.get() + 1; // interrupt is 1ms late
setInterrupt();
- #if 1
if (!base)
overflow();
- #endif
}
--- 151,156 ----
***************
*** 178,192 ****
async command bool Counter.isOverflowPending() {
- #if 0
- return FALSE;
- #else
atomic
return (call TimerCtrl.getInterruptFlag()).bits.ocf0 &&
!(base + call Compare.get() + 1);
- #endif
}
async command void Counter.clearOverflow() {
- #if 1
atomic
if (call Counter.isOverflowPending())
--- 177,186 ----
***************
*** 196,200 ****
setInterrupt();
}
- #endif
}
--- 190,193 ----
Index: Atm128Timer.h
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/atm128/timer/Atm128Timer.h,v
retrieving revision 1.4
retrieving revision 1.5
diff -C2 -d -r1.4 -r1.5
*** Atm128Timer.h 12 Dec 2006 18:23:04 -0000 1.4
--- Atm128Timer.h 29 Mar 2007 21:07:25 -0000 1.5
***************
*** 119,123 ****
uint8_t rsvd : 4; //!< Reserved
} bits;
! } Atm128_ASSR_t;
/* Timer/Counter Interrupt Mask Register */
--- 119,123 ----
uint8_t rsvd : 4; //!< Reserved
} bits;
! } Atm128Assr_t;
/* Timer/Counter Interrupt Mask Register */
Index: HplAtm128Timer0AsyncC.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/atm128/timer/HplAtm128Timer0AsyncC.nc,v
retrieving revision 1.6
retrieving revision 1.7
diff -C2 -d -r1.6 -r1.7
*** HplAtm128Timer0AsyncC.nc 14 Dec 2006 01:24:48 -0000 1.6
--- HplAtm128Timer0AsyncC.nc 29 Mar 2007 21:07:25 -0000 1.7
***************
*** 36,39 ****
--- 36,40 ----
*
* @author Philip Levis
+ * @author David Gay
*/
***************
*** 43,51 ****
{
provides {
- interface Init @atleastonce();
// 8-bit Timers
interface HplAtm128Timer<uint8_t> as Timer;
interface HplAtm128TimerCtrl8 as TimerCtrl;
interface HplAtm128Compare<uint8_t> as Compare;
}
}
--- 44,52 ----
{
provides {
// 8-bit Timers
interface HplAtm128Timer<uint8_t> as Timer;
interface HplAtm128TimerCtrl8 as TimerCtrl;
interface HplAtm128Compare<uint8_t> as Compare;
+ interface HplAtm128TimerAsync as TimerAsync;
}
}
***************
*** 57,64 ****
McuSleepC.McuPowerOverride -> HplAtm128Timer0AsyncP;
- Init = HplAtm128Timer0AsyncP;
Timer = HplAtm128Timer0AsyncP;
TimerCtrl = HplAtm128Timer0AsyncP;
Compare = HplAtm128Timer0AsyncP;
!
}
--- 58,64 ----
McuSleepC.McuPowerOverride -> HplAtm128Timer0AsyncP;
Timer = HplAtm128Timer0AsyncP;
TimerCtrl = HplAtm128Timer0AsyncP;
Compare = HplAtm128Timer0AsyncP;
! TimerAsync = HplAtm128Timer0AsyncP;
}
Index: HplAtm128Timer0AsyncP.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/atm128/timer/HplAtm128Timer0AsyncP.nc,v
retrieving revision 1.1
retrieving revision 1.2
diff -C2 -d -r1.1 -r1.2
*** HplAtm128Timer0AsyncP.nc 14 Dec 2006 01:24:48 -0000 1.1
--- HplAtm128Timer0AsyncP.nc 29 Mar 2007 21:07:25 -0000 1.2
***************
*** 37,41 ****
module HplAtm128Timer0AsyncP {
provides {
- interface Init @atleastonce();
// 8-bit Timers
interface HplAtm128Timer<uint8_t> as Timer;
--- 37,40 ----
***************
*** 43,55 ****
interface HplAtm128Compare<uint8_t> as Compare;
interface McuPowerOverride;
}
}
implementation
{
- command error_t Init.init() {
- SET_BIT(ASSR, AS0); // set Timer/Counter0 to asynchronous mode
- return SUCCESS;
- }
-
//=== Read the current timer value. ===================================
async command uint8_t Timer.get() { return TCNT0; }
--- 42,50 ----
interface HplAtm128Compare<uint8_t> as Compare;
interface McuPowerOverride;
+ interface HplAtm128TimerAsync as TimerAsync;
}
}
implementation
{
//=== Read the current timer value. ===================================
async command uint8_t Timer.get() { return TCNT0; }
***************
*** 57,62 ****
//=== Set/clear the current timer value. ==============================
async command void Timer.set(uint8_t t) {
- while (ASSR & 1 << TCN0UB)
- ;
TCNT0 = t;
}
--- 52,55 ----
***************
*** 82,87 ****
//=== Write the control registers. ====================================
async command void TimerCtrl.setControl( Atm128TimerControl_t x ) {
- while (ASSR & 1 << TCR0UB)
- ;
TCCR0 = x.flat;
}
--- 75,78 ----
***************
*** 143,156 ****
//=== Write the compare registers. ====================================
async command void Compare.set(uint8_t t) {
! atomic
! {
! while (ASSR & 1 << OCR0UB)
! ;
! OCR0 = t;
! }
}
//=== Timer interrupts signals ========================================
! void stabiliseTimer0() {
TCCR0 = TCCR0;
while (ASSR & 1 << TCR0UB)
--- 134,142 ----
//=== Write the compare registers. ====================================
async command void Compare.set(uint8_t t) {
! OCR0 = t;
}
//=== Timer interrupts signals ========================================
! inline void stabiliseTimer0() {
TCCR0 = TCCR0;
while (ASSR & 1 << TCR0UB)
***************
*** 175,179 ****
// (we don't need to worry about reentering sleep mode too early,
// as the wake ups from timer0 wait at least one TOSC1 cycle
! // anyway - see the stabiliseTimer0 function in HplAtm128Timer0AsyncC)
while (ASSR & (1 << TCN0UB | 1 << OCR0UB | 1 << TCR0UB))
;
--- 161,165 ----
// (we don't need to worry about reentering sleep mode too early,
// as the wake ups from timer0 wait at least one TOSC1 cycle
! // anyway - see the stabiliseTimer0 function)
while (ASSR & (1 << TCN0UB | 1 << OCR0UB | 1 << TCR0UB))
;
***************
*** 200,202 ****
--- 186,213 ----
signal Timer.overflow();
}
+
+ // Asynchronous status register support
+ async command Atm128Assr_t TimerAsync.getAssr() {
+ return *(Atm128Assr_t *)&ASSR;
+ }
+
+ async command void TimerAsync.setAssr(Atm128Assr_t x) {
+ ASSR = x.flat;
+ }
+
+ async command void TimerAsync.setTimer0Asynchronous() {
+ ASSR |= 1 << AS0;
+ }
+
+ async command bool TimerAsync.controlBusy() {
+ return (ASSR & (1 << TCR0UB)) != 0;
+ }
+
+ async command bool TimerAsync.compareBusy() {
+ return (ASSR & (1 << OCR0UB)) != 0;
+ }
+
+ async command bool TimerAsync.countBusy() {
+ return (ASSR & (1 << TCN0UB)) != 0;
+ }
}
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