[Tinyos-2-commits] CVS: tinyos-2.x/tos/chips/atm128/timer Atm128AlarmAsyncC.nc, 1.2, 1.3

[David Gay]

Update of /cvsroot/tinyos/tinyos-2.x/tos/chips/atm128/timer
In directory sc8-pr-cvs10.sourceforge.net:/tmp/cvs-serv12945/timer

Modified Files:
	Atm128AlarmAsyncC.nc 
Log Message:
comment missing


Index: Atm128AlarmAsyncC.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/atm128/timer/Atm128AlarmAsyncC.nc,v
retrieving revision 1.2
retrieving revision 1.3
diff -C2 -d -r1.2 -r1.3
*** Atm128AlarmAsyncC.nc	29 Mar 2007 21:07:25 -0000	1.2
--- Atm128AlarmAsyncC.nc	23 May 2007 22:49:08 -0000	1.3
***************
*** 1,2 ****
--- 1,24 ----
+ // $Id$
+ /*
+  * Copyright (c) 2007 Intel Corporation
+  * All rights reserved.
+  *
+  * This file is distributed under the terms in the attached INTEL-LICENSE     
+  * file. If you do not find these files, copies can be found by writing to
+  * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
+  * 94704.  Attention:  Intel License Inquiry.
+  */
+ /**
+  * Build a 32-bit alarm and counter from the atmega128's 8-bit timer 0
+  * in asynchronous mode. Attempting to use the generic Atm128AlarmC
+  * component and the generic timer components runs into problems
+  * apparently related to letting timer 0 overflow.
+  * 
+  * So, instead, this version (inspired by the 1.x code and a remark from
+  * Martin Turon) directly builds a 32-bit alarm and counter on top of timer 0
+  * and never lets timer 0 overflow.
+  *
+  * @author David Gay
+  */
  generic configuration Atm128AlarmAsyncC(typedef precision, int divider) {
    provides {