[Tinyos-2-commits] CVS: tinyos-2.x/tos/chips/atm128 Atm128UartP.nc, 1.1.2.4, 1.1.2.5 HplAtm128UartP.nc, 1.1.2.7, 1.1.2.8

Alec Woo alecwoo at users.sourceforge.net
Fri May 25 16:51:30 PDT 2007 

Update of /cvsroot/tinyos/tinyos-2.x/tos/chips/atm128
In directory sc8-pr-cvs10.sourceforge.net:/tmp/cvs-serv23141

Modified Files:
      Tag: tinyos-2_0_devel-BRANCH
	Atm128UartP.nc HplAtm128UartP.nc 
Log Message:
Checked over the logic of the implementation.
Compiled with the TestCase.  
We need to run over the UART regression test to make sure this is ok.


Index: Atm128UartP.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/atm128/Atm128UartP.nc,v
retrieving revision 1.1.2.4
retrieving revision 1.1.2.5
diff -C2 -d -r1.1.2.4 -r1.1.2.5
*** Atm128UartP.nc	7 Nov 2006 23:14:59 -0000	1.1.2.4
--- Atm128UartP.nc	25 May 2007 23:51:28 -0000	1.1.2.5
***************
*** 58,61 ****
--- 58,63 ----
    norace uint16_t m_tx_pos, m_rx_pos;
    norace uint16_t m_byte_time;
+   norace uint8_t m_rx_intr;
+   norace uint8_t m_tx_intr;
    
    command error_t Init.init() {
***************
*** 68,73 ****
--- 70,83 ----
    
    command error_t StdControl.start(){
+     /* make sure interupts are off and set flags */
+     call HplUart.disableTxIntr();
+     call HplUart.disableRxIntr();
+     m_rx_intr = 0;
+     m_tx_intr = 0;
+ 
+     /* enable tx/rx */
      call HplUartTxControl.start();
      call HplUartRxControl.start();
+ 
      return SUCCESS;
    }
***************
*** 80,89 ****
  
    async command error_t UartStream.enableReceiveInterrupt(){
!     call HplUartRxControl.start();
      return SUCCESS;
    }
  
    async command error_t UartStream.disableReceiveInterrupt(){
!     call HplUartRxControl.stop();
      return SUCCESS;
    }
--- 90,105 ----
  
    async command error_t UartStream.enableReceiveInterrupt(){
!     atomic{
!       m_rx_intr = 3;
!       call HplUart.enableRxIntr();
!     }
      return SUCCESS;
    }
  
    async command error_t UartStream.disableReceiveInterrupt(){
!     atomic{
!       call HplUart.disableRxIntr();
!       m_rx_intr = 0;
!     }
      return SUCCESS;
    }
***************
*** 99,102 ****
--- 115,120 ----
        m_rx_len = len;
        m_rx_pos = 0;
+       m_rx_intr |= 1;
+       call HplUart.enableRxIntr();
      }
      
***************
*** 111,115 ****
        if ( m_rx_pos >= m_rx_len ) {
  	uint8_t* buf = m_rx_buf;
! 	m_rx_buf = NULL;
  	signal UartStream.receiveDone( buf, m_rx_len, SUCCESS );
        }
--- 129,139 ----
        if ( m_rx_pos >= m_rx_len ) {
  	uint8_t* buf = m_rx_buf;
! 	atomic{
! 	  m_rx_buf = NULL;
! 	  if(m_rx_intr != 3){
! 	    call HplUart.disableRxIntr();
! 	    m_rx_intr = 0;
! 	  }
! 	}
  	signal UartStream.receiveDone( buf, m_rx_len, SUCCESS );
        }
***************
*** 131,134 ****
--- 155,160 ----
      m_tx_len = len;
      m_tx_pos = 0;
+     m_tx_intr = 1;
+     call HplUart.enableTxIntr();
      call HplUart.tx( buf[ m_tx_pos++ ] );
      
***************
*** 145,148 ****
--- 171,176 ----
        uint8_t* buf = m_tx_buf;
        m_tx_buf = NULL;
+       m_tx_intr = 0;
+       call HplUart.disableTxIntr();
        signal UartStream.sendDone( buf, m_tx_len, SUCCESS );
      }
***************
*** 151,154 ****
--- 179,185 ----
  
    async command error_t UartByte.send( uint8_t byte ){
+     if(m_tx_intr)
+       return FAIL;
+ 
      call HplUart.tx( byte );
      while ( !call HplUart.isTxEmpty() );
***************
*** 157,164 ****
    
    async command error_t UartByte.receive( uint8_t * byte, uint8_t timeout){
!     
      uint16_t timeout_micro = m_byte_time * timeout + 1;
      uint16_t start;
      
      start = call Counter.get();
      while ( call HplUart.isRxEmpty() ) {
--- 188,198 ----
    
    async command error_t UartByte.receive( uint8_t * byte, uint8_t timeout){
! 
      uint16_t timeout_micro = m_byte_time * timeout + 1;
      uint16_t start;
      
+     if(m_rx_intr)
+       return FAIL;
+ 
      start = call Counter.get();
      while ( call HplUart.isRxEmpty() ) {

Index: HplAtm128UartP.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/atm128/HplAtm128UartP.nc,v
retrieving revision 1.1.2.7
retrieving revision 1.1.2.8
diff -C2 -d -r1.1.2.7 -r1.1.2.8
*** HplAtm128UartP.nc	7 Nov 2006 23:14:59 -0000	1.1.2.7
--- HplAtm128UartP.nc	25 May 2007 23:51:28 -0000	1.1.2.8
***************
*** 106,110 ****
  
    command error_t Uart0TxControl.start() {
-     SET_BIT(UCSR0B, TXCIE);
      SET_BIT(UCSR0B, TXEN);
      call McuPowerState.update();
--- 106,109 ----
***************
*** 113,117 ****
  
    command error_t Uart0TxControl.stop() {
-     CLR_BIT(UCSR0B, TXCIE);
      CLR_BIT(UCSR0B, TXEN);
      call McuPowerState.update();
--- 112,115 ----
***************
*** 120,124 ****
  
    command error_t Uart0RxControl.start() {
-     SET_BIT(UCSR0B, RXCIE);
      SET_BIT(UCSR0B, RXEN);
      call McuPowerState.update();
--- 118,121 ----
***************
*** 127,131 ****
  
    command error_t Uart0RxControl.stop() {
-     CLR_BIT(UCSR0B, RXCIE);
      CLR_BIT(UCSR0B, RXEN);
      call McuPowerState.update();
--- 124,127 ----
***************
*** 134,153 ****
    
    async command error_t HplUart0.enableTxIntr() {
!     SET_BIT(UCSR0B, TXEN);
      return SUCCESS;
    }
    
    async command error_t HplUart0.disableTxIntr(){
!     CLR_BIT(UCSR0B, TXEN);
      return SUCCESS;
    }
    
    async command error_t HplUart0.enableRxIntr(){
!     SET_BIT(UCSR0B, RXEN);
      return SUCCESS;
    }
  
    async command error_t HplUart0.disableRxIntr(){
!     CLR_BIT(UCSR0B, RXEN);
      return SUCCESS;
    }
--- 130,150 ----
    
    async command error_t HplUart0.enableTxIntr() {
!     SET_BIT(UCSR0A, TXC);
!     SET_BIT(UCSR0B, TXCIE);
      return SUCCESS;
    }
    
    async command error_t HplUart0.disableTxIntr(){
!     CLR_BIT(UCSR0B, TXCIE);
      return SUCCESS;
    }
    
    async command error_t HplUart0.enableRxIntr(){
!     SET_BIT(UCSR0B, RXCIE);
      return SUCCESS;
    }
  
    async command error_t HplUart0.disableRxIntr(){
!     CLR_BIT(UCSR0B, RXCIE);
      return SUCCESS;
    }
***************
*** 203,207 ****
  
    command error_t Uart1TxControl.start() {
-     SET_BIT(UCSR1B, TXCIE);
      SET_BIT(UCSR1B, TXEN);
      call McuPowerState.update();
--- 200,203 ----
***************
*** 210,214 ****
  
    command error_t Uart1TxControl.stop() {
-     CLR_BIT(UCSR1B, TXCIE);
      CLR_BIT(UCSR1B, TXEN);
      call McuPowerState.update();
--- 206,209 ----
***************
*** 217,221 ****
  
    command error_t Uart1RxControl.start() {
-     SET_BIT(UCSR1B, RXCIE);
      SET_BIT(UCSR1B, RXEN);
      call McuPowerState.update();
--- 212,215 ----
***************
*** 224,228 ****
  
    command error_t Uart1RxControl.stop() {
-     CLR_BIT(UCSR1B, RXCIE);
      CLR_BIT(UCSR1B, RXEN);
      call McuPowerState.update();
--- 218,221 ----
***************
*** 231,250 ****
    
    async command error_t HplUart1.enableTxIntr() {
!     SET_BIT(UCSR1B, TXEN);
      return SUCCESS;
    }
    
    async command error_t HplUart1.disableTxIntr(){
!     CLR_BIT(UCSR1B, TXEN);
      return SUCCESS;
    }
    
    async command error_t HplUart1.enableRxIntr(){
!     SET_BIT(UCSR1B, RXEN);
      return SUCCESS;
    }
  
    async command error_t HplUart1.disableRxIntr(){
!     CLR_BIT(UCSR1B, RXEN);
      return SUCCESS;
    }
--- 224,244 ----
    
    async command error_t HplUart1.enableTxIntr() {
!     SET_BIT(UCSR1A, TXC);
!     SET_BIT(UCSR1B, TXCIE);
      return SUCCESS;
    }
    
    async command error_t HplUart1.disableTxIntr(){
!     CLR_BIT(UCSR1B, TXCIE);
      return SUCCESS;
    }
    
    async command error_t HplUart1.enableRxIntr(){
!     SET_BIT(UCSR1B, RXCIE);
      return SUCCESS;
    }
  
    async command error_t HplUart1.disableRxIntr(){
!     CLR_BIT(UCSR1B, RXCIE);
      return SUCCESS;
    }

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