[Tinyos-2-commits] CVS: tinyos-2.x/tos/chips/pxa27x/gpio HalPXA27xSoftCaptureC.nc, 1.4, 1.5 GeneralIOC.nc, 1.4, 1.5 HalPXA27xGeneralIOM.nc, 1.4, 1.5 HalPXA27xGpioInterrupt.nc, 1.2, 1.3 HalPXA27xSoftCaptureP.nc, 1.4, 1.5 HplPXA27xGPIO.nc, 1.2, 1.3 HplPXA27xGPIOPin.nc, 1.2, 1.3 HplPXA27xGPIOM.nc, 1.4, 1.5 HplPXA27xGPIOC.nc, 1.2, 1.3 HalPXA27xGpioCapture.nc, 1.2, 1.3
Razvan Musaloiu-E.
razvanm at users.sourceforge.net
Tue Jun 10 17:42:17 PDT 2008
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Update of /cvsroot/tinyos/tinyos-2.x/tos/chips/pxa27x/gpio
In directory sc8-pr-cvs10.sourceforge.net:/tmp/cvs-serv9551/chips/pxa27x/gpio
Modified Files:
HalPXA27xSoftCaptureC.nc GeneralIOC.nc HalPXA27xGeneralIOM.nc
HalPXA27xGpioInterrupt.nc HalPXA27xSoftCaptureP.nc
HplPXA27xGPIO.nc HplPXA27xGPIOPin.nc HplPXA27xGPIOM.nc
HplPXA27xGPIOC.nc HalPXA27xGpioCapture.nc
Log Message:
Convert to Unix-style line terminators.
Index: HalPXA27xSoftCaptureC.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/pxa27x/gpio/HalPXA27xSoftCaptureC.nc,v
retrieving revision 1.4
retrieving revision 1.5
diff -C2 -d -r1.4 -r1.5
*** HalPXA27xSoftCaptureC.nc 12 Dec 2006 18:23:12 -0000 1.4
--- HalPXA27xSoftCaptureC.nc 11 Jun 2008 00:42:13 -0000 1.5
***************
*** 1,55 ****
! // $Id$
! /*
! * Copyright (c) 2005 Arch Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arch Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
!
! /**
! * Emulates GPIO capture functionality using HalPXA27xGpioInterrupt and the
! * standard 32khz counter. Provides a method to capture on BOTH edges of
! * a GPIO transition
! *
! * @author Phil Buonadonna
! */
! generic configuration HalPXA27xSoftCaptureC()
! {
! provides interface HalPXA27xGpioCapture;
! uses interface HalPXA27xGpioInterrupt;
! }
!
! implementation
! {
! components new HalPXa27xSoftCaptureP();
! components Counter32khzC;
!
! HalPXA27xGpioCapture = HalPXA27xSoftCaptureP;
! HalPXA27xGpioInterrupt = HalPXA27xSoftCaptureP;
!
! HalPXA27xSoftCaptureP.Counter32khz32 -> Counter32khzC.Counter32khz32;
! }
!
--- 1,55 ----
! // $Id$
! /*
! * Copyright (c) 2005 Arch Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arch Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
!
! /**
! * Emulates GPIO capture functionality using HalPXA27xGpioInterrupt and the
! * standard 32khz counter. Provides a method to capture on BOTH edges of
! * a GPIO transition
! *
! * @author Phil Buonadonna
! */
! generic configuration HalPXA27xSoftCaptureC()
! {
! provides interface HalPXA27xGpioCapture;
! uses interface HalPXA27xGpioInterrupt;
! }
!
! implementation
! {
! components new HalPXa27xSoftCaptureP();
! components Counter32khzC;
!
! HalPXA27xGpioCapture = HalPXA27xSoftCaptureP;
! HalPXA27xGpioInterrupt = HalPXA27xSoftCaptureP;
!
! HalPXA27xSoftCaptureP.Counter32khz32 -> Counter32khzC.Counter32khz32;
! }
!
Index: GeneralIOC.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/pxa27x/gpio/GeneralIOC.nc,v
retrieving revision 1.4
retrieving revision 1.5
diff -C2 -d -r1.4 -r1.5
*** GeneralIOC.nc 12 Dec 2006 18:23:12 -0000 1.4
--- GeneralIOC.nc 11 Jun 2008 00:42:13 -0000 1.5
***************
*** 1,63 ****
! // $Id$
!
! /* tab:4
! * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By
! * downloading, copying, installing or using the software you agree to
! * this license. If you do not agree to this license, do not download,
! * install, copy or use the software.
! *
! * Intel Open Source License
! *
! * Copyright (c) 2002 Intel Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! *
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! * Neither the name of the Intel Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
! * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS
! * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
! * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
! * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
! * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
! * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
! * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
! * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
! *
! *
! */
!
! //@author Phil Buonadonna
!
! configuration GeneralIOC
! {
! provides {
! interface GeneralIO[uint8_t pin];
! interface HalPXA27xGpioInterrupt[uint8_t pin];
! interface GpioInterrupt[uint8_t pin];
! }
! }
!
! implementation
! {
! components HalPXA27xGeneralIOM;
! components HplPXA27xGPIOC;
!
! GeneralIO = HalPXA27xGeneralIOM;
! HalPXA27xGpioInterrupt = HalPXA27xGeneralIOM;
! GpioInterrupt = HalPXA27xGeneralIOM;
!
! HalPXA27xGeneralIOM.HplPXA27xGPIOPin -> HplPXA27xGPIOC;
!
! }
--- 1,63 ----
! // $Id$
!
! /* tab:4
! * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By
! * downloading, copying, installing or using the software you agree to
! * this license. If you do not agree to this license, do not download,
! * install, copy or use the software.
! *
! * Intel Open Source License
! *
! * Copyright (c) 2002 Intel Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! *
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! * Neither the name of the Intel Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
! * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS
! * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
! * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
! * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
! * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
! * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
! * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
! * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
! *
! *
! */
!
! //@author Phil Buonadonna
!
! configuration GeneralIOC
! {
! provides {
! interface GeneralIO[uint8_t pin];
! interface HalPXA27xGpioInterrupt[uint8_t pin];
! interface GpioInterrupt[uint8_t pin];
! }
! }
!
! implementation
! {
! components HalPXA27xGeneralIOM;
! components HplPXA27xGPIOC;
!
! GeneralIO = HalPXA27xGeneralIOM;
! HalPXA27xGpioInterrupt = HalPXA27xGeneralIOM;
! GpioInterrupt = HalPXA27xGeneralIOM;
!
! HalPXA27xGeneralIOM.HplPXA27xGPIOPin -> HplPXA27xGPIOC;
!
! }
Index: HalPXA27xGeneralIOM.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/pxa27x/gpio/HalPXA27xGeneralIOM.nc,v
retrieving revision 1.4
retrieving revision 1.5
diff -C2 -d -r1.4 -r1.5
*** HalPXA27xGeneralIOM.nc 12 Dec 2006 18:23:12 -0000 1.4
--- HalPXA27xGeneralIOM.nc 11 Jun 2008 00:42:13 -0000 1.5
***************
*** 1,166 ****
! // $Id$
!
! /* tab:4
! * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By
! * downloading, copying, installing or using the software you agree to
! * this license. If you do not agree to this license, do not download,
! * install, copy or use the software.
! *
! * Intel Open Source License
! *
! * Copyright (c) 2002 Intel Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! *
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! * Neither the name of the Intel Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
! * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS
! * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
! * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
! * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
! * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
! * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
! * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
! * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
! *
! *
! */
!
! //@author Phil Buonadonna
! module HalPXA27xGeneralIOM {
! provides {
! interface GeneralIO[uint8_t pin];
! interface HalPXA27xGpioInterrupt[uint8_t pin];
! interface GpioInterrupt[uint8_t pin];
! }
! uses {
! interface HplPXA27xGPIOPin[uint8_t pin];
! }
! }
!
! implementation {
! async command void GeneralIO.set[uint8_t pin]() {
!
! atomic call HplPXA27xGPIOPin.setGPSRbit[pin]();
! return;
! }
!
! async command void GeneralIO.clr[uint8_t pin]() {
! atomic call HplPXA27xGPIOPin.setGPCRbit[pin]();
! return;
! }
!
! async command void GeneralIO.toggle[uint8_t pin]() {
! atomic {
! if (call HplPXA27xGPIOPin.getGPLRbit[pin]()) {
! call HplPXA27xGPIOPin.setGPCRbit[pin]();
! }
! else {
! call HplPXA27xGPIOPin.setGPSRbit[pin]();
! }
! }
! return;
! }
!
! async command bool GeneralIO.get[uint8_t pin]() {
! bool result;
! result = call HplPXA27xGPIOPin.getGPLRbit[pin]();
! return result;
! }
!
! async command void GeneralIO.makeInput[uint8_t pin]() {
! atomic call HplPXA27xGPIOPin.setGPDRbit[pin](FALSE);
! return;
! }
!
! async command bool GeneralIO.isInput[uint8_t pin]() {
! bool result;
! result = !call HplPXA27xGPIOPin.getGPLRbit[pin]();
! return result;
! }
!
! async command void GeneralIO.makeOutput[uint8_t pin]() {
! atomic call HplPXA27xGPIOPin.setGPDRbit[pin](TRUE);
! return;
! }
!
! async command bool GeneralIO.isOutput[uint8_t pin]() {
! bool result;
! result = call HplPXA27xGPIOPin.getGPDRbit[pin]();
! return result;
! }
!
! async command error_t HalPXA27xGpioInterrupt.enableRisingEdge[uint8_t pin]() {
! atomic {
! call HplPXA27xGPIOPin.setGRERbit[pin](TRUE);
! call HplPXA27xGPIOPin.setGFERbit[pin](FALSE);
! }
! return SUCCESS;
! }
!
! async command error_t HalPXA27xGpioInterrupt.enableFallingEdge[uint8_t pin]() {
! atomic {
! call HplPXA27xGPIOPin.setGRERbit[pin](FALSE);
! call HplPXA27xGPIOPin.setGFERbit[pin](TRUE);
! }
! return SUCCESS;
! }
!
! async command error_t HalPXA27xGpioInterrupt.enableBothEdge[uint8_t pin]() {
! atomic {
! call HplPXA27xGPIOPin.setGRERbit[pin](TRUE);
! call HplPXA27xGPIOPin.setGFERbit[pin](TRUE);
! }
! return SUCCESS;
! }
!
! async command error_t HalPXA27xGpioInterrupt.disable[uint8_t pin]() {
! atomic {
! call HplPXA27xGPIOPin.setGRERbit[pin](FALSE);
! call HplPXA27xGPIOPin.setGFERbit[pin](FALSE);
! call HplPXA27xGPIOPin.clearGEDRbit[pin]();
! }
! return SUCCESS;
! }
!
! async command error_t GpioInterrupt.enableRisingEdge[uint8_t pin]() {
! return call HalPXA27xGpioInterrupt.enableRisingEdge[pin]();
! }
!
! async command error_t GpioInterrupt.enableFallingEdge[uint8_t pin]() {
! return call HalPXA27xGpioInterrupt.enableFallingEdge[pin]();
! }
!
! async command error_t GpioInterrupt.disable[uint8_t pin]() {
! return call HalPXA27xGpioInterrupt.disable[pin]();
! }
!
! async event void HplPXA27xGPIOPin.interruptGPIOPin[uint8_t pin]() {
! call HplPXA27xGPIOPin.clearGEDRbit[pin]();
! signal HalPXA27xGpioInterrupt.fired[pin]();
! signal GpioInterrupt.fired[pin]();
! return;
! }
!
!
! default async event void HalPXA27xGpioInterrupt.fired[uint8_t pin]() {
! return;
! }
!
! default async event void GpioInterrupt.fired[uint8_t pin]() {
! return;
! }
!
! }
--- 1,166 ----
! // $Id$
!
! /* tab:4
! * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By
! * downloading, copying, installing or using the software you agree to
! * this license. If you do not agree to this license, do not download,
! * install, copy or use the software.
! *
! * Intel Open Source License
! *
! * Copyright (c) 2002 Intel Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! *
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! * Neither the name of the Intel Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
! * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS
! * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
! * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
! * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
! * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
! * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
! * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
! * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
! *
! *
! */
!
! //@author Phil Buonadonna
! module HalPXA27xGeneralIOM {
! provides {
! interface GeneralIO[uint8_t pin];
! interface HalPXA27xGpioInterrupt[uint8_t pin];
! interface GpioInterrupt[uint8_t pin];
! }
! uses {
! interface HplPXA27xGPIOPin[uint8_t pin];
! }
! }
!
! implementation {
! async command void GeneralIO.set[uint8_t pin]() {
!
! atomic call HplPXA27xGPIOPin.setGPSRbit[pin]();
! return;
! }
!
! async command void GeneralIO.clr[uint8_t pin]() {
! atomic call HplPXA27xGPIOPin.setGPCRbit[pin]();
! return;
! }
!
! async command void GeneralIO.toggle[uint8_t pin]() {
! atomic {
! if (call HplPXA27xGPIOPin.getGPLRbit[pin]()) {
! call HplPXA27xGPIOPin.setGPCRbit[pin]();
! }
! else {
! call HplPXA27xGPIOPin.setGPSRbit[pin]();
! }
! }
! return;
! }
!
! async command bool GeneralIO.get[uint8_t pin]() {
! bool result;
! result = call HplPXA27xGPIOPin.getGPLRbit[pin]();
! return result;
! }
!
! async command void GeneralIO.makeInput[uint8_t pin]() {
! atomic call HplPXA27xGPIOPin.setGPDRbit[pin](FALSE);
! return;
! }
!
! async command bool GeneralIO.isInput[uint8_t pin]() {
! bool result;
! result = !call HplPXA27xGPIOPin.getGPLRbit[pin]();
! return result;
! }
!
! async command void GeneralIO.makeOutput[uint8_t pin]() {
! atomic call HplPXA27xGPIOPin.setGPDRbit[pin](TRUE);
! return;
! }
!
! async command bool GeneralIO.isOutput[uint8_t pin]() {
! bool result;
! result = call HplPXA27xGPIOPin.getGPDRbit[pin]();
! return result;
! }
!
! async command error_t HalPXA27xGpioInterrupt.enableRisingEdge[uint8_t pin]() {
! atomic {
! call HplPXA27xGPIOPin.setGRERbit[pin](TRUE);
! call HplPXA27xGPIOPin.setGFERbit[pin](FALSE);
! }
! return SUCCESS;
! }
!
! async command error_t HalPXA27xGpioInterrupt.enableFallingEdge[uint8_t pin]() {
! atomic {
! call HplPXA27xGPIOPin.setGRERbit[pin](FALSE);
! call HplPXA27xGPIOPin.setGFERbit[pin](TRUE);
! }
! return SUCCESS;
! }
!
! async command error_t HalPXA27xGpioInterrupt.enableBothEdge[uint8_t pin]() {
! atomic {
! call HplPXA27xGPIOPin.setGRERbit[pin](TRUE);
! call HplPXA27xGPIOPin.setGFERbit[pin](TRUE);
! }
! return SUCCESS;
! }
!
! async command error_t HalPXA27xGpioInterrupt.disable[uint8_t pin]() {
! atomic {
! call HplPXA27xGPIOPin.setGRERbit[pin](FALSE);
! call HplPXA27xGPIOPin.setGFERbit[pin](FALSE);
! call HplPXA27xGPIOPin.clearGEDRbit[pin]();
! }
! return SUCCESS;
! }
!
! async command error_t GpioInterrupt.enableRisingEdge[uint8_t pin]() {
! return call HalPXA27xGpioInterrupt.enableRisingEdge[pin]();
! }
!
! async command error_t GpioInterrupt.enableFallingEdge[uint8_t pin]() {
! return call HalPXA27xGpioInterrupt.enableFallingEdge[pin]();
! }
!
! async command error_t GpioInterrupt.disable[uint8_t pin]() {
! return call HalPXA27xGpioInterrupt.disable[pin]();
! }
!
! async event void HplPXA27xGPIOPin.interruptGPIOPin[uint8_t pin]() {
! call HplPXA27xGPIOPin.clearGEDRbit[pin]();
! signal HalPXA27xGpioInterrupt.fired[pin]();
! signal GpioInterrupt.fired[pin]();
! return;
! }
!
!
! default async event void HalPXA27xGpioInterrupt.fired[uint8_t pin]() {
! return;
! }
!
! default async event void GpioInterrupt.fired[uint8_t pin]() {
! return;
! }
!
! }
Index: HalPXA27xGpioInterrupt.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/pxa27x/gpio/HalPXA27xGpioInterrupt.nc,v
retrieving revision 1.2
retrieving revision 1.3
diff -C2 -d -r1.2 -r1.3
*** HalPXA27xGpioInterrupt.nc 12 Jul 2006 17:01:52 -0000 1.2
--- HalPXA27xGpioInterrupt.nc 11 Jun 2008 00:42:13 -0000 1.3
***************
*** 1,67 ****
! /*
! * Copyright (c) 2005 Arch Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arch Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
!
! /*
! * Variant of the standard GpioInterrupt interface that provides a
! * 'BOTH' trigger.
! *
! * @author Phil Buonadonna
! *
! */
!
! interface HalPXA27xGpioInterrupt {
!
! /**
! * Enable an edge based interrupt. Calls to these functions are
! * not cumulative: only the transition type of the last called
! * function will be monitored for.
! *
! *
! * @return SUCCESS if the interrupt has been enabled
! */
! async command error_t enableRisingEdge();
! async command error_t enableFallingEdge();
! async command error_t enableBothEdge();
!
! /**
! * Diables an edge interrupt or capture interrupt
! *
! * @return SUCCESS if the interrupt has been disabled
! */
! async command error_t disable();
!
! /**
! * Fired when an edge interrupt occurs.
! *
! * NOTE: Interrupts keep running until "disable()" is called
! */
! async event void fired();
!
! }
--- 1,67 ----
! /*
! * Copyright (c) 2005 Arch Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arch Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
!
! /*
! * Variant of the standard GpioInterrupt interface that provides a
! * 'BOTH' trigger.
! *
! * @author Phil Buonadonna
! *
! */
!
! interface HalPXA27xGpioInterrupt {
!
! /**
! * Enable an edge based interrupt. Calls to these functions are
! * not cumulative: only the transition type of the last called
! * function will be monitored for.
! *
! *
! * @return SUCCESS if the interrupt has been enabled
! */
! async command error_t enableRisingEdge();
! async command error_t enableFallingEdge();
! async command error_t enableBothEdge();
!
! /**
! * Diables an edge interrupt or capture interrupt
! *
! * @return SUCCESS if the interrupt has been disabled
! */
! async command error_t disable();
!
! /**
! * Fired when an edge interrupt occurs.
! *
! * NOTE: Interrupts keep running until "disable()" is called
! */
! async event void fired();
!
! }
Index: HalPXA27xSoftCaptureP.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/pxa27x/gpio/HalPXA27xSoftCaptureP.nc,v
retrieving revision 1.4
retrieving revision 1.5
diff -C2 -d -r1.4 -r1.5
*** HalPXA27xSoftCaptureP.nc 12 Dec 2006 18:23:12 -0000 1.4
--- HalPXA27xSoftCaptureP.nc 11 Jun 2008 00:42:13 -0000 1.5
***************
*** 1,82 ****
! // $Id$
! /*
! * Copyright (c) 2005 Arch Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arch Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
! /**
! * Emulates GPIO capture functionality using GpioInterrupt and the
! * standard 32khz counter. Provides a method to capture on BOTH edges of
! * a GPIO transition.
! *
! * @author Phil Buonadonna
! */
! generic module HalPXA27xSoftCaptureP ()
! {
! provides interface HalPXA27xGpioCapture;
! uses {
! interface HalPXA27xGpioInterrupt;
! interface Counter<T32khz,uint32_t> as Counter32khz32;
! }
! }
!
! implementation
! {
!
! async command error_t HalPXA27xGpioCapture.captureRisingEdge() {
! return (call HalPXA27xGpioInterrupt.enableRisingEdge());
! }
!
! async command error_t HalPXA27xGpioCapture.captureFallingEdge() {
! return (call HalPXA27xGpioInterrupt.enableFallingEdge());
! }
!
! async command error_t HalPXA27xGpioCapture.captureBothEdge() {
! return (call HalPXA27xGpioInterrupt.enableBothEdge());
! }
!
! async command void HalPXA27xGpioCapture.disable() {
! call HalPXA27xGpioInterrupt.disable();
! return;
! }
!
! async event void HalPXA27xGpioInterrupt.fired() {
! uint16_t captureTime;
!
! captureTime = (uint16_t) call Counter32khz32.get();
! signal HalPXA27xGpioCapture.captured(captureTime);
! return;
! }
!
! async event void Counter32khz32.overflow() {
! return;
! }
!
! default async event void HalPXA27xGpioCapture.captured(uint16_t time) {
! return;
! }
! }
--- 1,82 ----
! // $Id$
! /*
! * Copyright (c) 2005 Arch Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arch Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
! /**
! * Emulates GPIO capture functionality using GpioInterrupt and the
! * standard 32khz counter. Provides a method to capture on BOTH edges of
! * a GPIO transition.
! *
! * @author Phil Buonadonna
! */
! generic module HalPXA27xSoftCaptureP ()
! {
! provides interface HalPXA27xGpioCapture;
! uses {
! interface HalPXA27xGpioInterrupt;
! interface Counter<T32khz,uint32_t> as Counter32khz32;
! }
! }
!
! implementation
! {
!
! async command error_t HalPXA27xGpioCapture.captureRisingEdge() {
! return (call HalPXA27xGpioInterrupt.enableRisingEdge());
! }
!
! async command error_t HalPXA27xGpioCapture.captureFallingEdge() {
! return (call HalPXA27xGpioInterrupt.enableFallingEdge());
! }
!
! async command error_t HalPXA27xGpioCapture.captureBothEdge() {
! return (call HalPXA27xGpioInterrupt.enableBothEdge());
! }
!
! async command void HalPXA27xGpioCapture.disable() {
! call HalPXA27xGpioInterrupt.disable();
! return;
! }
!
! async event void HalPXA27xGpioInterrupt.fired() {
! uint16_t captureTime;
!
! captureTime = (uint16_t) call Counter32khz32.get();
! signal HalPXA27xGpioCapture.captured(captureTime);
! return;
! }
!
! async event void Counter32khz32.overflow() {
! return;
! }
!
! default async event void HalPXA27xGpioCapture.captured(uint16_t time) {
! return;
! }
! }
Index: HplPXA27xGPIO.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/pxa27x/gpio/HplPXA27xGPIO.nc,v
retrieving revision 1.2
retrieving revision 1.3
diff -C2 -d -r1.2 -r1.3
*** HplPXA27xGPIO.nc 12 Jul 2006 17:01:53 -0000 1.2
--- HplPXA27xGPIO.nc 11 Jun 2008 00:42:13 -0000 1.3
***************
*** 1,133 ****
! /*
! * Copyright (c) 2005 Arched Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arched Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
!
! /**
! * This interface provides direct access to the PXA27x GPIO controller
! * registers. It is meant as an alternative to the 'per-pin' interface
! * where the pin abstraction may not be convienient. The event provided is
! * called at every signal of the underlying first-level interrupt component
! * and NOT on a per-pin basis.
! *
! * Commands in this interface are named according to the following scheme:
! * set<regname>(uint32_t val);
! * get<regname>();
! * where <regname> is the register as defined in the PXA27x Developers
! * Guide: General-Purpose IO Controller.
! *
! * This interface is NOT intended to be parameterized.
! *
! * @author Phil Buonadonna
! */
!
! interface HplPXA27xGPIO
! {
!
! async command void setGPLR0(uint32_t val);
! async command uint32_t getGPLR0();
! async command void setGPLR1(uint32_t val);
! async command uint32_t getGPLR1();
! async command void setGPLR2(uint32_t val);
! async command uint32_t getGPLR2();
! async command void setGPLR3(uint32_t val);
! async command uint32_t getGPLR3();
!
! async command void setGPDR0(uint32_t val);
! async command uint32_t getGPDR0();
! async command void setGPDR1(uint32_t val);
! async command uint32_t getGPDR1();
! async command void setGPDR2(uint32_t val);
! async command uint32_t getGPDR2();
! async command void setGPDR3(uint32_t val);
! async command uint32_t getGPDR3();
!
! async command void setGPSR0(uint32_t val);
! async command uint32_t getGPSR0();
! async command void setGPSR1(uint32_t val);
! async command uint32_t getGPSR1();
! async command void setGPSR2(uint32_t val);
! async command uint32_t getGPSR2();
! async command void setGPSR3(uint32_t val);
! async command uint32_t getGPSR3();
!
! async command void setGPCR0(uint32_t val);
! async command uint32_t getGPCR0();
! async command void setGPCR1(uint32_t val);
! async command uint32_t getGPCR1();
! async command void setGPCR2(uint32_t val);
! async command uint32_t getGPCR2();
! async command void setGPCR3(uint32_t val);
! async command uint32_t getGPCR3();
!
! async command void setGRER0(uint32_t val);
! async command uint32_t getGRER0();
! async command void setGRER1(uint32_t val);
! async command uint32_t getGRER1();
! async command void setGRER2(uint32_t val);
! async command uint32_t getGRER2();
! async command void setGRER3(uint32_t val);
! async command uint32_t getGRER3();
!
! async command void setGFER0(uint32_t val);
! async command uint32_t getGFER0();
! async command void setGFER1(uint32_t val);
! async command uint32_t getGFER1();
! async command void setGFER2(uint32_t val);
! async command uint32_t getGFER2();
! async command void setGFER3(uint32_t val);
! async command uint32_t getGFER3();
!
! async command void setGEDR0(uint32_t val);
! async command uint32_t getGEDR0();
! async command void setGEDR1(uint32_t val);
! async command uint32_t getGEDR1();
! async command void setGEDR2(uint32_t val);
! async command uint32_t getGEDR2();
! async command void setGEDR3(uint32_t val);
! async command uint32_t getGEDR3();
!
! async command void setGAFR0_L(uint32_t val);
! async command uint32_t getGAFR0_L();
! async command void setGAFR0_U(uint32_t val);
! async command uint32_t getGAFR0_U();
! async command void setGAFR1_L(uint32_t val);
! async command uint32_t getGAFR1_L();
! async command void setGAFR1_U(uint32_t val);
! async command uint32_t getGAFR1_U();
! async command void setGAFR2_L(uint32_t val);
! async command uint32_t getGAFR2_L();
! async command void setGAFR2_U(uint32_t val);
! async command uint32_t getGAFR2_U();
! async command void setGAFR3_L(uint32_t val);
! async command uint32_t getGAFR3_L();
! async command void setGAFR3_U(uint32_t val);
! async command uint32_t getGAFR3_U();
!
! async event void fired();
! }
--- 1,133 ----
! /*
! * Copyright (c) 2005 Arched Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arched Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
!
! /**
! * This interface provides direct access to the PXA27x GPIO controller
! * registers. It is meant as an alternative to the 'per-pin' interface
! * where the pin abstraction may not be convienient. The event provided is
! * called at every signal of the underlying first-level interrupt component
! * and NOT on a per-pin basis.
! *
! * Commands in this interface are named according to the following scheme:
! * set<regname>(uint32_t val);
! * get<regname>();
! * where <regname> is the register as defined in the PXA27x Developers
! * Guide: General-Purpose IO Controller.
! *
! * This interface is NOT intended to be parameterized.
! *
! * @author Phil Buonadonna
! */
!
! interface HplPXA27xGPIO
! {
!
! async command void setGPLR0(uint32_t val);
! async command uint32_t getGPLR0();
! async command void setGPLR1(uint32_t val);
! async command uint32_t getGPLR1();
! async command void setGPLR2(uint32_t val);
! async command uint32_t getGPLR2();
! async command void setGPLR3(uint32_t val);
! async command uint32_t getGPLR3();
!
! async command void setGPDR0(uint32_t val);
! async command uint32_t getGPDR0();
! async command void setGPDR1(uint32_t val);
! async command uint32_t getGPDR1();
! async command void setGPDR2(uint32_t val);
! async command uint32_t getGPDR2();
! async command void setGPDR3(uint32_t val);
! async command uint32_t getGPDR3();
!
! async command void setGPSR0(uint32_t val);
! async command uint32_t getGPSR0();
! async command void setGPSR1(uint32_t val);
! async command uint32_t getGPSR1();
! async command void setGPSR2(uint32_t val);
! async command uint32_t getGPSR2();
! async command void setGPSR3(uint32_t val);
! async command uint32_t getGPSR3();
!
! async command void setGPCR0(uint32_t val);
! async command uint32_t getGPCR0();
! async command void setGPCR1(uint32_t val);
! async command uint32_t getGPCR1();
! async command void setGPCR2(uint32_t val);
! async command uint32_t getGPCR2();
! async command void setGPCR3(uint32_t val);
! async command uint32_t getGPCR3();
!
! async command void setGRER0(uint32_t val);
! async command uint32_t getGRER0();
! async command void setGRER1(uint32_t val);
! async command uint32_t getGRER1();
! async command void setGRER2(uint32_t val);
! async command uint32_t getGRER2();
! async command void setGRER3(uint32_t val);
! async command uint32_t getGRER3();
!
! async command void setGFER0(uint32_t val);
! async command uint32_t getGFER0();
! async command void setGFER1(uint32_t val);
! async command uint32_t getGFER1();
! async command void setGFER2(uint32_t val);
! async command uint32_t getGFER2();
! async command void setGFER3(uint32_t val);
! async command uint32_t getGFER3();
!
! async command void setGEDR0(uint32_t val);
! async command uint32_t getGEDR0();
! async command void setGEDR1(uint32_t val);
! async command uint32_t getGEDR1();
! async command void setGEDR2(uint32_t val);
! async command uint32_t getGEDR2();
! async command void setGEDR3(uint32_t val);
! async command uint32_t getGEDR3();
!
! async command void setGAFR0_L(uint32_t val);
! async command uint32_t getGAFR0_L();
! async command void setGAFR0_U(uint32_t val);
! async command uint32_t getGAFR0_U();
! async command void setGAFR1_L(uint32_t val);
! async command uint32_t getGAFR1_L();
! async command void setGAFR1_U(uint32_t val);
! async command uint32_t getGAFR1_U();
! async command void setGAFR2_L(uint32_t val);
! async command uint32_t getGAFR2_L();
! async command void setGAFR2_U(uint32_t val);
! async command uint32_t getGAFR2_U();
! async command void setGAFR3_L(uint32_t val);
! async command uint32_t getGAFR3_L();
! async command void setGAFR3_U(uint32_t val);
! async command uint32_t getGAFR3_U();
!
! async event void fired();
! }
Index: HplPXA27xGPIOPin.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/pxa27x/gpio/HplPXA27xGPIOPin.nc,v
retrieving revision 1.2
retrieving revision 1.3
diff -C2 -d -r1.2 -r1.3
*** HplPXA27xGPIOPin.nc 12 Jul 2006 17:01:53 -0000 1.2
--- HplPXA27xGPIOPin.nc 11 Jun 2008 00:42:13 -0000 1.3
***************
*** 1,152 ****
! /*
! * Copyright (c) 2005 Arched Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arched Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
! /**
! * This interface provides a 'per-pin' abstraction for the PXA27x
! * GPIO system. It is parameterized by the specific GPIO Pin number
! * of the PXA27x.
! *
! * @author Phil Buonadonna
! */
!
! interface HplPXA27xGPIOPin
! {
! /**
! * Returns the logic state of a GPIO Pin.
! *
! * @return bool TRUE if logic '1', FALSE if logic '0'
! */
! async command bool getGPLRbit();
!
! /**
! * Configures the direction of a GPIO pin.
! *
! * @param dir TRUE to configure as an output, FALSE to configure as an input.
! */
! async command void setGPDRbit(bool dir);
!
! /**
! * Get's the current pin direction configuration.
! *
! * @return bool TRUE if configured as an output, FALSE if configured
! * as an input.
! */
! async command bool getGPDRbit();
!
! /**
! * Sets a GPIO pin configured as an output to a HIGH state.
! *
! */
! async command void setGPSRbit();
!
! /**
! * Sets a GPIO pin configured as an output to a LOW state.
! *
! */
! async command void setGPCRbit();
!
! /**
! * Enables/Disables events on the rising edge of a GPIO pin
! * signal. Calls to this function are independent of calls
! * to 'setFallingEDEnable()'
! *
! * @param flag TRUE to enable rising edge detection, FASLE to
! * disable.
! *
! */
! async command void setGRERbit(bool flag);
!
! /**
! * Returns the status of rising edge detection.
! *
! * @return val TRUE if rising edge detection is enable, FALSE
! * otherwise.
! */
! async command bool getGRERbit();
!
! /**
! * Enables/Disables events on the falling edge of a GPIO pin
! * signal. Calls to this function are independent of calls to
! * 'setRisingEDEnable()'
! *
! * @param flag TRUE to enable falling edge detection, FASLE to
! * disable.
! */
! async command void setGFERbit(bool flag);
!
! /**
! * Returns the status of falling edge detection.
! *
! * @return val TRUE if falling edge detection is enable, FALSE
! * otherwise.
! */
! async command bool getGFERbit();
!
! /**
! * Indicates wether an edge detection event is pending for GPIO Pin
! *
! * @return val TRUE if an event is pending.
! */
! async command bool getGEDRbit();
!
! /**
! * Clears the edge detection event status.
! *
! * @return val TRUE if there was a pending event prior to clearing,
! * FALSE otherwise.
! */
! async command bool clearGEDRbit();
!
! /**
! * Sets the GPIO pin to one of it's alternate peripheral functions.
! * Refer to the PXA27x Developers Manual for information on available
! * alternate functions.
! *
! * @param func An integer between 0 and 3 indicating the desired
! * pin alternate function.
! */
! async command void setGAFRpin(uint8_t func);
!
! /**
! * Returns the current alternate function selected for the GPIO pin.
! *
! * @return val An integer between 0 and 3 indicated the current
! * alternate function.
! */
! async command uint8_t getGAFRpin();
!
! /**
! * The pin edge detection event. Signalled when a rising/falling edge
! * occurs on the PIN and the respective edge detect enable is set.
! * The default event DOES NOT clear any pending requests.
! *
! */
! async event void interruptGPIOPin();
! }
!
--- 1,152 ----
! /*
! * Copyright (c) 2005 Arched Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arched Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
! /**
! * This interface provides a 'per-pin' abstraction for the PXA27x
! * GPIO system. It is parameterized by the specific GPIO Pin number
! * of the PXA27x.
! *
! * @author Phil Buonadonna
! */
!
! interface HplPXA27xGPIOPin
! {
! /**
! * Returns the logic state of a GPIO Pin.
! *
! * @return bool TRUE if logic '1', FALSE if logic '0'
! */
! async command bool getGPLRbit();
!
! /**
! * Configures the direction of a GPIO pin.
! *
! * @param dir TRUE to configure as an output, FALSE to configure as an input.
! */
! async command void setGPDRbit(bool dir);
!
! /**
! * Get's the current pin direction configuration.
! *
! * @return bool TRUE if configured as an output, FALSE if configured
! * as an input.
! */
! async command bool getGPDRbit();
!
! /**
! * Sets a GPIO pin configured as an output to a HIGH state.
! *
! */
! async command void setGPSRbit();
!
! /**
! * Sets a GPIO pin configured as an output to a LOW state.
! *
! */
! async command void setGPCRbit();
!
! /**
! * Enables/Disables events on the rising edge of a GPIO pin
! * signal. Calls to this function are independent of calls
! * to 'setFallingEDEnable()'
! *
! * @param flag TRUE to enable rising edge detection, FASLE to
! * disable.
! *
! */
! async command void setGRERbit(bool flag);
!
! /**
! * Returns the status of rising edge detection.
! *
! * @return val TRUE if rising edge detection is enable, FALSE
! * otherwise.
! */
! async command bool getGRERbit();
!
! /**
! * Enables/Disables events on the falling edge of a GPIO pin
! * signal. Calls to this function are independent of calls to
! * 'setRisingEDEnable()'
! *
! * @param flag TRUE to enable falling edge detection, FASLE to
! * disable.
! */
! async command void setGFERbit(bool flag);
!
! /**
! * Returns the status of falling edge detection.
! *
! * @return val TRUE if falling edge detection is enable, FALSE
! * otherwise.
! */
! async command bool getGFERbit();
!
! /**
! * Indicates wether an edge detection event is pending for GPIO Pin
! *
! * @return val TRUE if an event is pending.
! */
! async command bool getGEDRbit();
!
! /**
! * Clears the edge detection event status.
! *
! * @return val TRUE if there was a pending event prior to clearing,
! * FALSE otherwise.
! */
! async command bool clearGEDRbit();
!
! /**
! * Sets the GPIO pin to one of it's alternate peripheral functions.
! * Refer to the PXA27x Developers Manual for information on available
! * alternate functions.
! *
! * @param func An integer between 0 and 3 indicating the desired
! * pin alternate function.
! */
! async command void setGAFRpin(uint8_t func);
!
! /**
! * Returns the current alternate function selected for the GPIO pin.
! *
! * @return val An integer between 0 and 3 indicated the current
! * alternate function.
! */
! async command uint8_t getGAFRpin();
!
! /**
! * The pin edge detection event. Signalled when a rising/falling edge
! * occurs on the PIN and the respective edge detect enable is set.
! * The default event DOES NOT clear any pending requests.
! *
! */
! async event void interruptGPIOPin();
! }
!
Index: HplPXA27xGPIOM.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/pxa27x/gpio/HplPXA27xGPIOM.nc,v
retrieving revision 1.4
retrieving revision 1.5
diff -C2 -d -r1.4 -r1.5
*** HplPXA27xGPIOM.nc 12 Dec 2006 18:23:12 -0000 1.4
--- HplPXA27xGPIOM.nc 11 Jun 2008 00:42:13 -0000 1.5
***************
*** 1,317 ****
! // $Id$
!
! /* tab:4
! * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By
! * downloading, copying, installing or using the software you agree to
! * this license. If you do not agree to this license, do not download,
! * install, copy or use the software.
! *
! * Intel Open Source License
! *
! * Copyright (c) 2002 Intel Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! *
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! * Neither the name of the Intel Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
! * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS
! * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
! * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
! * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
! * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
! * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
! * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
! * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
! *
! *
! */
!
! //@author Phil Buonadonna
! module HplPXA27xGPIOM {
!
! provides {
! interface Init;
! interface HplPXA27xGPIOPin[uint8_t pin];
! interface HplPXA27xGPIO;
! }
! uses {
! interface HplPXA27xInterrupt as GPIOIrq0;
! interface HplPXA27xInterrupt as GPIOIrq1;
! interface HplPXA27xInterrupt as GPIOIrq; // GPIO 2 - 120 only
! }
! }
!
! implementation {
!
! bool gfInitialized = FALSE;
!
! command error_t Init.init()
! {
! bool isInited;
!
! atomic {
! isInited = gfInitialized;
! gfInitialized = TRUE;
! }
!
! if (!isInited) {
! call GPIOIrq0.allocate();
! call GPIOIrq1.allocate();
! call GPIOIrq.allocate();
! call GPIOIrq0.enable();
! call GPIOIrq1.enable();
! call GPIOIrq.enable();
! }
! return SUCCESS;
! }
!
! async command bool HplPXA27xGPIOPin.getGPLRbit[uint8_t pin]()
! {
! return ((GPLR(pin) & _GPIO_bit(pin)) != 0);
! }
!
! async command void HplPXA27xGPIOPin.setGPDRbit[uint8_t pin](bool dir)
! {
! if (dir) {
! GPDR(pin) |= _GPIO_bit(pin);
! }
! else {
! GPDR(pin) &= ~(_GPIO_bit(pin));
! }
! return;
! }
!
! async command bool HplPXA27xGPIOPin.getGPDRbit[uint8_t pin]()
! {
! return ((GPDR(pin) & _GPIO_bit(pin)) != 0);
! }
!
! async command void HplPXA27xGPIOPin.setGPSRbit[uint8_t pin]()
! {
! GPSR(pin) = _GPIO_bit(pin);
! return;
! }
!
! async command void HplPXA27xGPIOPin.setGPCRbit[uint8_t pin]()
! {
! GPCR(pin) = _GPIO_bit(pin);
! return;
! }
!
! async command void HplPXA27xGPIOPin.setGRERbit[uint8_t pin](bool flag)
! {
! if (flag) {
! GRER(pin) |= _GPIO_bit(pin);
! }
! else {
! GRER(pin) &= ~(_GPIO_bit(pin));
! }
! return;
! }
!
! async command bool HplPXA27xGPIOPin.getGRERbit[uint8_t pin]()
! {
! return ((GRER(pin) & _GPIO_bit(pin)) != 0);
! }
!
! async command void HplPXA27xGPIOPin.setGFERbit[uint8_t pin](bool flag)
! {
! if (flag) {
! GFER(pin) |= _GPIO_bit(pin);
! }
! else {
! GFER(pin) &= ~(_GPIO_bit(pin));
! }
! return;
! }
!
! async command bool HplPXA27xGPIOPin.getGFERbit[uint8_t pin]()
! {
! return ((GFER(pin) & _GPIO_bit(pin)) != 0);
! }
!
! async command bool HplPXA27xGPIOPin.getGEDRbit[uint8_t pin]()
! {
! return ((GEDR(pin) & _GPIO_bit(pin)) != 0);
! }
!
! async command bool HplPXA27xGPIOPin.clearGEDRbit[uint8_t pin]()
! {
! bool flag;
! flag = ((GEDR(pin) & _GPIO_bit(pin)) != 0);
! GEDR(pin) = _GPIO_bit(pin);
! return flag;
! }
!
! async command void HplPXA27xGPIOPin.setGAFRpin[uint8_t pin](uint8_t func)
! {
! func &= 0x3;
! _GPIO_setaltfn(pin,func);
! return;
! }
!
! async command uint8_t HplPXA27xGPIOPin.getGAFRpin[uint8_t pin]()
! {
! return (_GPIO_getaltfun(pin));
! }
!
! default async event void HplPXA27xGPIOPin.interruptGPIOPin[uint8_t pin]()
! {
! call HplPXA27xGPIOPin.clearGEDRbit[pin]();
! return;
! }
!
! async command void HplPXA27xGPIO.setGPLR0(uint32_t val) {GPLR0 = val;}
! async command uint32_t HplPXA27xGPIO.getGPLR0() {return GPLR0;}
! async command void HplPXA27xGPIO.setGPLR1(uint32_t val) {GPLR1 = val;}
! async command uint32_t HplPXA27xGPIO.getGPLR1() {return GPLR1;}
! async command void HplPXA27xGPIO.setGPLR2(uint32_t val) {GPLR2 = val;}
! async command uint32_t HplPXA27xGPIO.getGPLR2() {return GPLR2;}
! async command void HplPXA27xGPIO.setGPLR3(uint32_t val) {GPLR3 = val;}
! async command uint32_t HplPXA27xGPIO.getGPLR3() {return GPLR3;}
!
! async command void HplPXA27xGPIO.setGPDR0(uint32_t val) {GPDR0 = val;}
! async command uint32_t HplPXA27xGPIO.getGPDR0() {return GPDR0;}
! async command void HplPXA27xGPIO.setGPDR1(uint32_t val) {GPDR1 = val;}
! async command uint32_t HplPXA27xGPIO.getGPDR1() {return GPDR1;}
! async command void HplPXA27xGPIO.setGPDR2(uint32_t val) {GPDR2 = val;}
! async command uint32_t HplPXA27xGPIO.getGPDR2() {return GPDR2;}
! async command void HplPXA27xGPIO.setGPDR3(uint32_t val) {GPDR3 = val;}
! async command uint32_t HplPXA27xGPIO.getGPDR3() {return GPDR3;}
!
! async command void HplPXA27xGPIO.setGPSR0(uint32_t val) {GPSR0 = val;}
! async command uint32_t HplPXA27xGPIO.getGPSR0() {return GPSR0;}
! async command void HplPXA27xGPIO.setGPSR1(uint32_t val) {GPSR1 = val;}
! async command uint32_t HplPXA27xGPIO.getGPSR1() {return GPSR1;}
! async command void HplPXA27xGPIO.setGPSR2(uint32_t val) {GPSR2 = val;}
! async command uint32_t HplPXA27xGPIO.getGPSR2() {return GPSR2;}
! async command void HplPXA27xGPIO.setGPSR3(uint32_t val) {GPSR3 = val;}
! async command uint32_t HplPXA27xGPIO.getGPSR3() {return GPSR3;}
!
! async command void HplPXA27xGPIO.setGPCR0(uint32_t val) {GPCR0 = val;}
! async command uint32_t HplPXA27xGPIO.getGPCR0() {return GPCR0;}
! async command void HplPXA27xGPIO.setGPCR1(uint32_t val) {GPCR1 = val;}
! async command uint32_t HplPXA27xGPIO.getGPCR1() {return GPCR1;}
! async command void HplPXA27xGPIO.setGPCR2(uint32_t val) {GPCR2 = val;}
! async command uint32_t HplPXA27xGPIO.getGPCR2() {return GPCR2;}
! async command void HplPXA27xGPIO.setGPCR3(uint32_t val) {GPCR3 = val;}
! async command uint32_t HplPXA27xGPIO.getGPCR3() {return GPCR3;}
!
! async command void HplPXA27xGPIO.setGRER0(uint32_t val) {GRER0 = val;}
! async command uint32_t HplPXA27xGPIO.getGRER0() {return GRER0;}
! async command void HplPXA27xGPIO.setGRER1(uint32_t val) {GRER1 = val;}
! async command uint32_t HplPXA27xGPIO.getGRER1() {return GRER1;}
! async command void HplPXA27xGPIO.setGRER2(uint32_t val) {GRER2 = val;}
! async command uint32_t HplPXA27xGPIO.getGRER2() {return GRER2;}
! async command void HplPXA27xGPIO.setGRER3(uint32_t val) {GRER3 = val;}
! async command uint32_t HplPXA27xGPIO.getGRER3() {return GRER3;}
!
! async command void HplPXA27xGPIO.setGFER0(uint32_t val) {GFER0 = val;}
! async command uint32_t HplPXA27xGPIO.getGFER0() {return GFER0;}
! async command void HplPXA27xGPIO.setGFER1(uint32_t val) {GFER1 = val;}
! async command uint32_t HplPXA27xGPIO.getGFER1() {return GFER1;}
! async command void HplPXA27xGPIO.setGFER2(uint32_t val) {GFER2 = val;}
! async command uint32_t HplPXA27xGPIO.getGFER2() {return GFER2;}
! async command void HplPXA27xGPIO.setGFER3(uint32_t val) {GFER3 = val;}
! async command uint32_t HplPXA27xGPIO.getGFER3() {return GFER3;}
!
! async command void HplPXA27xGPIO.setGEDR0(uint32_t val) {GEDR0 = val;}
! async command uint32_t HplPXA27xGPIO.getGEDR0() {return GEDR0;}
! async command void HplPXA27xGPIO.setGEDR1(uint32_t val) {GEDR1 = val;}
! async command uint32_t HplPXA27xGPIO.getGEDR1() {return GEDR1;}
! async command void HplPXA27xGPIO.setGEDR2(uint32_t val) {GEDR2 = val;}
! async command uint32_t HplPXA27xGPIO.getGEDR2() {return GEDR2;}
! async command void HplPXA27xGPIO.setGEDR3(uint32_t val) {GEDR3 = val;}
! async command uint32_t HplPXA27xGPIO.getGEDR3() {return GEDR3;}
!
! async command void HplPXA27xGPIO.setGAFR0_L(uint32_t val) {GAFR0_L = val;}
! async command uint32_t HplPXA27xGPIO.getGAFR0_L() {return GAFR0_L;}
! async command void HplPXA27xGPIO.setGAFR0_U(uint32_t val) {GAFR0_U = val;}
! async command uint32_t HplPXA27xGPIO.getGAFR0_U() {return GAFR0_U;}
!
! async command void HplPXA27xGPIO.setGAFR1_L(uint32_t val) {GAFR1_L = val;}
! async command uint32_t HplPXA27xGPIO.getGAFR1_L() {return GAFR1_L;}
! async command void HplPXA27xGPIO.setGAFR1_U(uint32_t val) {GAFR1_U = val;}
! async command uint32_t HplPXA27xGPIO.getGAFR1_U() {return GAFR1_U;}
!
! async command void HplPXA27xGPIO.setGAFR2_L(uint32_t val) {GAFR2_L = val;}
! async command uint32_t HplPXA27xGPIO.getGAFR2_L() {return GAFR2_L;}
! async command void HplPXA27xGPIO.setGAFR2_U(uint32_t val) {GAFR2_U = val;}
! async command uint32_t HplPXA27xGPIO.getGAFR2_U() {return GAFR2_U;}
!
! async command void HplPXA27xGPIO.setGAFR3_L(uint32_t val) {GAFR3_L = val;}
! async command uint32_t HplPXA27xGPIO.getGAFR3_L() {return GAFR3_L;}
! async command void HplPXA27xGPIO.setGAFR3_U(uint32_t val) {GAFR3_U = val;}
! async command uint32_t HplPXA27xGPIO.getGAFR3_U() {return GAFR3_U;}
!
! default async event void HplPXA27xGPIO.fired() {
! return;
! }
!
! async event void GPIOIrq.fired()
! {
!
! uint32_t DetectReg;
! uint8_t pin;
!
! signal HplPXA27xGPIO.fired();
!
! // Mask off GPIO 0 and 1 (handled by direct IRQs)
! atomic DetectReg = (GEDR0 & ~((1<<1) | (1<<0)));
!
! while (DetectReg) {
! pin = 31 - _pxa27x_clzui(DetectReg);
! signal HplPXA27xGPIOPin.interruptGPIOPin[pin]();
! DetectReg &= ~(1 << pin);
! }
!
! atomic DetectReg = GEDR1;
!
! while (DetectReg) {
! pin = 31 - _pxa27x_clzui(DetectReg);
! signal HplPXA27xGPIOPin.interruptGPIOPin[(pin+32)]();
! DetectReg &= ~(1 << pin);
! }
!
! atomic DetectReg = GEDR2;
!
! while (DetectReg) {
! pin = 31 - _pxa27x_clzui(DetectReg);
! signal HplPXA27xGPIOPin.interruptGPIOPin[(pin+64)]();
! DetectReg &= ~(1 << pin);
! }
!
! atomic DetectReg = GEDR3;
!
! while (DetectReg) {
! pin = 31 - _pxa27x_clzui(DetectReg);
! signal HplPXA27xGPIOPin.interruptGPIOPin[(pin+96)]();
! DetectReg &= ~(1 << pin);
! }
!
! return;
! }
!
! async event void GPIOIrq0.fired()
! {
! signal HplPXA27xGPIOPin.interruptGPIOPin[0]();
! }
!
! async event void GPIOIrq1.fired()
! {
! signal HplPXA27xGPIOPin.interruptGPIOPin[1]();
! }
!
! }
--- 1,317 ----
! // $Id$
!
! /* tab:4
! * IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By
! * downloading, copying, installing or using the software you agree to
! * this license. If you do not agree to this license, do not download,
! * install, copy or use the software.
! *
! * Intel Open Source License
! *
! * Copyright (c) 2002 Intel Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! *
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! * Neither the name of the Intel Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
! * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS
! * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
! * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
! * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
! * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
! * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
! * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
! * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
! *
! *
! */
!
! //@author Phil Buonadonna
! module HplPXA27xGPIOM {
!
! provides {
! interface Init;
! interface HplPXA27xGPIOPin[uint8_t pin];
! interface HplPXA27xGPIO;
! }
! uses {
! interface HplPXA27xInterrupt as GPIOIrq0;
! interface HplPXA27xInterrupt as GPIOIrq1;
! interface HplPXA27xInterrupt as GPIOIrq; // GPIO 2 - 120 only
! }
! }
!
! implementation {
!
! bool gfInitialized = FALSE;
!
! command error_t Init.init()
! {
! bool isInited;
!
! atomic {
! isInited = gfInitialized;
! gfInitialized = TRUE;
! }
!
! if (!isInited) {
! call GPIOIrq0.allocate();
! call GPIOIrq1.allocate();
! call GPIOIrq.allocate();
! call GPIOIrq0.enable();
! call GPIOIrq1.enable();
! call GPIOIrq.enable();
! }
! return SUCCESS;
! }
!
! async command bool HplPXA27xGPIOPin.getGPLRbit[uint8_t pin]()
! {
! return ((GPLR(pin) & _GPIO_bit(pin)) != 0);
! }
!
! async command void HplPXA27xGPIOPin.setGPDRbit[uint8_t pin](bool dir)
! {
! if (dir) {
! GPDR(pin) |= _GPIO_bit(pin);
! }
! else {
! GPDR(pin) &= ~(_GPIO_bit(pin));
! }
! return;
! }
!
! async command bool HplPXA27xGPIOPin.getGPDRbit[uint8_t pin]()
! {
! return ((GPDR(pin) & _GPIO_bit(pin)) != 0);
! }
!
! async command void HplPXA27xGPIOPin.setGPSRbit[uint8_t pin]()
! {
! GPSR(pin) = _GPIO_bit(pin);
! return;
! }
!
! async command void HplPXA27xGPIOPin.setGPCRbit[uint8_t pin]()
! {
! GPCR(pin) = _GPIO_bit(pin);
! return;
! }
!
! async command void HplPXA27xGPIOPin.setGRERbit[uint8_t pin](bool flag)
! {
! if (flag) {
! GRER(pin) |= _GPIO_bit(pin);
! }
! else {
! GRER(pin) &= ~(_GPIO_bit(pin));
! }
! return;
! }
!
! async command bool HplPXA27xGPIOPin.getGRERbit[uint8_t pin]()
! {
! return ((GRER(pin) & _GPIO_bit(pin)) != 0);
! }
!
! async command void HplPXA27xGPIOPin.setGFERbit[uint8_t pin](bool flag)
! {
! if (flag) {
! GFER(pin) |= _GPIO_bit(pin);
! }
! else {
! GFER(pin) &= ~(_GPIO_bit(pin));
! }
! return;
! }
!
! async command bool HplPXA27xGPIOPin.getGFERbit[uint8_t pin]()
! {
! return ((GFER(pin) & _GPIO_bit(pin)) != 0);
! }
!
! async command bool HplPXA27xGPIOPin.getGEDRbit[uint8_t pin]()
! {
! return ((GEDR(pin) & _GPIO_bit(pin)) != 0);
! }
!
! async command bool HplPXA27xGPIOPin.clearGEDRbit[uint8_t pin]()
! {
! bool flag;
! flag = ((GEDR(pin) & _GPIO_bit(pin)) != 0);
! GEDR(pin) = _GPIO_bit(pin);
! return flag;
! }
!
! async command void HplPXA27xGPIOPin.setGAFRpin[uint8_t pin](uint8_t func)
! {
! func &= 0x3;
! _GPIO_setaltfn(pin,func);
! return;
! }
!
! async command uint8_t HplPXA27xGPIOPin.getGAFRpin[uint8_t pin]()
! {
! return (_GPIO_getaltfun(pin));
! }
!
! default async event void HplPXA27xGPIOPin.interruptGPIOPin[uint8_t pin]()
! {
! call HplPXA27xGPIOPin.clearGEDRbit[pin]();
! return;
! }
!
! async command void HplPXA27xGPIO.setGPLR0(uint32_t val) {GPLR0 = val;}
! async command uint32_t HplPXA27xGPIO.getGPLR0() {return GPLR0;}
! async command void HplPXA27xGPIO.setGPLR1(uint32_t val) {GPLR1 = val;}
! async command uint32_t HplPXA27xGPIO.getGPLR1() {return GPLR1;}
! async command void HplPXA27xGPIO.setGPLR2(uint32_t val) {GPLR2 = val;}
! async command uint32_t HplPXA27xGPIO.getGPLR2() {return GPLR2;}
! async command void HplPXA27xGPIO.setGPLR3(uint32_t val) {GPLR3 = val;}
! async command uint32_t HplPXA27xGPIO.getGPLR3() {return GPLR3;}
!
! async command void HplPXA27xGPIO.setGPDR0(uint32_t val) {GPDR0 = val;}
! async command uint32_t HplPXA27xGPIO.getGPDR0() {return GPDR0;}
! async command void HplPXA27xGPIO.setGPDR1(uint32_t val) {GPDR1 = val;}
! async command uint32_t HplPXA27xGPIO.getGPDR1() {return GPDR1;}
! async command void HplPXA27xGPIO.setGPDR2(uint32_t val) {GPDR2 = val;}
! async command uint32_t HplPXA27xGPIO.getGPDR2() {return GPDR2;}
! async command void HplPXA27xGPIO.setGPDR3(uint32_t val) {GPDR3 = val;}
! async command uint32_t HplPXA27xGPIO.getGPDR3() {return GPDR3;}
!
! async command void HplPXA27xGPIO.setGPSR0(uint32_t val) {GPSR0 = val;}
! async command uint32_t HplPXA27xGPIO.getGPSR0() {return GPSR0;}
! async command void HplPXA27xGPIO.setGPSR1(uint32_t val) {GPSR1 = val;}
! async command uint32_t HplPXA27xGPIO.getGPSR1() {return GPSR1;}
! async command void HplPXA27xGPIO.setGPSR2(uint32_t val) {GPSR2 = val;}
! async command uint32_t HplPXA27xGPIO.getGPSR2() {return GPSR2;}
! async command void HplPXA27xGPIO.setGPSR3(uint32_t val) {GPSR3 = val;}
! async command uint32_t HplPXA27xGPIO.getGPSR3() {return GPSR3;}
!
! async command void HplPXA27xGPIO.setGPCR0(uint32_t val) {GPCR0 = val;}
! async command uint32_t HplPXA27xGPIO.getGPCR0() {return GPCR0;}
! async command void HplPXA27xGPIO.setGPCR1(uint32_t val) {GPCR1 = val;}
! async command uint32_t HplPXA27xGPIO.getGPCR1() {return GPCR1;}
! async command void HplPXA27xGPIO.setGPCR2(uint32_t val) {GPCR2 = val;}
! async command uint32_t HplPXA27xGPIO.getGPCR2() {return GPCR2;}
! async command void HplPXA27xGPIO.setGPCR3(uint32_t val) {GPCR3 = val;}
! async command uint32_t HplPXA27xGPIO.getGPCR3() {return GPCR3;}
!
! async command void HplPXA27xGPIO.setGRER0(uint32_t val) {GRER0 = val;}
! async command uint32_t HplPXA27xGPIO.getGRER0() {return GRER0;}
! async command void HplPXA27xGPIO.setGRER1(uint32_t val) {GRER1 = val;}
! async command uint32_t HplPXA27xGPIO.getGRER1() {return GRER1;}
! async command void HplPXA27xGPIO.setGRER2(uint32_t val) {GRER2 = val;}
! async command uint32_t HplPXA27xGPIO.getGRER2() {return GRER2;}
! async command void HplPXA27xGPIO.setGRER3(uint32_t val) {GRER3 = val;}
! async command uint32_t HplPXA27xGPIO.getGRER3() {return GRER3;}
!
! async command void HplPXA27xGPIO.setGFER0(uint32_t val) {GFER0 = val;}
! async command uint32_t HplPXA27xGPIO.getGFER0() {return GFER0;}
! async command void HplPXA27xGPIO.setGFER1(uint32_t val) {GFER1 = val;}
! async command uint32_t HplPXA27xGPIO.getGFER1() {return GFER1;}
! async command void HplPXA27xGPIO.setGFER2(uint32_t val) {GFER2 = val;}
! async command uint32_t HplPXA27xGPIO.getGFER2() {return GFER2;}
! async command void HplPXA27xGPIO.setGFER3(uint32_t val) {GFER3 = val;}
! async command uint32_t HplPXA27xGPIO.getGFER3() {return GFER3;}
!
! async command void HplPXA27xGPIO.setGEDR0(uint32_t val) {GEDR0 = val;}
! async command uint32_t HplPXA27xGPIO.getGEDR0() {return GEDR0;}
! async command void HplPXA27xGPIO.setGEDR1(uint32_t val) {GEDR1 = val;}
! async command uint32_t HplPXA27xGPIO.getGEDR1() {return GEDR1;}
! async command void HplPXA27xGPIO.setGEDR2(uint32_t val) {GEDR2 = val;}
! async command uint32_t HplPXA27xGPIO.getGEDR2() {return GEDR2;}
! async command void HplPXA27xGPIO.setGEDR3(uint32_t val) {GEDR3 = val;}
! async command uint32_t HplPXA27xGPIO.getGEDR3() {return GEDR3;}
!
! async command void HplPXA27xGPIO.setGAFR0_L(uint32_t val) {GAFR0_L = val;}
! async command uint32_t HplPXA27xGPIO.getGAFR0_L() {return GAFR0_L;}
! async command void HplPXA27xGPIO.setGAFR0_U(uint32_t val) {GAFR0_U = val;}
! async command uint32_t HplPXA27xGPIO.getGAFR0_U() {return GAFR0_U;}
!
! async command void HplPXA27xGPIO.setGAFR1_L(uint32_t val) {GAFR1_L = val;}
! async command uint32_t HplPXA27xGPIO.getGAFR1_L() {return GAFR1_L;}
! async command void HplPXA27xGPIO.setGAFR1_U(uint32_t val) {GAFR1_U = val;}
! async command uint32_t HplPXA27xGPIO.getGAFR1_U() {return GAFR1_U;}
!
! async command void HplPXA27xGPIO.setGAFR2_L(uint32_t val) {GAFR2_L = val;}
! async command uint32_t HplPXA27xGPIO.getGAFR2_L() {return GAFR2_L;}
! async command void HplPXA27xGPIO.setGAFR2_U(uint32_t val) {GAFR2_U = val;}
! async command uint32_t HplPXA27xGPIO.getGAFR2_U() {return GAFR2_U;}
!
! async command void HplPXA27xGPIO.setGAFR3_L(uint32_t val) {GAFR3_L = val;}
! async command uint32_t HplPXA27xGPIO.getGAFR3_L() {return GAFR3_L;}
! async command void HplPXA27xGPIO.setGAFR3_U(uint32_t val) {GAFR3_U = val;}
! async command uint32_t HplPXA27xGPIO.getGAFR3_U() {return GAFR3_U;}
!
! default async event void HplPXA27xGPIO.fired() {
! return;
! }
!
! async event void GPIOIrq.fired()
! {
!
! uint32_t DetectReg;
! uint8_t pin;
!
! signal HplPXA27xGPIO.fired();
!
! // Mask off GPIO 0 and 1 (handled by direct IRQs)
! atomic DetectReg = (GEDR0 & ~((1<<1) | (1<<0)));
!
! while (DetectReg) {
! pin = 31 - _pxa27x_clzui(DetectReg);
! signal HplPXA27xGPIOPin.interruptGPIOPin[pin]();
! DetectReg &= ~(1 << pin);
! }
!
! atomic DetectReg = GEDR1;
!
! while (DetectReg) {
! pin = 31 - _pxa27x_clzui(DetectReg);
! signal HplPXA27xGPIOPin.interruptGPIOPin[(pin+32)]();
! DetectReg &= ~(1 << pin);
! }
!
! atomic DetectReg = GEDR2;
!
! while (DetectReg) {
! pin = 31 - _pxa27x_clzui(DetectReg);
! signal HplPXA27xGPIOPin.interruptGPIOPin[(pin+64)]();
! DetectReg &= ~(1 << pin);
! }
!
! atomic DetectReg = GEDR3;
!
! while (DetectReg) {
! pin = 31 - _pxa27x_clzui(DetectReg);
! signal HplPXA27xGPIOPin.interruptGPIOPin[(pin+96)]();
! DetectReg &= ~(1 << pin);
! }
!
! return;
! }
!
! async event void GPIOIrq0.fired()
! {
! signal HplPXA27xGPIOPin.interruptGPIOPin[0]();
! }
!
! async event void GPIOIrq1.fired()
! {
! signal HplPXA27xGPIOPin.interruptGPIOPin[1]();
! }
!
! }
Index: HplPXA27xGPIOC.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/pxa27x/gpio/HplPXA27xGPIOC.nc,v
retrieving revision 1.2
retrieving revision 1.3
diff -C2 -d -r1.2 -r1.3
*** HplPXA27xGPIOC.nc 12 Jul 2006 17:01:53 -0000 1.2
--- HplPXA27xGPIOC.nc 11 Jun 2008 00:42:13 -0000 1.3
***************
*** 1,53 ****
! /*
! * Copyright (c) 2005 Arched Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arched Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
!
! configuration HplPXA27xGPIOC {
! provides {
! interface HplPXA27xGPIOPin[uint8_t pin];
! interface HplPXA27xGPIO;
! }
! }
! implementation
! {
! components HplPXA27xGPIOM;
! components HplPXA27xInterruptM;
! components PlatformP;
!
! HplPXA27xGPIOPin = HplPXA27xGPIOM;
! HplPXA27xGPIO = HplPXA27xGPIOM;
!
!
! HplPXA27xGPIOM.Init <- PlatformP.InitL1;
!
! HplPXA27xGPIOM.GPIOIrq0 -> HplPXA27xInterruptM.PXA27xIrq[PPID_GPIO_0];
! HplPXA27xGPIOM.GPIOIrq1 -> HplPXA27xInterruptM.PXA27xIrq[PPID_GPIO_1];
! HplPXA27xGPIOM.GPIOIrq -> HplPXA27xInterruptM.PXA27xIrq[PPID_GPIO_X];
!
! }
--- 1,53 ----
! /*
! * Copyright (c) 2005 Arched Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arched Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
!
! configuration HplPXA27xGPIOC {
! provides {
! interface HplPXA27xGPIOPin[uint8_t pin];
! interface HplPXA27xGPIO;
! }
! }
! implementation
! {
! components HplPXA27xGPIOM;
! components HplPXA27xInterruptM;
! components PlatformP;
!
! HplPXA27xGPIOPin = HplPXA27xGPIOM;
! HplPXA27xGPIO = HplPXA27xGPIOM;
!
!
! HplPXA27xGPIOM.Init <- PlatformP.InitL1;
!
! HplPXA27xGPIOM.GPIOIrq0 -> HplPXA27xInterruptM.PXA27xIrq[PPID_GPIO_0];
! HplPXA27xGPIOM.GPIOIrq1 -> HplPXA27xInterruptM.PXA27xIrq[PPID_GPIO_1];
! HplPXA27xGPIOM.GPIOIrq -> HplPXA27xInterruptM.PXA27xIrq[PPID_GPIO_X];
!
! }
Index: HalPXA27xGpioCapture.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/pxa27x/gpio/HalPXA27xGpioCapture.nc,v
retrieving revision 1.2
retrieving revision 1.3
diff -C2 -d -r1.2 -r1.3
*** HalPXA27xGpioCapture.nc 12 Jul 2006 17:01:52 -0000 1.2
--- HalPXA27xGpioCapture.nc 11 Jun 2008 00:42:13 -0000 1.3
***************
*** 1,61 ****
! /*
! * Copyright (c) 2005 Arched Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arched Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
!
! /*
! * Variant of the GpioCapture interface that provides a capture
! * on 'BOTH'.
! *
! * @author Phil Buonadonna
! */
!
! interface HalPXA27xGpioCapture {
!
! /**
! * Enable an edge based timer capture event.
! *
! * @return Whether the timer capture has been enabled.
! */
! async command error_t captureRisingEdge();
! async command error_t captureFallingEdge();
! async command error_t captureBothEdge();
!
! /**
! * Fired when an edge interrupt occurs.
! *
! * @param val The value of the 32kHz timer.
! */
! async event void captured(uint16_t time);
!
! /**
! * Disable further captures.
! */
! async command void disable();
!
! }
--- 1,61 ----
! /*
! * Copyright (c) 2005 Arched Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arched Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
!
! /*
! * Variant of the GpioCapture interface that provides a capture
! * on 'BOTH'.
! *
! * @author Phil Buonadonna
! */
!
! interface HalPXA27xGpioCapture {
!
! /**
! * Enable an edge based timer capture event.
! *
! * @return Whether the timer capture has been enabled.
! */
! async command error_t captureRisingEdge();
! async command error_t captureFallingEdge();
! async command error_t captureBothEdge();
!
! /**
! * Fired when an edge interrupt occurs.
! *
! * @param val The value of the 32kHz timer.
! */
! async event void captured(uint16_t time);
!
! /**
! * Disable further captures.
! */
! async command void disable();
!
! }
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