[Tinyos-2-commits] CVS: tinyos-2.x/tos/chips/pxa27x/uart HplPXA27xBTUARTC.nc, 1.4, 1.5 HplPXA27xFFUARTC.nc, 1.4, 1.5 HalPXA27xSerialP.nc, 1.4, 1.5 pxa27x_serial.h, 1.4, 1.5 HalPXA27xSerialCntl.nc, 1.4, 1.5 HalPXA27xSerialPacket.nc, 1.4, 1.5 HplPXA27xSTUARTC.nc, 1.4, 1.5 PXA27X_UARTREG.h, 1.4, 1.5 HplPXA27xUART.nc, 1.4, 1.5 HplPXA27xUARTP.nc, 1.4, 1.5
Razvan Musaloiu-E.
razvanm at users.sourceforge.net
Tue Jun 10 17:42:18 PDT 2008
- Previous message: [Tinyos-2-commits] CVS: tinyos-2.x/tos/platforms/intelmote2 HilTimerMilliC.nc, 1.2, 1.3 PlatformResetC.nc, 1.2, 1.3 toscrt0.s, 1.4, 1.5 tos.x, 1.2, 1.3
- Next message: [Tinyos-2-commits] CVS: tinyos-2.x/tos/platforms/intelmote2/chips/cc2420 HplCC2420AlarmC.nc, 1.4, 1.5 HplCC2420InterruptsC.nc, 1.4, 1.5 HplCC2420SpiC.nc, 1.4, 1.5 HplCC2420PinsC.nc, 1.4, 1.5 IM2CC2420SpiP.nc, 1.5, 1.6 IM2CC2420InitSpiP.nc, 1.4, 1.5
- Messages sorted by:
[ date ]
[ thread ]
[ subject ]
[ author ]
Update of /cvsroot/tinyos/tinyos-2.x/tos/chips/pxa27x/uart
In directory sc8-pr-cvs10.sourceforge.net:/tmp/cvs-serv9551/chips/pxa27x/uart
Modified Files:
HplPXA27xBTUARTC.nc HplPXA27xFFUARTC.nc HalPXA27xSerialP.nc
pxa27x_serial.h HalPXA27xSerialCntl.nc
HalPXA27xSerialPacket.nc HplPXA27xSTUARTC.nc PXA27X_UARTREG.h
HplPXA27xUART.nc HplPXA27xUARTP.nc
Log Message:
Convert to Unix-style line terminators.
Index: HplPXA27xBTUARTC.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/pxa27x/uart/HplPXA27xBTUARTC.nc,v
retrieving revision 1.4
retrieving revision 1.5
diff -C2 -d -r1.4 -r1.5
*** HplPXA27xBTUARTC.nc 12 Dec 2006 18:23:12 -0000 1.4
--- HplPXA27xBTUARTC.nc 11 Jun 2008 00:42:13 -0000 1.5
***************
*** 1,52 ****
! /* $Id$ */
! /*
! * Copyright (c) 2005 Arch Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arch Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
! /**
! *
! * @author Phil Buonadonna
! */
!
! configuration HplPXA27xBTUARTC
! {
! provides interface Init;
! provides interface HplPXA27xUART as BTUART;
! }
!
! implementation
! {
! components new HplPXA27xUARTP((uint32_t)&BTRBR);
! components HplPXA27xInterruptM;
!
! Init = HplPXA27xUARTP;
! BTUART = HplPXA27xUARTP.UART;
!
! HplPXA27xUARTP.UARTIrq -> HplPXA27xInterruptM.PXA27xIrq[PPID_BTUART];
!
! }
--- 1,52 ----
! /* $Id$ */
! /*
! * Copyright (c) 2005 Arch Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arch Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
! /**
! *
! * @author Phil Buonadonna
! */
!
! configuration HplPXA27xBTUARTC
! {
! provides interface Init;
! provides interface HplPXA27xUART as BTUART;
! }
!
! implementation
! {
! components new HplPXA27xUARTP((uint32_t)&BTRBR);
! components HplPXA27xInterruptM;
!
! Init = HplPXA27xUARTP;
! BTUART = HplPXA27xUARTP.UART;
!
! HplPXA27xUARTP.UARTIrq -> HplPXA27xInterruptM.PXA27xIrq[PPID_BTUART];
!
! }
Index: HplPXA27xFFUARTC.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/pxa27x/uart/HplPXA27xFFUARTC.nc,v
retrieving revision 1.4
retrieving revision 1.5
diff -C2 -d -r1.4 -r1.5
*** HplPXA27xFFUARTC.nc 12 Dec 2006 18:23:12 -0000 1.4
--- HplPXA27xFFUARTC.nc 11 Jun 2008 00:42:13 -0000 1.5
***************
*** 1,52 ****
! /* $Id$ */
! /*
! * Copyright (c) 2005 Arch Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arch Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
! /**
! *
! * @author Phil Buonadonna
! */
!
! configuration HplPXA27xFFUARTC
! {
! provides interface Init;
! provides interface HplPXA27xUART as FFUART;
! }
!
! implementation
! {
! components new HplPXA27xUARTP((uint32_t)&FFRBR);
! components HplPXA27xInterruptM;
!
! Init = HplPXA27xUARTP;
! FFUART = HplPXA27xUARTP.UART;
!
! HplPXA27xUARTP.UARTIrq -> HplPXA27xInterruptM.PXA27xIrq[PPID_FFUART];
!
! }
--- 1,52 ----
! /* $Id$ */
! /*
! * Copyright (c) 2005 Arch Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arch Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
! /**
! *
! * @author Phil Buonadonna
! */
!
! configuration HplPXA27xFFUARTC
! {
! provides interface Init;
! provides interface HplPXA27xUART as FFUART;
! }
!
! implementation
! {
! components new HplPXA27xUARTP((uint32_t)&FFRBR);
! components HplPXA27xInterruptM;
!
! Init = HplPXA27xUARTP;
! FFUART = HplPXA27xUARTP.UART;
!
! HplPXA27xUARTP.UARTIrq -> HplPXA27xInterruptM.PXA27xIrq[PPID_FFUART];
!
! }
Index: HalPXA27xSerialP.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/pxa27x/uart/HalPXA27xSerialP.nc,v
retrieving revision 1.4
retrieving revision 1.5
diff -C2 -d -r1.4 -r1.5
*** HalPXA27xSerialP.nc 12 Dec 2006 18:23:12 -0000 1.4
--- HalPXA27xSerialP.nc 11 Jun 2008 00:42:13 -0000 1.5
***************
*** 1,489 ****
! /* $Id$ */
! /*
! * Copyright (c) 2005 Arched Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arched Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
! /*
! * Intel Open Source License
! *
! * Copyright (c) 2002 Intel Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! *
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! * Neither the name of the Intel Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
! * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS
! * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
! * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
! * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
! * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
! * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
! * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
! * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
! *
! *
! */
! /**
! * Implements the UartByte, UartStream and HalPXA27xSerialPacket interface
! * for a PXA27x UART.
! *
! *
! * @param defaultRate Default baud rate for the serial port.
! *
! *
! * @author Phil Buonadonna
! */
!
! #include "pxa27x_serial.h"
!
! generic module HalPXA27xSerialP(uint32_t defaultRate)
! {
! provides {
! interface Init;
! interface StdControl;
! interface UartByte;
! interface UartStream;
! interface HalPXA27xSerialPacket;
! interface HalPXA27xSerialCntl;
! }
! uses {
! interface Init as UARTInit;
! interface HplPXA27xUART as UART;
! interface HplPXA27xDMAChnl as RxDMA;
! interface HplPXA27xDMAChnl as TxDMA;
! interface HplPXA27xDMAInfo as UARTRxDMAInfo;
! interface HplPXA27xDMAInfo as UARTTxDMAInfo;
! }
! }
!
! implementation
! {
!
! uint8_t *txCurrentBuf, *rxCurrentBuf;
! uint32_t txCurrentLen, rxCurrentLen, rxCurrentIdx;
! uint32_t gulFCRShadow;
! bool gbUsingUartStreamSendIF = FALSE;
! bool gbUsingUartStreamRcvIF = FALSE;
! bool gbRcvByteEvtEnabled = TRUE;
!
! command error_t Init.init() {
! error_t error = SUCCESS;
!
! atomic {
! call UARTInit.init();
! txCurrentBuf = rxCurrentBuf = NULL;
! gbUsingUartStreamSendIF = FALSE;
! gbUsingUartStreamRcvIF = FALSE;
! gbRcvByteEvtEnabled = TRUE;
! gulFCRShadow = (FCR_TRFIFOE | FCR_ITL(0)); // FIFO Mode, 1 byte Rx threshold
! }
! call TxDMA.setMap(call UARTTxDMAInfo.getMapIndex());
! call RxDMA.setMap(call UARTRxDMAInfo.getMapIndex());
! call TxDMA.setDALGNbit(TRUE);
! call RxDMA.setDALGNbit(TRUE);
!
! error = call HalPXA27xSerialCntl.configPort(defaultRate,8,NONE,1,FALSE);
!
! atomic {call UART.setFCR(gulFCRShadow);}
! return error;
! }
!
! command error_t StdControl.start() {
! atomic {
! call UART.setIER(IER_UUE | IER_RAVIE);
! }
! return SUCCESS;
! }
!
! command error_t StdControl.stop() {
! atomic {
! call UART.setIER(0);
! }
! return SUCCESS;
! }
!
! async command error_t UartByte.send(uint8_t data) {
! atomic call UART.setTHR(data);
! while ((call UART.getLSR() & LSR_TEMT) == 0);
! return SUCCESS;
! }
!
! async command error_t UartByte.receive( uint8_t *data, uint8_t timeout) {
! error_t error = FAIL;
! uint8_t t;
! for (t = 0; t < timeout; t++) {
! if (call UART.getLSR() & LSR_DR) {
! *data = call UART.getRBR();
! error = SUCCESS;
! break;
! }
! }
! return error;
! }
!
! async command error_t UartStream.send( uint8_t* buf, uint16_t len ) {
! error_t error;
! atomic gbUsingUartStreamSendIF = TRUE;
! error = call HalPXA27xSerialPacket.send(buf,len);
! if (error) {
! atomic gbUsingUartStreamSendIF = FALSE;
! }
! return error;
! }
!
!
! async command error_t UartStream.enableReceiveInterrupt() {
! error_t error = SUCCESS;
! atomic {
! if (rxCurrentBuf == NULL) {
! call UART.setIER(call UART.getIER() | IER_RAVIE);
! }
! gbRcvByteEvtEnabled = TRUE;
! }
! return SUCCESS;
! }
!
! async command error_t UartStream.disableReceiveInterrupt() {
! atomic {
! // Check to make sure a short stream/packet call isn't in progress
! if ((rxCurrentBuf == NULL) || (rxCurrentLen >= 8)) {
! call UART.setIER(call UART.getIER() & ~IER_RAVIE);
! }
! gbRcvByteEvtEnabled = FALSE;
! }
! return SUCCESS;
! }
!
! async command error_t UartStream.receive( uint8_t* buf, uint16_t len ) {
! error_t error;
! atomic gbUsingUartStreamRcvIF = TRUE;
! error = call HalPXA27xSerialPacket.receive(buf,len,0);
! if (error) {
! atomic gbUsingUartStreamRcvIF = FALSE;
! }
! return error;
! }
!
! async command error_t HalPXA27xSerialPacket.send(uint8_t *buf, uint16_t len) {
! uint32_t txAddr;
! uint32_t DMAFlags;
! error_t error = SUCCESS;
!
! atomic {
! if (txCurrentBuf == NULL) {
! txCurrentBuf = buf;
! txCurrentLen = len;
! }
! else {
! error = FAIL;
! }
! }
!
! if (error)
! return error;
!
! if (len < 8) {
! uint16_t i;
! // Use PIO. Invariant: FIFO is empty
! atomic {
! gulFCRShadow |= FCR_TIL;
! call UART.setFCR(gulFCRShadow);
! }
! for (i = 0;i < len;i++) {
! call UART.setTHR(buf[i]);
! }
! atomic call UART.setIER(call UART.getIER() | IER_TIE);
! }
! else {
! // Use DMA
! DMAFlags = (DCMD_FLOWTRG | DCMD_BURST8 | DCMD_WIDTH1 | DCMD_ENDIRQEN
! | DCMD_LEN(len) );
!
! txAddr = (uint32_t) buf;
! DMAFlags |= DCMD_INCSRCADDR;
!
! call TxDMA.setDCSR(DCSR_NODESCFETCH);
! call TxDMA.setDSADR(txAddr);
! call TxDMA.setDTADR(call UARTTxDMAInfo.getAddr());
! call TxDMA.setDCMD(DMAFlags);
!
! atomic {
! call UART.setIER(call UART.getIER() | IER_DMAE);
! }
!
! call TxDMA.setDCSR(DCSR_RUN | DCSR_NODESCFETCH);
! }
! return error;
! }
!
!
! async command error_t HalPXA27xSerialPacket.receive(uint8_t *buf, uint16_t len,
! uint16_t timeout) {
! uint32_t rxAddr;
! uint32_t DMAFlags;
! error_t error = SUCCESS;
!
! atomic {
! if (rxCurrentBuf == NULL) {
! rxCurrentBuf = buf;
! rxCurrentLen = len;
! rxCurrentIdx = 0;
! }
! else {
! error = FAIL;
! }
! }
!
! if (error)
! return error;
!
! if (len < 8) {
! // Use PIO. Invariant: FIFO is empty
! atomic {
! gulFCRShadow = ((gulFCRShadow & ~(FCR_ITL(3))) | FCR_ITL(0));
! call UART.setFCR(gulFCRShadow);
! call UART.setIER(call UART.getIER() | IER_RAVIE);
! }
! }
! else {
! // Use DMA
! DMAFlags = (DCMD_FLOWSRC | DCMD_BURST8 | DCMD_WIDTH1 | DCMD_ENDIRQEN
! | DCMD_LEN(len) );
!
! rxAddr = (uint32_t) buf;
! DMAFlags |= DCMD_INCTRGADDR;
!
! call RxDMA.setDCSR(DCSR_NODESCFETCH);
! call RxDMA.setDTADR(rxAddr);
! call RxDMA.setDSADR(call UARTRxDMAInfo.getAddr());
! call RxDMA.setDCMD(DMAFlags);
!
! atomic {
! gulFCRShadow = ((gulFCRShadow & ~(FCR_ITL(3))) | FCR_ITL(1));
! call UART.setFCR(gulFCRShadow);
! call UART.setIER((call UART.getIER() & ~IER_RAVIE) | IER_DMAE);
! }
!
! call RxDMA.setDCSR(DCSR_RUN | DCSR_NODESCFETCH);
! }
! return error;
! }
!
! void DispatchStreamRcvSignal() {
! uint8_t *pBuf = rxCurrentBuf;
! uint16_t len = rxCurrentLen;
! rxCurrentBuf = NULL;
! if (gbUsingUartStreamRcvIF) {
! gbUsingUartStreamRcvIF = FALSE;
! signal UartStream.receiveDone(pBuf, len, SUCCESS);
! }
! else {
! pBuf = signal HalPXA27xSerialPacket.receiveDone(pBuf, len, SUCCESS);
! if (pBuf) {
! call HalPXA27xSerialPacket.receive(pBuf,len,0);
! }
! }
! return;
! }
!
! void DispatchStreamSendSignal() {
! uint8_t *pBuf = txCurrentBuf;
! uint16_t len = txCurrentLen;
! txCurrentBuf = NULL;
! if (gbUsingUartStreamSendIF) {
! gbUsingUartStreamSendIF = FALSE;
! signal UartStream.sendDone(pBuf, len, SUCCESS);
! }
! else {
! pBuf = signal HalPXA27xSerialPacket.sendDone(pBuf, len, SUCCESS);
! if (pBuf) {
! call HalPXA27xSerialPacket.send(pBuf,len);
! }
! }
! return;
! }
!
! async event void RxDMA.interruptDMA() {
! call RxDMA.setDCMD(0);
! call RxDMA.setDCSR(DCSR_EORINT | DCSR_ENDINTR | DCSR_STARTINTR | DCSR_BUSERRINTR);
! DispatchStreamRcvSignal();
! if (gbRcvByteEvtEnabled)
! call UART.setIER(call UART.getIER() | IER_RAVIE);
! return;
! }
!
! async event void TxDMA.interruptDMA() {
! call TxDMA.setDCMD(0);
! call TxDMA.setDCSR(DCSR_EORINT | DCSR_ENDINTR | DCSR_STARTINTR | DCSR_BUSERRINTR);
! DispatchStreamSendSignal();
! return;
! }
!
!
! async command error_t HalPXA27xSerialCntl.configPort(uint32_t baudrate,
! uint8_t databits,
! uart_parity_t parity,
! uint8_t stopbits,
! bool flow_cntl) {
! uint32_t uiDivisor;
! uint32_t valLCR = 0;
! uint32_t valMCR = MCR_OUT2;
!
! uiDivisor = 921600/baudrate;
! // Check for invalid baud rate divisor value.
! // XXX - Eventually could use '0' to imply auto rate detection
! if ((uiDivisor & 0xFFFF0000) || (uiDivisor == 0)) {
! return EINVAL;
! }
!
! if ((databits > 8 || databits < 5)) {
! return EINVAL;
! }
! valLCR |= LCR_WLS((databits-5));
!
! switch (parity) {
! case EVEN:
! valLCR |= LCR_EPS;
! // Fall through to enable
! case ODD:
! valLCR |= LCR_PEN;
! break;
! case NONE:
! break;
! default:
! return EINVAL;
! break;
! }
!
! if ((stopbits > 2) || (stopbits < 1)) {
! return EINVAL;
! }
! else if (stopbits == 2) {
! valLCR |= LCR_STB;
! }
!
! if (flow_cntl) {
! valMCR |= MCR_AFE;
! }
!
! atomic {
! call UART.setDLL((uiDivisor & 0xFF));
! call UART.setDLH(((uiDivisor >> 8) & 0xFF));
! call UART.setLCR(valLCR);
! call UART.setMCR(valMCR);
! }
!
! return SUCCESS;
! }
!
! async command error_t HalPXA27xSerialCntl.flushPort() {
!
! atomic {
! call UART.setFCR(gulFCRShadow | FCR_RESETTF | FCR_RESETRF);
! }
!
! return SUCCESS;
! }
!
! async event void UART.interruptUART() {
! uint8_t error, intSource;
! uint8_t ucByte;
!
! intSource = call UART.getIIR();
! intSource &= IIR_IID_MASK;
! intSource = intSource >> 1;
!
! switch (intSource) {
! case 0: // MODEM STATUS
! break;
! case 1: // TRANSMIT FIFO
! call UART.setIER(call UART.getIER() & ~IER_TIE);
! DispatchStreamSendSignal();
! break;
! case 2: // RECEIVE FIFO data available
! while (call UART.getLSR() & LSR_DR) {
! ucByte = call UART.getRBR();
!
! if (rxCurrentBuf != NULL) {
! rxCurrentBuf[rxCurrentIdx] = ucByte;
! rxCurrentIdx++;
! if (rxCurrentIdx >= rxCurrentLen)
! DispatchStreamRcvSignal();
! }
! else if (gbRcvByteEvtEnabled) {
! signal UartStream.receivedByte(ucByte);
! }
! }
! break;
! case 3: // ERROR
! error = call UART.getLSR();
! break;
! default:
! break;
! }
! return;
! }
!
! default async event void UartStream.sendDone( uint8_t* buf, uint16_t len, error_t error ) {
! return;
! }
!
! default async event void UartStream.receivedByte(uint8_t data) {
! return;
! }
!
! default async event void UartStream.receiveDone( uint8_t* buf, uint16_t len, error_t error ) {
! return;
! }
!
! default async event uint8_t* HalPXA27xSerialPacket.sendDone(uint8_t *buf,
! uint16_t len,
! uart_status_t status) {
! return NULL;
! }
!
! default async event uint8_t* HalPXA27xSerialPacket.receiveDone(uint8_t *buf,
! uint16_t len,
! uart_status_t status) {
! return NULL;
! }
!
!
! }
--- 1,489 ----
! /* $Id$ */
! /*
! * Copyright (c) 2005 Arched Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arched Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
! /*
! * Intel Open Source License
! *
! * Copyright (c) 2002 Intel Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! *
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! * Neither the name of the Intel Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
! * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS
! * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
! * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
! * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
! * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
! * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
! * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
! * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
! *
! *
! */
! /**
! * Implements the UartByte, UartStream and HalPXA27xSerialPacket interface
! * for a PXA27x UART.
! *
! *
! * @param defaultRate Default baud rate for the serial port.
! *
! *
! * @author Phil Buonadonna
! */
!
! #include "pxa27x_serial.h"
!
! generic module HalPXA27xSerialP(uint32_t defaultRate)
! {
! provides {
! interface Init;
! interface StdControl;
! interface UartByte;
! interface UartStream;
! interface HalPXA27xSerialPacket;
! interface HalPXA27xSerialCntl;
! }
! uses {
! interface Init as UARTInit;
! interface HplPXA27xUART as UART;
! interface HplPXA27xDMAChnl as RxDMA;
! interface HplPXA27xDMAChnl as TxDMA;
! interface HplPXA27xDMAInfo as UARTRxDMAInfo;
! interface HplPXA27xDMAInfo as UARTTxDMAInfo;
! }
! }
!
! implementation
! {
!
! uint8_t *txCurrentBuf, *rxCurrentBuf;
! uint32_t txCurrentLen, rxCurrentLen, rxCurrentIdx;
! uint32_t gulFCRShadow;
! bool gbUsingUartStreamSendIF = FALSE;
! bool gbUsingUartStreamRcvIF = FALSE;
! bool gbRcvByteEvtEnabled = TRUE;
!
! command error_t Init.init() {
! error_t error = SUCCESS;
!
! atomic {
! call UARTInit.init();
! txCurrentBuf = rxCurrentBuf = NULL;
! gbUsingUartStreamSendIF = FALSE;
! gbUsingUartStreamRcvIF = FALSE;
! gbRcvByteEvtEnabled = TRUE;
! gulFCRShadow = (FCR_TRFIFOE | FCR_ITL(0)); // FIFO Mode, 1 byte Rx threshold
! }
! call TxDMA.setMap(call UARTTxDMAInfo.getMapIndex());
! call RxDMA.setMap(call UARTRxDMAInfo.getMapIndex());
! call TxDMA.setDALGNbit(TRUE);
! call RxDMA.setDALGNbit(TRUE);
!
! error = call HalPXA27xSerialCntl.configPort(defaultRate,8,NONE,1,FALSE);
!
! atomic {call UART.setFCR(gulFCRShadow);}
! return error;
! }
!
! command error_t StdControl.start() {
! atomic {
! call UART.setIER(IER_UUE | IER_RAVIE);
! }
! return SUCCESS;
! }
!
! command error_t StdControl.stop() {
! atomic {
! call UART.setIER(0);
! }
! return SUCCESS;
! }
!
! async command error_t UartByte.send(uint8_t data) {
! atomic call UART.setTHR(data);
! while ((call UART.getLSR() & LSR_TEMT) == 0);
! return SUCCESS;
! }
!
! async command error_t UartByte.receive( uint8_t *data, uint8_t timeout) {
! error_t error = FAIL;
! uint8_t t;
! for (t = 0; t < timeout; t++) {
! if (call UART.getLSR() & LSR_DR) {
! *data = call UART.getRBR();
! error = SUCCESS;
! break;
! }
! }
! return error;
! }
!
! async command error_t UartStream.send( uint8_t* buf, uint16_t len ) {
! error_t error;
! atomic gbUsingUartStreamSendIF = TRUE;
! error = call HalPXA27xSerialPacket.send(buf,len);
! if (error) {
! atomic gbUsingUartStreamSendIF = FALSE;
! }
! return error;
! }
!
!
! async command error_t UartStream.enableReceiveInterrupt() {
! error_t error = SUCCESS;
! atomic {
! if (rxCurrentBuf == NULL) {
! call UART.setIER(call UART.getIER() | IER_RAVIE);
! }
! gbRcvByteEvtEnabled = TRUE;
! }
! return SUCCESS;
! }
!
! async command error_t UartStream.disableReceiveInterrupt() {
! atomic {
! // Check to make sure a short stream/packet call isn't in progress
! if ((rxCurrentBuf == NULL) || (rxCurrentLen >= 8)) {
! call UART.setIER(call UART.getIER() & ~IER_RAVIE);
! }
! gbRcvByteEvtEnabled = FALSE;
! }
! return SUCCESS;
! }
!
! async command error_t UartStream.receive( uint8_t* buf, uint16_t len ) {
! error_t error;
! atomic gbUsingUartStreamRcvIF = TRUE;
! error = call HalPXA27xSerialPacket.receive(buf,len,0);
! if (error) {
! atomic gbUsingUartStreamRcvIF = FALSE;
! }
! return error;
! }
!
! async command error_t HalPXA27xSerialPacket.send(uint8_t *buf, uint16_t len) {
! uint32_t txAddr;
! uint32_t DMAFlags;
! error_t error = SUCCESS;
!
! atomic {
! if (txCurrentBuf == NULL) {
! txCurrentBuf = buf;
! txCurrentLen = len;
! }
! else {
! error = FAIL;
! }
! }
!
! if (error)
! return error;
!
! if (len < 8) {
! uint16_t i;
! // Use PIO. Invariant: FIFO is empty
! atomic {
! gulFCRShadow |= FCR_TIL;
! call UART.setFCR(gulFCRShadow);
! }
! for (i = 0;i < len;i++) {
! call UART.setTHR(buf[i]);
! }
! atomic call UART.setIER(call UART.getIER() | IER_TIE);
! }
! else {
! // Use DMA
! DMAFlags = (DCMD_FLOWTRG | DCMD_BURST8 | DCMD_WIDTH1 | DCMD_ENDIRQEN
! | DCMD_LEN(len) );
!
! txAddr = (uint32_t) buf;
! DMAFlags |= DCMD_INCSRCADDR;
!
! call TxDMA.setDCSR(DCSR_NODESCFETCH);
! call TxDMA.setDSADR(txAddr);
! call TxDMA.setDTADR(call UARTTxDMAInfo.getAddr());
! call TxDMA.setDCMD(DMAFlags);
!
! atomic {
! call UART.setIER(call UART.getIER() | IER_DMAE);
! }
!
! call TxDMA.setDCSR(DCSR_RUN | DCSR_NODESCFETCH);
! }
! return error;
! }
!
!
! async command error_t HalPXA27xSerialPacket.receive(uint8_t *buf, uint16_t len,
! uint16_t timeout) {
! uint32_t rxAddr;
! uint32_t DMAFlags;
! error_t error = SUCCESS;
!
! atomic {
! if (rxCurrentBuf == NULL) {
! rxCurrentBuf = buf;
! rxCurrentLen = len;
! rxCurrentIdx = 0;
! }
! else {
! error = FAIL;
! }
! }
!
! if (error)
! return error;
!
! if (len < 8) {
! // Use PIO. Invariant: FIFO is empty
! atomic {
! gulFCRShadow = ((gulFCRShadow & ~(FCR_ITL(3))) | FCR_ITL(0));
! call UART.setFCR(gulFCRShadow);
! call UART.setIER(call UART.getIER() | IER_RAVIE);
! }
! }
! else {
! // Use DMA
! DMAFlags = (DCMD_FLOWSRC | DCMD_BURST8 | DCMD_WIDTH1 | DCMD_ENDIRQEN
! | DCMD_LEN(len) );
!
! rxAddr = (uint32_t) buf;
! DMAFlags |= DCMD_INCTRGADDR;
!
! call RxDMA.setDCSR(DCSR_NODESCFETCH);
! call RxDMA.setDTADR(rxAddr);
! call RxDMA.setDSADR(call UARTRxDMAInfo.getAddr());
! call RxDMA.setDCMD(DMAFlags);
!
! atomic {
! gulFCRShadow = ((gulFCRShadow & ~(FCR_ITL(3))) | FCR_ITL(1));
! call UART.setFCR(gulFCRShadow);
! call UART.setIER((call UART.getIER() & ~IER_RAVIE) | IER_DMAE);
! }
!
! call RxDMA.setDCSR(DCSR_RUN | DCSR_NODESCFETCH);
! }
! return error;
! }
!
! void DispatchStreamRcvSignal() {
! uint8_t *pBuf = rxCurrentBuf;
! uint16_t len = rxCurrentLen;
! rxCurrentBuf = NULL;
! if (gbUsingUartStreamRcvIF) {
! gbUsingUartStreamRcvIF = FALSE;
! signal UartStream.receiveDone(pBuf, len, SUCCESS);
! }
! else {
! pBuf = signal HalPXA27xSerialPacket.receiveDone(pBuf, len, SUCCESS);
! if (pBuf) {
! call HalPXA27xSerialPacket.receive(pBuf,len,0);
! }
! }
! return;
! }
!
! void DispatchStreamSendSignal() {
! uint8_t *pBuf = txCurrentBuf;
! uint16_t len = txCurrentLen;
! txCurrentBuf = NULL;
! if (gbUsingUartStreamSendIF) {
! gbUsingUartStreamSendIF = FALSE;
! signal UartStream.sendDone(pBuf, len, SUCCESS);
! }
! else {
! pBuf = signal HalPXA27xSerialPacket.sendDone(pBuf, len, SUCCESS);
! if (pBuf) {
! call HalPXA27xSerialPacket.send(pBuf,len);
! }
! }
! return;
! }
!
! async event void RxDMA.interruptDMA() {
! call RxDMA.setDCMD(0);
! call RxDMA.setDCSR(DCSR_EORINT | DCSR_ENDINTR | DCSR_STARTINTR | DCSR_BUSERRINTR);
! DispatchStreamRcvSignal();
! if (gbRcvByteEvtEnabled)
! call UART.setIER(call UART.getIER() | IER_RAVIE);
! return;
! }
!
! async event void TxDMA.interruptDMA() {
! call TxDMA.setDCMD(0);
! call TxDMA.setDCSR(DCSR_EORINT | DCSR_ENDINTR | DCSR_STARTINTR | DCSR_BUSERRINTR);
! DispatchStreamSendSignal();
! return;
! }
!
!
! async command error_t HalPXA27xSerialCntl.configPort(uint32_t baudrate,
! uint8_t databits,
! uart_parity_t parity,
! uint8_t stopbits,
! bool flow_cntl) {
! uint32_t uiDivisor;
! uint32_t valLCR = 0;
! uint32_t valMCR = MCR_OUT2;
!
! uiDivisor = 921600/baudrate;
! // Check for invalid baud rate divisor value.
! // XXX - Eventually could use '0' to imply auto rate detection
! if ((uiDivisor & 0xFFFF0000) || (uiDivisor == 0)) {
! return EINVAL;
! }
!
! if ((databits > 8 || databits < 5)) {
! return EINVAL;
! }
! valLCR |= LCR_WLS((databits-5));
!
! switch (parity) {
! case EVEN:
! valLCR |= LCR_EPS;
! // Fall through to enable
! case ODD:
! valLCR |= LCR_PEN;
! break;
! case NONE:
! break;
! default:
! return EINVAL;
! break;
! }
!
! if ((stopbits > 2) || (stopbits < 1)) {
! return EINVAL;
! }
! else if (stopbits == 2) {
! valLCR |= LCR_STB;
! }
!
! if (flow_cntl) {
! valMCR |= MCR_AFE;
! }
!
! atomic {
! call UART.setDLL((uiDivisor & 0xFF));
! call UART.setDLH(((uiDivisor >> 8) & 0xFF));
! call UART.setLCR(valLCR);
! call UART.setMCR(valMCR);
! }
!
! return SUCCESS;
! }
!
! async command error_t HalPXA27xSerialCntl.flushPort() {
!
! atomic {
! call UART.setFCR(gulFCRShadow | FCR_RESETTF | FCR_RESETRF);
! }
!
! return SUCCESS;
! }
!
! async event void UART.interruptUART() {
! uint8_t error, intSource;
! uint8_t ucByte;
!
! intSource = call UART.getIIR();
! intSource &= IIR_IID_MASK;
! intSource = intSource >> 1;
!
! switch (intSource) {
! case 0: // MODEM STATUS
! break;
! case 1: // TRANSMIT FIFO
! call UART.setIER(call UART.getIER() & ~IER_TIE);
! DispatchStreamSendSignal();
! break;
! case 2: // RECEIVE FIFO data available
! while (call UART.getLSR() & LSR_DR) {
! ucByte = call UART.getRBR();
!
! if (rxCurrentBuf != NULL) {
! rxCurrentBuf[rxCurrentIdx] = ucByte;
! rxCurrentIdx++;
! if (rxCurrentIdx >= rxCurrentLen)
! DispatchStreamRcvSignal();
! }
! else if (gbRcvByteEvtEnabled) {
! signal UartStream.receivedByte(ucByte);
! }
! }
! break;
! case 3: // ERROR
! error = call UART.getLSR();
! break;
! default:
! break;
! }
! return;
! }
!
! default async event void UartStream.sendDone( uint8_t* buf, uint16_t len, error_t error ) {
! return;
! }
!
! default async event void UartStream.receivedByte(uint8_t data) {
! return;
! }
!
! default async event void UartStream.receiveDone( uint8_t* buf, uint16_t len, error_t error ) {
! return;
! }
!
! default async event uint8_t* HalPXA27xSerialPacket.sendDone(uint8_t *buf,
! uint16_t len,
! uart_status_t status) {
! return NULL;
! }
!
! default async event uint8_t* HalPXA27xSerialPacket.receiveDone(uint8_t *buf,
! uint16_t len,
! uart_status_t status) {
! return NULL;
! }
!
!
! }
Index: pxa27x_serial.h
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/pxa27x/uart/pxa27x_serial.h,v
retrieving revision 1.4
retrieving revision 1.5
diff -C2 -d -r1.4 -r1.5
*** pxa27x_serial.h 12 Dec 2006 18:23:12 -0000 1.4
--- pxa27x_serial.h 11 Jun 2008 00:42:13 -0000 1.5
***************
*** 1,44 ****
! /* $Id$ */
! /*
! * Copyright (c) 2005 Arched Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arched Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
!
!
! #ifndef _pxa27x_serial_h
! #define _pxa27x_serial_h
!
! typedef uint8_t uart_status_t; // ??? if this is supposed to be a uint8_t
!
! typedef enum {
! EVEN,
! ODD,
! NONE
! } uart_parity_t;
!
! #endif /* _pxa27x_serial_h */
--- 1,44 ----
! /* $Id$ */
! /*
! * Copyright (c) 2005 Arched Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arched Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
!
!
! #ifndef _pxa27x_serial_h
! #define _pxa27x_serial_h
!
! typedef uint8_t uart_status_t; // ??? if this is supposed to be a uint8_t
!
! typedef enum {
! EVEN,
! ODD,
! NONE
! } uart_parity_t;
!
! #endif /* _pxa27x_serial_h */
Index: HalPXA27xSerialCntl.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/pxa27x/uart/HalPXA27xSerialCntl.nc,v
retrieving revision 1.4
retrieving revision 1.5
diff -C2 -d -r1.4 -r1.5
*** HalPXA27xSerialCntl.nc 12 Dec 2006 18:23:12 -0000 1.4
--- HalPXA27xSerialCntl.nc 11 Jun 2008 00:42:13 -0000 1.5
***************
*** 1,65 ****
! /* $Id$ */
! /*
! * Copyright (c) 2005 Arch Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arch Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
!
! /**
! * @author Phil Buonadonna
! */
!
! #include "pxa27x_serial.h"
!
! interface HalPXA27xSerialCntl
! {
! /**
! * Modify runtime port parameters
! *
! * @param baudrate The integer value of baudrate
! * @param databits The Number of data bits
! * @param partiy Values of EVEN,ODD or NONE
! * @param stopbits Values of 1 or 2
! * @param flow_cntl TRUE to enable hardware flow control
! *
! * @return SUCCESS if parameters successfully applied. FAIL otherwise
! */
! async command error_t configPort(uint32_t baudrate,
! uint8_t databits,
! uart_parity_t parity,
! uint8_t stopbits,
! bool flow_cntl);
!
! /**
! * Flush the port FIFOs
! *
! * @return SUCCESS if flushed, FAIL otherwise.
! */
! async command error_t flushPort();
!
! }
!
--- 1,65 ----
! /* $Id$ */
! /*
! * Copyright (c) 2005 Arch Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arch Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
!
! /**
! * @author Phil Buonadonna
! */
!
! #include "pxa27x_serial.h"
!
! interface HalPXA27xSerialCntl
! {
! /**
! * Modify runtime port parameters
! *
! * @param baudrate The integer value of baudrate
! * @param databits The Number of data bits
! * @param partiy Values of EVEN,ODD or NONE
! * @param stopbits Values of 1 or 2
! * @param flow_cntl TRUE to enable hardware flow control
! *
! * @return SUCCESS if parameters successfully applied. FAIL otherwise
! */
! async command error_t configPort(uint32_t baudrate,
! uint8_t databits,
! uart_parity_t parity,
! uint8_t stopbits,
! bool flow_cntl);
!
! /**
! * Flush the port FIFOs
! *
! * @return SUCCESS if flushed, FAIL otherwise.
! */
! async command error_t flushPort();
!
! }
!
Index: HalPXA27xSerialPacket.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/pxa27x/uart/HalPXA27xSerialPacket.nc,v
retrieving revision 1.4
retrieving revision 1.5
diff -C2 -d -r1.4 -r1.5
*** HalPXA27xSerialPacket.nc 12 Dec 2006 18:23:12 -0000 1.4
--- HalPXA27xSerialPacket.nc 11 Jun 2008 00:42:13 -0000 1.5
***************
*** 1,92 ****
! /* $Id$ */
! /*
! * Copyright (c) 2005 Arch Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arch Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
!
! /**
! * @author Phil Buonadonna
! */
!
! #include "pxa27x_serial.h"
!
! interface HalPXA27xSerialPacket
! {
! /**
! * Begin transmission of a UART stream. If SUCCESS is returned,
! * <code>sendDone</code> will be signalled when transmission is
! * complete.
! *
! * @param buf Buffer for bytes to send.
! * @param len Number of bytes to send.
! * @return SUCCESS if request was accepted, FAIL otherwise.
! */
! async command error_t send(uint8_t *buf, uint16_t len);
!
! /**
! * Signal completion of sending a stream.
! *
! * @param buf Bytes sent.
! * @param len Number of bytes sent.
! * @param status UART error status.
! *
! * @return buf A pointer to a new buffer of equal length
! * as in the original <code>send</code> call that is to be transmitted (chained
! * send). Set to NULL to end further transmissions.
! */
! async event uint8_t *sendDone(uint8_t *buf, uint16_t len, uart_status_t status);
!
! /**
! * Begin reception of a UART stream. If SUCCESS is returned,
! * <code>receiveDone</code> will be signalled when reception is
! * complete.
! *
! * @param buf Buffer for received bytes.
! * @param len Number of bytes to receive.
! * @param timeout Timeout, in milliseconds, for receive operation
! *
! * @return SUCCESS if request was accepted, FAIL otherwise.
! */
! async command error_t receive(uint8_t *buf, uint16_t len, uint16_t timeout);
!
! /**
! * Signal completion of receiving a stream.
! *
! * @param buf Buffer for bytes received.
! * @param len Number of bytes received.
! * @param status UART error status
! *
! * @return buf A pointer to a new buffer of equal or greater length
! * as in the original <code>receive</code> call in which it intiate a
! * new packet reception (chained receive). Set to NULL to terminate further
! * reception.
! */
! async event uint8_t *receiveDone(uint8_t *buf, uint16_t len, uart_status_t status);
!
! }
!
--- 1,92 ----
! /* $Id$ */
! /*
! * Copyright (c) 2005 Arch Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arch Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
!
! /**
! * @author Phil Buonadonna
! */
!
! #include "pxa27x_serial.h"
!
! interface HalPXA27xSerialPacket
! {
! /**
! * Begin transmission of a UART stream. If SUCCESS is returned,
! * <code>sendDone</code> will be signalled when transmission is
! * complete.
! *
! * @param buf Buffer for bytes to send.
! * @param len Number of bytes to send.
! * @return SUCCESS if request was accepted, FAIL otherwise.
! */
! async command error_t send(uint8_t *buf, uint16_t len);
!
! /**
! * Signal completion of sending a stream.
! *
! * @param buf Bytes sent.
! * @param len Number of bytes sent.
! * @param status UART error status.
! *
! * @return buf A pointer to a new buffer of equal length
! * as in the original <code>send</code> call that is to be transmitted (chained
! * send). Set to NULL to end further transmissions.
! */
! async event uint8_t *sendDone(uint8_t *buf, uint16_t len, uart_status_t status);
!
! /**
! * Begin reception of a UART stream. If SUCCESS is returned,
! * <code>receiveDone</code> will be signalled when reception is
! * complete.
! *
! * @param buf Buffer for received bytes.
! * @param len Number of bytes to receive.
! * @param timeout Timeout, in milliseconds, for receive operation
! *
! * @return SUCCESS if request was accepted, FAIL otherwise.
! */
! async command error_t receive(uint8_t *buf, uint16_t len, uint16_t timeout);
!
! /**
! * Signal completion of receiving a stream.
! *
! * @param buf Buffer for bytes received.
! * @param len Number of bytes received.
! * @param status UART error status
! *
! * @return buf A pointer to a new buffer of equal or greater length
! * as in the original <code>receive</code> call in which it intiate a
! * new packet reception (chained receive). Set to NULL to terminate further
! * reception.
! */
! async event uint8_t *receiveDone(uint8_t *buf, uint16_t len, uart_status_t status);
!
! }
!
Index: HplPXA27xSTUARTC.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/pxa27x/uart/HplPXA27xSTUARTC.nc,v
retrieving revision 1.4
retrieving revision 1.5
diff -C2 -d -r1.4 -r1.5
*** HplPXA27xSTUARTC.nc 12 Dec 2006 18:23:12 -0000 1.4
--- HplPXA27xSTUARTC.nc 11 Jun 2008 00:42:13 -0000 1.5
***************
*** 1,52 ****
! /* $Id$ */
! /*
! * Copyright (c) 2005 Arch Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arch Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
! /**
! *
! * @author Phil Buonadonna
! */
!
! configuration HplPXA27xSTUARTC
! {
! provides interface Init;
! provides interface HplPXA27xUART as STUART;
! }
!
! implementation
! {
! components new HplPXA27xUARTP((uint32_t)&STRBR);
! components HplPXA27xInterruptM;
!
! Init = HplPXA27xUARTP;
! STUART = HplPXA27xUARTP.UART;
!
! HplPXA27xUARTP.UARTIrq -> HplPXA27xInterruptM.PXA27xIrq[PPID_STUART];
!
! }
--- 1,52 ----
! /* $Id$ */
! /*
! * Copyright (c) 2005 Arch Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arch Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
! /**
! *
! * @author Phil Buonadonna
! */
!
! configuration HplPXA27xSTUARTC
! {
! provides interface Init;
! provides interface HplPXA27xUART as STUART;
! }
!
! implementation
! {
! components new HplPXA27xUARTP((uint32_t)&STRBR);
! components HplPXA27xInterruptM;
!
! Init = HplPXA27xUARTP;
! STUART = HplPXA27xUARTP.UART;
!
! HplPXA27xUARTP.UARTIrq -> HplPXA27xInterruptM.PXA27xIrq[PPID_STUART];
!
! }
Index: PXA27X_UARTREG.h
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/pxa27x/uart/PXA27X_UARTREG.h,v
retrieving revision 1.4
retrieving revision 1.5
diff -C2 -d -r1.4 -r1.5
*** PXA27X_UARTREG.h 12 Dec 2006 18:23:12 -0000 1.4
--- PXA27X_UARTREG.h 11 Jun 2008 00:42:13 -0000 1.5
***************
*** 1,58 ****
! /* $Id$ */
! /*
! * Copyright (c) 2005 Arch Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arched Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
!
! /*
! * Helper macros to make programming the HplPXA27xUARTP component easier
! */
!
! #ifndef _PXA27X_UARTREG_H
! #define _PXA27X_UARTREG_H
!
! #define UARTRBR(_base) _PXAREG_OFFSET(_base,0)
! #define UARTTHR(_base) _PXAREG_OFFSET(_base,0)
! #define UARTIER(_base) _PXAREG_OFFSET(_base,0x04)
! #define UARTIIR(_base) _PXAREG_OFFSET(_base,0x08)
! #define UARTFCR(_base) _PXAREG_OFFSET(_base,0x08)
! #define UARTLCR(_base) _PXAREG_OFFSET(_base,0x0C)
! #define UARTMCR(_base) _PXAREG_OFFSET(_base,0x10)
! #define UARTLSR(_base) _PXAREG_OFFSET(_base,0x14)
! #define UARTMSR(_base) _PXAREG_OFFSET(_base,0x18)
! #define UARTSPR(_base) _PXAREG_OFFSET(_base,0x1C)
! #define UARTISR(_base) _PXAREG_OFFSET(_base,0x20)
! #define UARTFOR(_base) _PXAREG_OFFSET(_base,0x24)
! #define UARTABR(_base) _PXAREG_OFFSET(_base,0x28)
! #define UARTACR(_base) _PXAREG_OFFSET(_base,0x2C)
!
! #define UARTDLL(_base) _PXAREG_OFFSET(_base,0)
! #define UARTDLH(_base) _PXAREG_OFFSET(_base,0x04)
!
! #endif /* _PXA27X_UARTREG_H */
!
--- 1,58 ----
! /* $Id$ */
! /*
! * Copyright (c) 2005 Arch Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arched Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
!
! /*
! * Helper macros to make programming the HplPXA27xUARTP component easier
! */
!
! #ifndef _PXA27X_UARTREG_H
! #define _PXA27X_UARTREG_H
!
! #define UARTRBR(_base) _PXAREG_OFFSET(_base,0)
! #define UARTTHR(_base) _PXAREG_OFFSET(_base,0)
! #define UARTIER(_base) _PXAREG_OFFSET(_base,0x04)
! #define UARTIIR(_base) _PXAREG_OFFSET(_base,0x08)
! #define UARTFCR(_base) _PXAREG_OFFSET(_base,0x08)
! #define UARTLCR(_base) _PXAREG_OFFSET(_base,0x0C)
! #define UARTMCR(_base) _PXAREG_OFFSET(_base,0x10)
! #define UARTLSR(_base) _PXAREG_OFFSET(_base,0x14)
! #define UARTMSR(_base) _PXAREG_OFFSET(_base,0x18)
! #define UARTSPR(_base) _PXAREG_OFFSET(_base,0x1C)
! #define UARTISR(_base) _PXAREG_OFFSET(_base,0x20)
! #define UARTFOR(_base) _PXAREG_OFFSET(_base,0x24)
! #define UARTABR(_base) _PXAREG_OFFSET(_base,0x28)
! #define UARTACR(_base) _PXAREG_OFFSET(_base,0x2C)
!
! #define UARTDLL(_base) _PXAREG_OFFSET(_base,0)
! #define UARTDLH(_base) _PXAREG_OFFSET(_base,0x04)
!
! #endif /* _PXA27X_UARTREG_H */
!
Index: HplPXA27xUART.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/pxa27x/uart/HplPXA27xUART.nc,v
retrieving revision 1.4
retrieving revision 1.5
diff -C2 -d -r1.4 -r1.5
*** HplPXA27xUART.nc 12 Dec 2006 18:23:12 -0000 1.4
--- HplPXA27xUART.nc 11 Jun 2008 00:42:13 -0000 1.5
***************
*** 1,82 ****
! /* $Id$ */
! /*
! * Copyright (c) 2005 Arched Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arched Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
! /**
! * Interface to access UART peripheral register on the PXA27x. Function
! * names are based on the common portion of the names outlined in
! * the PXA27x Developers Guide.
! *
! * @author Phil Buonadonna
! */
!
! interface HplPXA27xUART
! {
! async command uint32_t getRBR();
! async command void setTHR(uint32_t val);
!
! async command void setDLL(uint32_t val);
! async command uint32_t getDLL();
!
! async command void setDLH(uint32_t val);
! async command uint32_t getDLH();
!
! async command void setIER(uint32_t val);
! async command uint32_t getIER();
!
! async command uint32_t getIIR();
!
! async command void setFCR(uint32_t val);
!
! async command void setLCR(uint32_t val);
! async command uint32_t getLCR();
!
! async command void setMCR(uint32_t val);
! async command uint32_t getMCR();
!
! async command uint32_t getLSR();
!
! async command uint32_t getMSR();
!
! async command void setSPR(uint32_t val);
! async command uint32_t getSPR();
!
! async command void setISR(uint32_t val);
! async command uint32_t getISR();
!
! async command void setFOR(uint32_t val);
! async command uint32_t getFOR();
!
! async command void setABR(uint32_t val);
! async command uint32_t getABR();
!
! async command uint32_t getACR();
!
! async event void interruptUART();
! }
--- 1,82 ----
! /* $Id$ */
! /*
! * Copyright (c) 2005 Arched Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arched Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
! /**
! * Interface to access UART peripheral register on the PXA27x. Function
! * names are based on the common portion of the names outlined in
! * the PXA27x Developers Guide.
! *
! * @author Phil Buonadonna
! */
!
! interface HplPXA27xUART
! {
! async command uint32_t getRBR();
! async command void setTHR(uint32_t val);
!
! async command void setDLL(uint32_t val);
! async command uint32_t getDLL();
!
! async command void setDLH(uint32_t val);
! async command uint32_t getDLH();
!
! async command void setIER(uint32_t val);
! async command uint32_t getIER();
!
! async command uint32_t getIIR();
!
! async command void setFCR(uint32_t val);
!
! async command void setLCR(uint32_t val);
! async command uint32_t getLCR();
!
! async command void setMCR(uint32_t val);
! async command uint32_t getMCR();
!
! async command uint32_t getLSR();
!
! async command uint32_t getMSR();
!
! async command void setSPR(uint32_t val);
! async command uint32_t getSPR();
!
! async command void setISR(uint32_t val);
! async command uint32_t getISR();
!
! async command void setFOR(uint32_t val);
! async command uint32_t getFOR();
!
! async command void setABR(uint32_t val);
! async command uint32_t getABR();
!
! async command uint32_t getACR();
!
! async event void interruptUART();
! }
Index: HplPXA27xUARTP.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-2.x/tos/chips/pxa27x/uart/HplPXA27xUARTP.nc,v
retrieving revision 1.4
retrieving revision 1.5
diff -C2 -d -r1.4 -r1.5
*** HplPXA27xUARTP.nc 12 Dec 2006 18:23:12 -0000 1.4
--- HplPXA27xUARTP.nc 11 Jun 2008 00:42:13 -0000 1.5
***************
*** 1,143 ****
! /* $Id$ */
! /*
! * Copyright (c) 2005 Arched Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arched Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
! /**
! * Provides low-level initialization, 1st level interrupt dispatch and register
! * access for the different uarts. It is a generic that's bound to
! * the particular UART upon creation.
! *
! * @param baseaddr. The base address of the associated uart. One of
! * &FFRBR, &BTRBR or &STRBR.
! * This component automatically handles setting of the DLAB bit for
! * divisor register access (DLL and DLH)
! *
! * @author Phil Buonadonna
! */
!
! #include "PXA27X_UARTREG.h"
!
! generic module HplPXA27xUARTP(uint32_t base_addr)
! {
! provides interface Init;
! provides interface HplPXA27xUART as UART;
! uses interface HplPXA27xInterrupt as UARTIrq;
! }
!
! implementation
! {
! bool m_fInit = FALSE;
!
! command error_t Init.init() {
! bool isInited;
!
! atomic {
! isInited = m_fInit;
! m_fInit = TRUE;
! }
!
! if (!isInited) {
! switch (base_addr) {
! case (0x40100000):
! CKEN |= CKEN6_FFUART;
! break;
! case (0x40200000):
! CKEN |= CKEN7_BTUART;
! break;
! case (0x40700000):
! CKEN |= CKEN5_STUART;
! break;
! default:
! break;
! }
! call UARTIrq.allocate();
! call UARTIrq.enable();
! UARTLCR(base_addr) |= LCR_DLAB;
! UARTDLL(base_addr) = 0x04;
! UARTDLH(base_addr) = 0x00;
! UARTLCR(base_addr) &= ~LCR_DLAB;
! }
!
! return SUCCESS;
! }
!
! async command uint32_t UART.getRBR() { return UARTRBR(base_addr); }
! async command void UART.setTHR(uint32_t val) { UARTTHR(base_addr) = val; }
! async command void UART.setDLL(uint32_t val) {
! UARTLCR(base_addr) |= LCR_DLAB;
! UARTDLL(base_addr) = val;
! UARTLCR(base_addr) &= ~LCR_DLAB;
! }
! async command uint32_t UART.getDLL() {
! uint32_t val;
! UARTLCR(base_addr) |= LCR_DLAB;
! val = UARTDLL(base_addr);
! UARTLCR(base_addr) &= ~LCR_DLAB;
! return val;
! }
! async command void UART.setDLH(uint32_t val) {
! UARTLCR(base_addr) |= LCR_DLAB;
! UARTDLH(base_addr) = val;
! UARTLCR(base_addr) &= ~LCR_DLAB;
! }
! async command uint32_t UART.getDLH() {
! uint32_t val;
! UARTLCR(base_addr) |= LCR_DLAB;
! val = UARTDLH(base_addr);
! UARTLCR(base_addr) &= ~LCR_DLAB;
! return val;
! }
! async command void UART.setIER(uint32_t val) { UARTIER(base_addr) = val; }
! async command uint32_t UART.getIER() { return UARTIER(base_addr); }
! async command uint32_t UART.getIIR() { return UARTIIR(base_addr); }
! async command void UART.setFCR(uint32_t val) { UARTFCR(base_addr) = val; }
! async command void UART.setLCR(uint32_t val) { UARTLCR(base_addr) = val; }
! async command uint32_t UART.getLCR() { return UARTLCR(base_addr); }
! async command void UART.setMCR(uint32_t val) { UARTMCR(base_addr) = val; }
! async command uint32_t UART.getMCR() { return UARTMCR(base_addr); }
! async command uint32_t UART.getLSR() { return UARTLSR(base_addr); }
! async command uint32_t UART.getMSR() { return UARTMSR(base_addr); }
! async command void UART.setSPR(uint32_t val) { UARTSPR(base_addr) = val; }
! async command uint32_t UART.getSPR() { return UARTSPR(base_addr); }
! async command void UART.setISR(uint32_t val) { UARTISR(base_addr) = val; }
! async command uint32_t UART.getISR() { return UARTISR(base_addr); }
! async command void UART.setFOR(uint32_t val) { UARTFOR(base_addr) = val; }
! async command uint32_t UART.getFOR() { return UARTFOR(base_addr); }
! async command void UART.setABR(uint32_t val) { UARTABR(base_addr) = val; }
! async command uint32_t UART.getABR() { return UARTABR(base_addr); }
! async command uint32_t UART.getACR() { return UARTACR(base_addr); }
!
! async event void UARTIrq.fired () {
!
! signal UART.interruptUART();
! }
!
! default async event void UART.interruptUART() { return; }
!
! }
--- 1,143 ----
! /* $Id$ */
! /*
! * Copyright (c) 2005 Arched Rock Corporation
! * All rights reserved.
! * Redistribution and use in source and binary forms, with or without
! * modification, are permitted provided that the following conditions are
! * met:
! * Redistributions of source code must retain the above copyright
! * notice, this list of conditions and the following disclaimer.
! * Redistributions in binary form must reproduce the above copyright
! * notice, this list of conditions and the following disclaimer in the
! * documentation and/or other materials provided with the distribution.
! *
! * Neither the name of the Arched Rock Corporation nor the names of its
! * contributors may be used to endorse or promote products derived from
! * this software without specific prior written permission.
! *
! * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
! * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
! * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
! * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE ARCHED
! * ROCK OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
! * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
! * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
! * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
! * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
! * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
! * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
! * DAMAGE.
! */
! /**
! * Provides low-level initialization, 1st level interrupt dispatch and register
! * access for the different uarts. It is a generic that's bound to
! * the particular UART upon creation.
! *
! * @param baseaddr. The base address of the associated uart. One of
! * &FFRBR, &BTRBR or &STRBR.
! * This component automatically handles setting of the DLAB bit for
! * divisor register access (DLL and DLH)
! *
! * @author Phil Buonadonna
! */
!
! #include "PXA27X_UARTREG.h"
!
! generic module HplPXA27xUARTP(uint32_t base_addr)
! {
! provides interface Init;
! provides interface HplPXA27xUART as UART;
! uses interface HplPXA27xInterrupt as UARTIrq;
! }
!
! implementation
! {
! bool m_fInit = FALSE;
!
! command error_t Init.init() {
! bool isInited;
!
! atomic {
! isInited = m_fInit;
! m_fInit = TRUE;
! }
!
! if (!isInited) {
! switch (base_addr) {
! case (0x40100000):
! CKEN |= CKEN6_FFUART;
! break;
! case (0x40200000):
! CKEN |= CKEN7_BTUART;
! break;
! case (0x40700000):
! CKEN |= CKEN5_STUART;
! break;
! default:
! break;
! }
! call UARTIrq.allocate();
! call UARTIrq.enable();
! UARTLCR(base_addr) |= LCR_DLAB;
! UARTDLL(base_addr) = 0x04;
! UARTDLH(base_addr) = 0x00;
! UARTLCR(base_addr) &= ~LCR_DLAB;
! }
!
! return SUCCESS;
! }
!
! async command uint32_t UART.getRBR() { return UARTRBR(base_addr); }
! async command void UART.setTHR(uint32_t val) { UARTTHR(base_addr) = val; }
! async command void UART.setDLL(uint32_t val) {
! UARTLCR(base_addr) |= LCR_DLAB;
! UARTDLL(base_addr) = val;
! UARTLCR(base_addr) &= ~LCR_DLAB;
! }
! async command uint32_t UART.getDLL() {
! uint32_t val;
! UARTLCR(base_addr) |= LCR_DLAB;
! val = UARTDLL(base_addr);
! UARTLCR(base_addr) &= ~LCR_DLAB;
! return val;
! }
! async command void UART.setDLH(uint32_t val) {
! UARTLCR(base_addr) |= LCR_DLAB;
! UARTDLH(base_addr) = val;
! UARTLCR(base_addr) &= ~LCR_DLAB;
! }
! async command uint32_t UART.getDLH() {
! uint32_t val;
! UARTLCR(base_addr) |= LCR_DLAB;
! val = UARTDLH(base_addr);
! UARTLCR(base_addr) &= ~LCR_DLAB;
! return val;
! }
! async command void UART.setIER(uint32_t val) { UARTIER(base_addr) = val; }
! async command uint32_t UART.getIER() { return UARTIER(base_addr); }
! async command uint32_t UART.getIIR() { return UARTIIR(base_addr); }
! async command void UART.setFCR(uint32_t val) { UARTFCR(base_addr) = val; }
! async command void UART.setLCR(uint32_t val) { UARTLCR(base_addr) = val; }
! async command uint32_t UART.getLCR() { return UARTLCR(base_addr); }
! async command void UART.setMCR(uint32_t val) { UARTMCR(base_addr) = val; }
! async command uint32_t UART.getMCR() { return UARTMCR(base_addr); }
! async command uint32_t UART.getLSR() { return UARTLSR(base_addr); }
! async command uint32_t UART.getMSR() { return UARTMSR(base_addr); }
! async command void UART.setSPR(uint32_t val) { UARTSPR(base_addr) = val; }
! async command uint32_t UART.getSPR() { return UARTSPR(base_addr); }
! async command void UART.setISR(uint32_t val) { UARTISR(base_addr) = val; }
! async command uint32_t UART.getISR() { return UARTISR(base_addr); }
! async command void UART.setFOR(uint32_t val) { UARTFOR(base_addr) = val; }
! async command uint32_t UART.getFOR() { return UARTFOR(base_addr); }
! async command void UART.setABR(uint32_t val) { UARTABR(base_addr) = val; }
! async command uint32_t UART.getABR() { return UARTABR(base_addr); }
! async command uint32_t UART.getACR() { return UARTACR(base_addr); }
!
! async event void UARTIrq.fired () {
!
! signal UART.interruptUART();
! }
!
! default async event void UART.interruptUART() { return; }
!
! }
- Previous message: [Tinyos-2-commits] CVS: tinyos-2.x/tos/platforms/intelmote2 HilTimerMilliC.nc, 1.2, 1.3 PlatformResetC.nc, 1.2, 1.3 toscrt0.s, 1.4, 1.5 tos.x, 1.2, 1.3
- Next message: [Tinyos-2-commits] CVS: tinyos-2.x/tos/platforms/intelmote2/chips/cc2420 HplCC2420AlarmC.nc, 1.4, 1.5 HplCC2420InterruptsC.nc, 1.4, 1.5 HplCC2420SpiC.nc, 1.4, 1.5 HplCC2420PinsC.nc, 1.4, 1.5 IM2CC2420SpiP.nc, 1.5, 1.6 IM2CC2420InitSpiP.nc, 1.4, 1.5
- Messages sorted by:
[ date ]
[ thread ]
[ subject ]
[ author ]
More information about the Tinyos-2-commits
mailing list