[Tinyos-2-commits] [tinyos-main] r5752 committed - atm128rfa1: rework the external interrupt handlers

tinyos-main at googlecode.com tinyos-main at googlecode.com
Fri Sep 16 16:56:55 PDT 2011


Revision: 5752
Author:   mmaroti
Date:     Fri Sep 16 16:56:09 2011
Log:      atm128rfa1: rework the external interrupt handlers
http://code.google.com/p/tinyos-main/source/detail?r=5752

Added:
  /trunk/tos/chips/atm128rfa1/pins/AtmegaExtInterruptC.nc
  /trunk/tos/chips/atm128rfa1/pins/HplAtmegaExtInterruptC.nc
  /trunk/tos/chips/atm128rfa1/pins/HplAtmegaExtInterruptP.nc
  /trunk/tos/chips/atm128rfa1/pins/HplAtmegaExtInterruptSig.nc
  /trunk/tos/chips/atm128rfa1/pins/HplAtmegaExtInterruptSigP.nc
Deleted:
  /trunk/tos/chips/atm128rfa1/pins/AtmegaExtInterrupt0C.nc
  /trunk/tos/chips/atm128rfa1/pins/HplAtm128InterruptC.nc
  /trunk/tos/chips/atm128rfa1/pins/HplAtm128InterruptPinP.nc
  /trunk/tos/chips/atm128rfa1/pins/HplAtm128InterruptSigP.nc
  /trunk/tos/chips/atm128rfa1/pins/HplAtmegaExtInterrupt0C.nc
  /trunk/tos/chips/atm128rfa1/pins/HplAtmegaExtInterrupt1C.nc
  /trunk/tos/chips/atm128rfa1/pins/HplAtmegaExtInterrupt2C.nc
  /trunk/tos/chips/atm128rfa1/pins/HplAtmegaExtInterrupt3C.nc
Modified:
  /trunk/tos/chips/atm128rfa1/pins/HplAtmegaExtInterrupt.nc

=======================================
--- /dev/null
+++ /trunk/tos/chips/atm128rfa1/pins/AtmegaExtInterruptC.nc	Fri Sep 16  
16:56:09 2011
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) 2011, University of Szeged
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+configuration AtmegaExtInterruptC
+{
+	provides interface GpioInterrupt[uint8_t vector];
+}
+
+implementation
+{
+	components HplAtmegaExtInterruptC;
+
+	components new AtmegaExtInterruptP() as Int0P;
+	components new AtmegaExtInterruptP() as Int1P;
+	components new AtmegaExtInterruptP() as Int2P;
+	components new AtmegaExtInterruptP() as Int3P;
+	components new AtmegaExtInterruptP() as Int4P;
+	components new AtmegaExtInterruptP() as Int5P;
+	components new AtmegaExtInterruptP() as Int6P;
+	components new AtmegaExtInterruptP() as Int7P;
+
+	GpioInterrupt[0] = Int0P;
+	GpioInterrupt[1] = Int1P;
+	GpioInterrupt[2] = Int2P;
+	GpioInterrupt[3] = Int3P;
+	GpioInterrupt[4] = Int4P;
+	GpioInterrupt[5] = Int5P;
+	GpioInterrupt[6] = Int6P;
+	GpioInterrupt[7] = Int7P;
+
+	HplAtmegaExtInterruptC.HplAtmegaExtInterrupt[0] <- Int0P;
+	HplAtmegaExtInterruptC.HplAtmegaExtInterrupt[1] <- Int1P;
+	HplAtmegaExtInterruptC.HplAtmegaExtInterrupt[2] <- Int2P;
+	HplAtmegaExtInterruptC.HplAtmegaExtInterrupt[3] <- Int3P;
+	HplAtmegaExtInterruptC.HplAtmegaExtInterrupt[4] <- Int4P;
+	HplAtmegaExtInterruptC.HplAtmegaExtInterrupt[5] <- Int5P;
+	HplAtmegaExtInterruptC.HplAtmegaExtInterrupt[6] <- Int6P;
+	HplAtmegaExtInterruptC.HplAtmegaExtInterrupt[7] <- Int7P;
+}
=======================================
--- /dev/null
+++ /trunk/tos/chips/atm128rfa1/pins/HplAtmegaExtInterruptC.nc	Fri Sep 16  
16:56:09 2011
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2011, University of Szeged
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+configuration HplAtmegaExtInterruptC
+{
+	provides interface HplAtmegaExtInterrupt[uint8_t vector];
+}
+
+implementation
+{
+	components HplAtmegaExtInterruptSigP, McuSleepC;
+
+	HplAtmegaExtInterruptSigP.McuPowerOverride <- McuSleepC;
+	HplAtmegaExtInterruptSigP.McuPowerState -> McuSleepC;
+
+	components new HplAtmegaExtInterruptP((uint8_t)&EIFR, INTF0,  
(uint8_t)&EIMSK, INT0, (uint8_t)&EICRA, ISC00) as Int0P;
+	components new HplAtmegaExtInterruptP((uint8_t)&EIFR, INTF1,  
(uint8_t)&EIMSK, INT1, (uint8_t)&EICRA, ISC10) as Int1P;
+	components new HplAtmegaExtInterruptP((uint8_t)&EIFR, INTF2,  
(uint8_t)&EIMSK, INT2, (uint8_t)&EICRA, ISC20) as Int2P;
+	components new HplAtmegaExtInterruptP((uint8_t)&EIFR, INTF3,  
(uint8_t)&EIMSK, INT3, (uint8_t)&EICRA, ISC30) as Int3P;
+	components new HplAtmegaExtInterruptP((uint8_t)&EIFR, INTF4,  
(uint8_t)&EIMSK, INT4, (uint8_t)&EICRA, ISC40) as Int4P;
+	components new HplAtmegaExtInterruptP((uint8_t)&EIFR, INTF5,  
(uint8_t)&EIMSK, INT5, (uint8_t)&EICRA, ISC50) as Int5P;
+	components new HplAtmegaExtInterruptP((uint8_t)&EIFR, INTF6,  
(uint8_t)&EIMSK, INT6, (uint8_t)&EICRA, ISC60) as Int6P;
+	components new HplAtmegaExtInterruptP((uint8_t)&EIFR, INTF7,  
(uint8_t)&EIMSK, INT7, (uint8_t)&EICRA, ISC70) as Int7P;
+
+	HplAtmegaExtInterrupt[0] = Int0P;
+	HplAtmegaExtInterrupt[1] = Int1P;
+	HplAtmegaExtInterrupt[2] = Int2P;
+	HplAtmegaExtInterrupt[3] = Int3P;
+	HplAtmegaExtInterrupt[4] = Int4P;
+	HplAtmegaExtInterrupt[5] = Int5P;
+	HplAtmegaExtInterrupt[6] = Int6P;
+	HplAtmegaExtInterrupt[7] = Int7P;
+
+	HplAtmegaExtInterruptSigP.HplAtmegaExtInterruptSig[0] <- Int0P;
+	HplAtmegaExtInterruptSigP.HplAtmegaExtInterruptSig[1] <- Int1P;
+	HplAtmegaExtInterruptSigP.HplAtmegaExtInterruptSig[2] <- Int2P;
+	HplAtmegaExtInterruptSigP.HplAtmegaExtInterruptSig[3] <- Int3P;
+	HplAtmegaExtInterruptSigP.HplAtmegaExtInterruptSig[4] <- Int4P;
+	HplAtmegaExtInterruptSigP.HplAtmegaExtInterruptSig[5] <- Int5P;
+	HplAtmegaExtInterruptSigP.HplAtmegaExtInterruptSig[6] <- Int6P;
+	HplAtmegaExtInterruptSigP.HplAtmegaExtInterruptSig[7] <- Int7P;
+}
=======================================
--- /dev/null
+++ /trunk/tos/chips/atm128rfa1/pins/HplAtmegaExtInterruptP.nc	Fri Sep 16  
16:56:09 2011
@@ -0,0 +1,92 @@
+/*
+ * Copyright (c) 2011, University of Szeged
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+generic module HplAtmegaExtInterruptP(
+	uint8_t EIFR_ADDR, uint8_t EIFR_PIN,
+	uint8_t EIMSK_ADDR, uint8_t EIMSK_PIN,
+	uint8_t EICR_ADDR, uint8_t EICR_PIN)
+{
+	provides interface HplAtmegaExtInterrupt;
+	uses interface HplAtmegaExtInterruptSig;
+}
+
+implementation
+{
+#define EIFR_REG (*(volatile uint8_t*)(EIFR_ADDR))
+#define EIMSK_REG (*(volatile uint8_t*)(EIMSK_ADDR))
+#define EICR_REG (*(volatile uint8_t*)(EICR_ADDR))
+
+// ----- external interrupt flag register (EIFR)
+
+	async event void HplAtmegaExtInterruptSig.fired() {
+		signal HplAtmegaExtInterrupt.fired();
+	}
+
+	default async event void HplAtmegaExtInterrupt.fired() { }
+
+	async command bool HplAtmegaExtInterrupt.test() {
+		return (EIFR_REG & (1<<EIFR_PIN)) != 0;
+	}
+
+	async command void HplAtmegaExtInterrupt.reset() {
+		EIFR_REG = 1<<EIFR_PIN;
+	}
+
+// ----- external interrupt mask register (EIMSK)
+
+	async command void HplAtmegaExtInterrupt.enable() {
+		EIMSK_REG |= 1<<EIMSK_PIN;
+		call HplAtmegaExtInterruptSig.update();
+	}
+
+	async command void HplAtmegaExtInterrupt.disable() {
+		EIMSK_REG &= ~(1<<EIMSK_PIN);
+		call HplAtmegaExtInterruptSig.update();
+	}
+
+	async command bool HplAtmegaExtInterrupt.isEnabled() {
+		return (EIMSK_REG & (1<<EIMSK_PIN)) != 0;
+	}
+
+// ----- external interrupt control register (EICR)
+
+	inline async command void HplAtmegaExtInterrupt.setMode(uint8_t mode) {
+		uint8_t a = EICR_REG & ~(3 << EICR_PIN);
+		EICR_REG = a | ((mode & 3) << EICR_PIN);
+	}
+
+	async command uint8_t HplAtmegaExtInterrupt.getMode() {
+		return (EICR_REG >> EICR_PIN) & 3;
+	}
+}
=======================================
--- /dev/null
+++ /trunk/tos/chips/atm128rfa1/pins/HplAtmegaExtInterruptSig.nc	Fri Sep 16  
16:56:09 2011
@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2011, University of Szeged
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+interface HplAtmegaExtInterruptSig
+{
+	/* Signalled when the interrupt is executed */
+	async event void fired();
+
+	/* Called when the interrupt is enabled/disabled */
+	async command void update();
+}
=======================================
--- /dev/null
+++ /trunk/tos/chips/atm128rfa1/pins/HplAtmegaExtInterruptSigP.nc	Fri Sep  
16 16:56:09 2011
@@ -0,0 +1,96 @@
+/*
+ * Copyright (c) 2011, University of Szeged
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the
+ *   distribution.
+ * - Neither the name of the copyright holder nor the names of
+ *   its contributors may be used to endorse or promote products derived
+ *   from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Author: Miklos Maroti
+ */
+
+module HplAtmegaExtInterruptSigP
+{
+	provides
+	{
+		interface HplAtmegaExtInterruptSig[uint8_t vector];
+		interface McuPowerOverride;
+	}
+
+	uses interface McuPowerState;
+}
+
+implementation
+{
+	AVR_ATOMIC_HANDLER( INT0_vect )	{
+		signal HplAtmegaExtInterruptSig.fired[0]();
+	}
+
+	AVR_ATOMIC_HANDLER( INT1_vect )	{
+		signal HplAtmegaExtInterruptSig.fired[1]();
+	}
+
+	AVR_ATOMIC_HANDLER( INT2_vect )	{
+		signal HplAtmegaExtInterruptSig.fired[2]();
+	}
+
+	AVR_ATOMIC_HANDLER( INT3_vect )	{
+		signal HplAtmegaExtInterruptSig.fired[3]();
+	}
+
+	AVR_ATOMIC_HANDLER( INT4_vect )	{
+		signal HplAtmegaExtInterruptSig.fired[4]();
+	}
+
+	AVR_ATOMIC_HANDLER( INT5_vect )	{
+		signal HplAtmegaExtInterruptSig.fired[5]();
+	}
+
+	AVR_ATOMIC_HANDLER( INT6_vect )	{
+		signal HplAtmegaExtInterruptSig.fired[6]();
+	}
+
+	AVR_ATOMIC_HANDLER( INT7_vect )	{
+		signal HplAtmegaExtInterruptSig.fired[7]();
+	}
+
+	default async event void HplAtmegaExtInterruptSig.fired[uint8_t vector]()  
{ }
+
+	async command void HplAtmegaExtInterruptSig.update[uint8_t vector]()
+	{
+		if( vector >= 4 )
+			call McuPowerState.update();
+	}
+
+	async command mcu_power_t McuPowerOverride.lowestState()
+	{
+		// we assume edge triggered interrupt mode (POWER_DOWN is fine for level  
triggered)
+		if( (EIMSK & 0xF0) != 0 )
+			return ATM128_POWER_IDLE;
+		else
+			return ATM128_POWER_DOWN;
+	}
+}
=======================================
--- /trunk/tos/chips/atm128rfa1/pins/AtmegaExtInterrupt0C.nc	Sun Sep  4  
02:04:37 2011
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * Copyright (c) 2011, University of Szeged
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * - Redistributions of source code must retain the above copyright
- *   notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- *   notice, this list of conditions and the following disclaimer in the
- *   documentation and/or other materials provided with the
- *   distribution.
- * - Neither the name of the copyright holder nor the names of
- *   its contributors may be used to endorse or promote products derived
- *   from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
- * OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Author: Andras Biro
- */
-
-configuration AtmegaExtInterrupt0C
-{
-  provides interface GpioInterrupt;
-}
-
-implementation
-{
-  components HplAtmegaExtInterrupt0C, new AtmegaExtInterruptP();
-
-  GpioInterrupt = AtmegaExtInterruptP;
-  AtmegaExtInterruptP.HplAtmegaExtInterrupt -> HplAtmegaExtInterrupt0C;
-}
=======================================
--- /trunk/tos/chips/atm128rfa1/pins/HplAtm128InterruptC.nc	Sun Sep  4  
02:04:37 2011
+++ /dev/null
@@ -1,154 +0,0 @@
-/// $Id: HplAtm128InterruptC.nc,v 1.5 2010-06-29 22:07:43 scipio Exp $
-
-/*
- * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * - Redistributions of source code must retain the above copyright
- *   notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- *   notice, this list of conditions and the following disclaimer in the
- *   documentation and/or other materials provided with the
- *   distribution.
- * - Neither the name of Crossbow Technology nor the names of
- *   its contributors may be used to endorse or promote products derived
- *   from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
- * OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <atm128hardware.h>
-
-/**
- * Component providing access to all external interrupt pins on ATmega128.
- * @author Martin Turon <mturon at xbow.com>
- */
-
-configuration HplAtm128InterruptC
-{
-  // provides all the ports as raw ports
-  provides {
-    interface HplAtm128Interrupt as Int0;
-    interface HplAtm128Interrupt as Int1;
-    interface HplAtm128Interrupt as Int2;
-    interface HplAtm128Interrupt as Int3;
-    interface HplAtm128Interrupt as Int4;
-    interface HplAtm128Interrupt as Int5;
-    interface HplAtm128Interrupt as Int6;
-    interface HplAtm128Interrupt as Int7;
-    interface GpioPCInterrupt as PCInt0;
-    interface GpioPCInterrupt as PCInt1;
-    interface GpioPCInterrupt as PCInt2;
-    interface GpioPCInterrupt as PCInt3;
-    interface GpioPCInterrupt as PCInt4;
-    interface GpioPCInterrupt as PCInt5;
-    interface GpioPCInterrupt as PCInt6;
-    interface GpioPCInterrupt as PCInt7;
-    interface GpioPCInterrupt as PCInt8;
-  }
-}
-implementation
-{
-#define IRQ_PORT_D_PIN(bit) (uint8_t)&EICRA, ISC##bit##0, ISC##bit##1, bit
-#define IRQ_PORT_E_PIN(bit) (uint8_t)&EICRB, ISC##bit##0, ISC##bit##1, bit
-
-
-  components
-    HplAtm128InterruptSigP as IrqVector, HplAtm128GeneralIOC as IO,
-    new HplAtm128InterruptPinP(IRQ_PORT_D_PIN(0)) as IntPin0,
-    new HplAtm128InterruptPinP(IRQ_PORT_D_PIN(1)) as IntPin1,
-    new HplAtm128InterruptPinP(IRQ_PORT_D_PIN(2)) as IntPin2,
-    new HplAtm128InterruptPinP(IRQ_PORT_D_PIN(3)) as IntPin3,
-    new HplAtm128InterruptPinP(IRQ_PORT_E_PIN(4)) as IntPin4,
-    new HplAtm128InterruptPinP(IRQ_PORT_E_PIN(5)) as IntPin5,
-    new HplAtm128InterruptPinP(IRQ_PORT_E_PIN(6)) as IntPin6,
-    new HplAtm128InterruptPinP(IRQ_PORT_E_PIN(7)) as IntPin7,
-    new HplAtm1281PCInterruptP(PCIE0, (uint8_t)&PCMSK0) as PCIntVect0,
-    new HplAtm1281PCInterruptP(PCIE1, (uint8_t)&PCMSK1) as PCIntVect1,
-    new NoPinC() as NoPin1, new NoPinC() as NoPin2, new NoPinC() as NoPin3,
-    new NoPinC() as NoPin4, new NoPinC() as NoPin5, new NoPinC() as NoPin6,
-    new NoPinC() as NoPin7,
-    McuSleepC;
-
-
-  Int0 = IntPin0;
-  Int1 = IntPin1;
-  Int2 = IntPin2;
-  Int3 = IntPin3;
-  Int4 = IntPin4;
-  Int5 = IntPin5;
-  Int6 = IntPin6;
-  Int7 = IntPin7;
-  PCInt0 = PCIntVect0.GpioPCInterrupt0;
-  PCInt1 = PCIntVect0.GpioPCInterrupt1;
-  PCInt2 = PCIntVect0.GpioPCInterrupt2;
-  PCInt3 = PCIntVect0.GpioPCInterrupt3;
-  PCInt4 = PCIntVect0.GpioPCInterrupt4;
-  PCInt5 = PCIntVect0.GpioPCInterrupt5;
-  PCInt6 = PCIntVect0.GpioPCInterrupt6;
-  PCInt7 = PCIntVect0.GpioPCInterrupt7;
-  PCInt8 = PCIntVect1.GpioPCInterrupt0;
-
-  IntPin0.IrqSignal -> IrqVector.IntSig0;
-  IntPin1.IrqSignal -> IrqVector.IntSig1;
-  IntPin2.IrqSignal -> IrqVector.IntSig2;
-  IntPin3.IrqSignal -> IrqVector.IntSig3;
-  IntPin4.IrqSignal -> IrqVector.IntSig4;
-  IntPin5.IrqSignal -> IrqVector.IntSig5;
-  IntPin6.IrqSignal -> IrqVector.IntSig6;
-  IntPin7.IrqSignal -> IrqVector.IntSig7;
-  PCIntVect0.IrqSignal -> IrqVector.PCIntSig0;
-  PCIntVect1.IrqSignal -> IrqVector.PCIntSig1;
-
-  PCIntVect0.Pin0 -> IO.PortB0;
-  PCIntVect0.Pin1 -> IO.PortB1;
-  PCIntVect0.Pin2 -> IO.PortB2;
-  PCIntVect0.Pin3 -> IO.PortB3;
-  PCIntVect0.Pin4 -> IO.PortB4;
-  PCIntVect0.Pin5 -> IO.PortB5;
-  PCIntVect0.Pin6 -> IO.PortB6;
-  PCIntVect0.Pin7 -> IO.PortB7;
-
-  PCIntVect1.Pin0 -> IO.PortE0;
-  PCIntVect1.Pin1 -> NoPin1;
-  PCIntVect1.Pin2 -> NoPin2;
-  PCIntVect1.Pin3 -> NoPin3;
-  PCIntVect1.Pin4 -> NoPin4;
-  PCIntVect1.Pin5 -> NoPin5;
-  PCIntVect1.Pin6 -> NoPin6;
-  PCIntVect1.Pin7 -> NoPin7;
-
-
-  IntPin0.McuPowerState -> McuSleepC;
-  IntPin1.McuPowerState -> McuSleepC;
-  IntPin2.McuPowerState -> McuSleepC;
-  IntPin3.McuPowerState -> McuSleepC;
-  IntPin4.McuPowerState -> McuSleepC;
-  IntPin5.McuPowerState -> McuSleepC;
-  IntPin6.McuPowerState -> McuSleepC;
-  IntPin7.McuPowerState -> McuSleepC;
-
-  IntPin0.McuPowerOverride <- McuSleepC;
-  IntPin1.McuPowerOverride <- McuSleepC;
-  IntPin2.McuPowerOverride <- McuSleepC;
-  IntPin3.McuPowerOverride <- McuSleepC;
-  IntPin4.McuPowerOverride <- McuSleepC;
-  IntPin5.McuPowerOverride <- McuSleepC;
-  IntPin6.McuPowerOverride <- McuSleepC;
-  IntPin7.McuPowerOverride <- McuSleepC;
-}
-
=======================================
--- /trunk/tos/chips/atm128rfa1/pins/HplAtm128InterruptPinP.nc	Sun Sep  4  
02:04:37 2011
+++ /dev/null
@@ -1,84 +0,0 @@
-/// $Id: HplAtm128InterruptPinP.nc,v 1.7 2010-06-29 22:07:43 scipio Exp $
-
-/*
- * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * - Redistributions of source code must retain the above copyright
- *   notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- *   notice, this list of conditions and the following disclaimer in the
- *   documentation and/or other materials provided with the
- *   distribution.
- * - Neither the name of Crossbow Technology nor the names of
- *   its contributors may be used to endorse or promote products derived
- *   from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
- * OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * Interrupt interface access for interrupt capable GPIO pins.
- *
- * @author Martin Turon <mturon at xbow.com>
- */
-generic module HplAtm128InterruptPinP (uint8_t ctrl_addr,
-  uint8_t edge0bit,
-  uint8_t edge1bit,
-  uint8_t bit) @safe()
-{
-  provides interface HplAtm128Interrupt as Irq;
-  uses interface HplAtm128InterruptSig as IrqSignal;
-  provides interface McuPowerOverride;
-  uses interface McuPowerState;
-}
-implementation
-{
-  inline async command bool Irq.getValue() { return (EIFR & (1 << bit)) !=  
0; }
-  inline async command void Irq.clear()    { EIFR = 1 << bit; }
-  inline async command void Irq.enable()   { EIMSK |= 1 << bit; call  
McuPowerState.update(); }
-  inline async command void Irq.disable()  { EIMSK &= ~(1 << bit); call  
McuPowerState.update(); }
-
-#define ctrl  (*TCAST(volatile uint8_t * ONE, ctrl_addr))
-
-  inline async command void Irq.edge(bool low_to_high) {
-    ctrl |= 1 << edge1bit; // use edge mode
-    // and select rising vs falling
-    if (low_to_high)
-      ctrl |= 1 << edge0bit;
-    else
-      ctrl &= ~(1 << edge0bit);
-  }
-
-  async command mcu_power_t McuPowerOverride.lowestState() {
-    if(bit >= 4&&EIMSK&(1<<bit)) {
-      return ATM128_POWER_SAVE;
-    }
-    else {
-      return ATM128_POWER_DOWN;
-    }
-  }
-
-  /**
-   * Forward the external interrupt event.  This ties the statically
-   * allocated interrupt vector SIG_INTERRUPT##bit to a particular
-   * pin passed in via the generic component instantiation.
-   */
-  async event void IrqSignal.fired() { signal Irq.fired(); }
-
-  default async event void Irq.fired() { }
-}
=======================================
--- /trunk/tos/chips/atm128rfa1/pins/HplAtm128InterruptSigP.nc	Sun Sep  4  
02:04:37 2011
+++ /dev/null
@@ -1,93 +0,0 @@
-/// $Id: HplAtm128InterruptSigP.nc,v 1.6 2010-06-29 22:07:43 scipio Exp $
-
-/*
- * Copyright (c) 2004-2005 Crossbow Technology, Inc.  All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * - Redistributions of source code must retain the above copyright
- *   notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- *   notice, this list of conditions and the following disclaimer in the
- *   documentation and/or other materials provided with the
- *   distribution.
- * - Neither the name of Crossbow Technology nor the names of
- *   its contributors may be used to endorse or promote products derived
- *   from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
- * OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/**
- * Interrupt interface access for interrupt capable GPIO pins.
- * Exposes just the interrupt vector routine for
- * easy linking to generic components.
- *
- * @author Martin Turon <mturon at xbow.com>
- */
-module HplAtm128InterruptSigP @safe()
-{
-  provides interface HplAtm128InterruptSig as IntSig0;
-  provides interface HplAtm128InterruptSig as IntSig1;
-  provides interface HplAtm128InterruptSig as IntSig2;
-  provides interface HplAtm128InterruptSig as IntSig3;
-  provides interface HplAtm128InterruptSig as IntSig4;
-  provides interface HplAtm128InterruptSig as IntSig5;
-  provides interface HplAtm128InterruptSig as IntSig6;
-  provides interface HplAtm128InterruptSig as IntSig7;
-}
-implementation
-{
-  default async event void IntSig0.fired() { }
-  AVR_ATOMIC_HANDLER( INT0_vect ) {
-    signal IntSig0.fired();
-  }
-
-  default async event void IntSig1.fired() { }
-  AVR_ATOMIC_HANDLER( INT1_vect ) {
-    signal IntSig1.fired();
-  }
-
-  default async event void IntSig2.fired() { }
-  AVR_ATOMIC_HANDLER( INT2_vect ) {
-    signal IntSig2.fired();
-  }
-
-  default async event void IntSig3.fired() { }
-  AVR_ATOMIC_HANDLER( INT3_vect ) {
-    signal IntSig3.fired();
-  }
-
-  default async event void IntSig4.fired() { }
-  AVR_ATOMIC_HANDLER( INT4_vect ) {
-    signal IntSig4.fired();
-  }
-
-  default async event void IntSig5.fired() { }
-  AVR_ATOMIC_HANDLER( INT5_vect ) {
-    signal IntSig5.fired();
-  }
-
-  default async event void IntSig6.fired() { }
-  AVR_ATOMIC_HANDLER( INT6_vect ) {
-    signal IntSig6.fired();
-  }
-
-  default async event void IntSig7.fired() { }
-  AVR_ATOMIC_HANDLER( INT7_vect ) {
-    signal IntSig7.fired();
-  }
-}
=======================================
--- /trunk/tos/chips/atm128rfa1/pins/HplAtmegaExtInterrupt0C.nc	Sun Sep  4  
02:04:37 2011
+++ /dev/null
@@ -1,90 +0,0 @@
-/*
- * Copyright (c) 2011, University of Szeged
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * - Redistributions of source code must retain the above copyright
- *   notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- *   notice, this list of conditions and the following disclaimer in the
- *   documentation and/or other materials provided with the
- *   distribution.
- * - Neither the name of the copyright holder nor the names of
- *   its contributors may be used to endorse or promote products derived
- *   from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
- * OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Author: Miklos Maroti
- */
-
-module HplAtmegaExtInterrupt0C
-{
-	provides interface HplAtmegaExtInterrupt;
-}
-
-#define INT_VECT	INT0_vect
-#define EIFR_REG	EIFR
-#define EIFR_PIN	INTF0
-#define EIMSK_REG	EIMSK
-#define EIMSK_PIN	INT0
-#define EICR_REG	EICRA
-#define EICR_PIN	ISC00
-
-implementation
-{
-// ----- external interrupt flag register (EIFR)
-
-	AVR_ATOMIC_HANDLER( INT_VECT )	{
-		signal HplAtmegaExtInterrupt.fired();
-	}
-
-	default async event void HplAtmegaExtInterrupt.fired() {}
-
-	async command bool HplAtmegaExtInterrupt.test() {
-		return (EIFR_REG & (1<<EIFR_PIN)) != 0;
-	}
-
-	async command void HplAtmegaExtInterrupt.reset() {
-		EIFR_REG = 1<<EIFR_PIN;
-	}
-
-// ----- external interrupt mask register (EIMSK)
-
-	async command void HplAtmegaExtInterrupt.enable() {
-		EIMSK_REG |= 1<<EIMSK_PIN;
-	}
-
-	async command void HplAtmegaExtInterrupt.disable() {
-		EIMSK_REG &= ~(1<<EIMSK_PIN);
-	}
-
-	async command bool HplAtmegaExtInterrupt.isEnabled() {
-		return (EIMSK_REG & (1<<EIMSK_PIN)) != 0;
-	}
-
-// ----- external interrupt control register (EICR)
-
-	inline async command void HplAtmegaExtInterrupt.setMode(uint8_t mode) {
-		uint8_t a = EICR_REG & ~(3 << EICR_PIN);
-		EICR_REG = a | ((mode & 3) << EICR_PIN);
-	}
-
-	async command uint8_t HplAtmegaExtInterrupt.getMode() {
-		return (EICR_REG >> EICR_PIN) & 3;
-	}
-}
=======================================
--- /trunk/tos/chips/atm128rfa1/pins/HplAtmegaExtInterrupt1C.nc	Sun Sep  4  
02:04:37 2011
+++ /dev/null
@@ -1,90 +0,0 @@
-/*
- * Copyright (c) 2011, University of Szeged
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * - Redistributions of source code must retain the above copyright
- *   notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- *   notice, this list of conditions and the following disclaimer in the
- *   documentation and/or other materials provided with the
- *   distribution.
- * - Neither the name of the copyright holder nor the names of
- *   its contributors may be used to endorse or promote products derived
- *   from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
- * OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Author: Miklos Maroti
- */
-
-module HplAtmegaExtInterrupt1C
-{
-	provides interface HplAtmegaExtInterrupt;
-}
-
-#define INT_VECT	INT1_vect
-#define EIFR_REG	EIFR
-#define EIFR_PIN	INTF1
-#define EIMSK_REG	EIMSK
-#define EIMSK_PIN	INT1
-#define EICR_REG	EICRA
-#define EICR_PIN	ISC10
-
-implementation
-{
-// ----- external interrupt flag register (EIFR)
-
-	AVR_ATOMIC_HANDLER( INT_VECT )	{
-		signal HplAtmegaExtInterrupt.fired();
-	}
-
-	default async event void HplAtmegaExtInterrupt.fired() {}
-
-	async command bool HplAtmegaExtInterrupt.test() {
-		return (EIFR_REG & (1<<EIFR_PIN)) != 0;
-	}
-
-	async command void HplAtmegaExtInterrupt.reset() {
-		EIFR_REG = 1<<EIFR_PIN;
-	}
-
-// ----- external interrupt mask register (EIMSK)
-
-	async command void HplAtmegaExtInterrupt.enable() {
-		EIMSK_REG |= 1<<EIMSK_PIN;
-	}
-
-	async command void HplAtmegaExtInterrupt.disable() {
-		EIMSK_REG &= ~(1<<EIMSK_PIN);
-	}
-
-	async command bool HplAtmegaExtInterrupt.isEnabled() {
-		return (EIMSK_REG & (1<<EIMSK_PIN)) != 0;
-	}
-
-// ----- external interrupt control register (EICR)
-
-	inline async command void HplAtmegaExtInterrupt.setMode(uint8_t mode) {
-		uint8_t a = EICR_REG & ~(3 << EICR_PIN);
-		EICR_REG = a | ((mode & 3) << EICR_PIN);
-	}
-
-	async command uint8_t HplAtmegaExtInterrupt.getMode() {
-		return (EICR_REG >> EICR_PIN) & 3;
-	}
-}
=======================================
--- /trunk/tos/chips/atm128rfa1/pins/HplAtmegaExtInterrupt2C.nc	Sun Sep  4  
02:04:37 2011
+++ /dev/null
@@ -1,90 +0,0 @@
-/*
- * Copyright (c) 2011, University of Szeged
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * - Redistributions of source code must retain the above copyright
- *   notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- *   notice, this list of conditions and the following disclaimer in the
- *   documentation and/or other materials provided with the
- *   distribution.
- * - Neither the name of the copyright holder nor the names of
- *   its contributors may be used to endorse or promote products derived
- *   from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
- * OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Author: Miklos Maroti
- */
-
-module HplAtmegaExtInterrupt2C
-{
-	provides interface HplAtmegaExtInterrupt;
-}
-
-#define INT_VECT	INT2_vect
-#define EIFR_REG	EIFR
-#define EIFR_PIN	INTF2
-#define EIMSK_REG	EIMSK
-#define EIMSK_PIN	INT2
-#define EICR_REG	EICRA
-#define EICR_PIN	ISC20
-
-implementation
-{
-// ----- external interrupt flag register (EIFR)
-
-	AVR_ATOMIC_HANDLER( INT_VECT )	{
-		signal HplAtmegaExtInterrupt.fired();
-	}
-
-	default async event void HplAtmegaExtInterrupt.fired() {}
-
-	async command bool HplAtmegaExtInterrupt.test() {
-		return (EIFR_REG & (1<<EIFR_PIN)) != 0;
-	}
-
-	async command void HplAtmegaExtInterrupt.reset() {
-		EIFR_REG = 1<<EIFR_PIN;
-	}
-
-// ----- external interrupt mask register (EIMSK)
-
-	async command void HplAtmegaExtInterrupt.enable() {
-		EIMSK_REG |= 1<<EIMSK_PIN;
-	}
-
-	async command void HplAtmegaExtInterrupt.disable() {
-		EIMSK_REG &= ~(1<<EIMSK_PIN);
-	}
-
-	async command bool HplAtmegaExtInterrupt.isEnabled() {
-		return (EIMSK_REG & (1<<EIMSK_PIN)) != 0;
-	}
-
-// ----- external interrupt control register (EICR)
-
-	inline async command void HplAtmegaExtInterrupt.setMode(uint8_t mode) {
-		uint8_t a = EICR_REG & ~(3 << EICR_PIN);
-		EICR_REG = a | ((mode & 3) << EICR_PIN);
-	}
-
-	async command uint8_t HplAtmegaExtInterrupt.getMode() {
-		return (EICR_REG >> EICR_PIN) & 3;
-	}
-}
=======================================
--- /trunk/tos/chips/atm128rfa1/pins/HplAtmegaExtInterrupt3C.nc	Sun Sep  4  
02:04:37 2011
+++ /dev/null
@@ -1,90 +0,0 @@
-/*
- * Copyright (c) 2011, University of Szeged
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * - Redistributions of source code must retain the above copyright
- *   notice, this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- *   notice, this list of conditions and the following disclaimer in the
- *   documentation and/or other materials provided with the
- *   distribution.
- * - Neither the name of the copyright holder nor the names of
- *   its contributors may be used to endorse or promote products derived
- *   from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
- * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
- * OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Author: Miklos Maroti
- */
-
-module HplAtmegaExtInterrupt3C
-{
-	provides interface HplAtmegaExtInterrupt;
-}
-
-#define INT_VECT	INT3_vect
-#define EIFR_REG	EIFR
-#define EIFR_PIN	INTF3
-#define EIMSK_REG	EIMSK
-#define EIMSK_PIN	INT3
-#define EICR_REG	EICRA
-#define EICR_PIN	ISC30
-
-implementation
-{
-// ----- external interrupt flag register (EIFR)
-
-	AVR_ATOMIC_HANDLER( INT_VECT )	{
-		signal HplAtmegaExtInterrupt.fired();
-	}
-
-	default async event void HplAtmegaExtInterrupt.fired() {}
-
-	async command bool HplAtmegaExtInterrupt.test() {
-		return (EIFR_REG & (1<<EIFR_PIN)) != 0;
-	}
-
-	async command void HplAtmegaExtInterrupt.reset() {
-		EIFR_REG = 1<<EIFR_PIN;
-	}
-
-// ----- external interrupt mask register (EIMSK)
-
-	async command void HplAtmegaExtInterrupt.enable() {
-		EIMSK_REG |= 1<<EIMSK_PIN;
-	}
-
-	async command void HplAtmegaExtInterrupt.disable() {
-		EIMSK_REG &= ~(1<<EIMSK_PIN);
-	}
-
-	async command bool HplAtmegaExtInterrupt.isEnabled() {
-		return (EIMSK_REG & (1<<EIMSK_PIN)) != 0;
-	}
-
-// ----- external interrupt control register (EICR)
-
-	inline async command void HplAtmegaExtInterrupt.setMode(uint8_t mode) {
-		uint8_t a = EICR_REG & ~(3 << EICR_PIN);
-		EICR_REG = a | ((mode & 3) << EICR_PIN);
-	}
-
-	async command uint8_t HplAtmegaExtInterrupt.getMode() {
-		return (EICR_REG >> EICR_PIN) & 3;
-	}
-}
=======================================
--- /trunk/tos/chips/atm128rfa1/pins/HplAtmegaExtInterrupt.nc	Sun Sep  4  
02:04:37 2011
+++ /trunk/tos/chips/atm128rfa1/pins/HplAtmegaExtInterrupt.nc	Fri Sep 16  
16:56:09 2011
@@ -36,7 +36,7 @@
  {
  // ----- external interrupt flag register (EIFR)

-	/* Signalled when any of the enabled pins changed */
+	/* Signalled when the interrupt is executed */
  	async event void fired();

  	/* Tests if an interrupt is pending */
@@ -59,7 +59,7 @@
  // ----- external interrupt control register (EICR)

  	/* Selects the operation mode. Must be called in atomic context
-	   and the interrupt flag should be cleared afterwards*/
+	   and the interrupt flag should be cleared afterwards */
  	async command void setMode(uint8_t mode);

  	/* Returns the operation mode */


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