[Tinyos-beta-commits] CVS: tinyos-1.x/beta/platform/pxa27x
HPLClock.nc, NONE, 1.1 HPLInit.nc, NONE, 1.1 HPLPotC.nc, NONE,
1.1 HPLPowerManagementM.nc, NONE, 1.1 PXA27XClockM.nc, NONE,
1.1 PXA27XGPIOInt.nc, NONE, 1.1 PXA27XGPIOIntM.nc, NONE,
1.1 PXA27XInterrupt.nc, NONE, 1.1 PXA27XInterruptM.nc, NONE,
1.1 README.txt, NONE, 1.1 arm_defs.h, NONE, 1.1 inttypes.h,
NONE, 1.1 pxa27x_registers.h, NONE, 1.1 pxa27xhardware.h, NONE, 1.1
Philip Buonadonna
philipb at users.sourceforge.net
Fri Nov 12 17:12:42 PST 2004
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Update of /cvsroot/tinyos/tinyos-1.x/beta/platform/pxa27x
In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv31172
Added Files:
HPLClock.nc HPLInit.nc HPLPotC.nc HPLPowerManagementM.nc
PXA27XClockM.nc PXA27XGPIOInt.nc PXA27XGPIOIntM.nc
PXA27XInterrupt.nc PXA27XInterruptM.nc README.txt arm_defs.h
inttypes.h pxa27x_registers.h pxa27xhardware.h
Log Message:
- Initial import of pxa27x support (beta)
--- NEW FILE: HPLClock.nc ---
/* tab:4
*
*
* "Copyright (c) 2000-2002 The Regents of the University of California.
* All rights reserved.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation for any purpose, without fee, and without written agreement is
* hereby granted, provided that the above copyright notice, the following
* two paragraphs and the author appear in all copies of this software.
*
* IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
* DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
* OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
* CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS
* ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
* PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
*
*/
/* tab:4
* IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By
* downloading, copying, installing or using the software you agree to
* this license. If you do not agree to this license, do not download,
* install, copy or use the software.
*
* Intel Open Source License
*
* Copyright (c) 2002 Intel Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* Neither the name of the Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*/
configuration HPLClock {
provides interface Clock;
provides interface StdControl;
}
implementation
{
components PXA27XClockM,PXA27XInterruptM;
Clock = PXA27XClockM;
StdControl = PXA27XClockM;
PXA27XClockM.OSTIrq -> PXA27XInterruptM.PXA27XIrq[PPID_OST_4_11];
}
--- NEW FILE: HPLInit.nc ---
/* tab:4
*
*
* "Copyright (c) 2000-2002 The Regents of the University of California.
* All rights reserved.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation for any purpose, without fee, and without written agreement is
* hereby granted, provided that the above copyright notice, the following
* two paragraphs and the author appear in all copies of this software.
*
* IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
* DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
* OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
* CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS
* ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
* PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
*
*/
/* tab:4
* IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By
* downloading, copying, installing or using the software you agree to
* this license. If you do not agree to this license, do not download,
* install, copy or use the software.
*
* Intel Open Source License
*
* Copyright (c) 2002 Intel Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* Neither the name of the Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*/
/*
*
* Authors: Jason Hill, David Gay, Philip Levis
* Date last modified: 6/25/02
*
*/
// The hardware presentation layer. See hpl.h for the C side.
// Note: there's a separate C side (hpl.h) to get access to the avr macros
// The model is that HPL is stateless. If the desired interface is as stateless
// it can be implemented here (Clock, FlashBitSPI). Otherwise you should
// create a separate component
module HPLInit {
provides command result_t init();
}
implementation
{
command result_t init() {
CKEN = (CKEN22_MEMC | CKEN20_IMEM | CKEN9_OST);
OSCC = (OSCC_OON);
while ((OSCC & OSCC_OOK) == 0);
TOSH_SET_PIN_DIRECTIONS();
return SUCCESS;
}
}
--- NEW FILE: HPLPotC.nc ---
/* tab:4
*
*
* "Copyright (c) 2000-2002 The Regents of the University of California.
* All rights reserved.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation for any purpose, without fee, and without written agreement is
* hereby granted, provided that the above copyright notice, the following
* two paragraphs and the author appear in all copies of this software.
*
* IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
* DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
* OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
* CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS
* ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
* PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
*
*/
/* tab:4
* IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By
* downloading, copying, installing or using the software you agree to
* this license. If you do not agree to this license, do not download,
* install, copy or use the software.
*
* Intel Open Source License
*
* Copyright (c) 2002 Intel Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* Neither the name of the Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*/
/*
*
* Authors: Jason Hill, David Gay, Philip Levis
* Date last modified: 6/25/02
*
*/
// The hardware presentation layer. See hpl.h for the C side.
// Note: there's a separate C side (hpl.h) to get access to the avr macros
// The model is that HPL is stateless. If the desired interface is as stateless
// it can be implemented here (Clock, FlashBitSPI). Otherwise you should
// create a separate component
module HPLPotC {
provides interface HPLPot as Pot;
}
implementation
{
command result_t Pot.decrease() {
/* Stub out the implementation. This is only needed for avr motes
TOSH_SET_UD_PIN();
TOSH_CLR_POT_SELECT_PIN();
TOSH_SET_INC_PIN();
TOSH_CLR_INC_PIN();
TOSH_SET_POT_SELECT_PIN();
*/
return SUCCESS;
}
command result_t Pot.increase() {
/* Stub out the implementation. This is only needed for avr motes
TOSH_CLR_UD_PIN();
TOSH_CLR_POT_SELECT_PIN();
TOSH_SET_INC_PIN();
TOSH_CLR_INC_PIN();
TOSH_SET_POT_SELECT_PIN();
*/
return SUCCESS;
}
command result_t Pot.finalise() {
/* Stub out the implementation. This is only needed for avr motes
TOSH_SET_UD_PIN();
TOSH_SET_INC_PIN();
*/
return SUCCESS;
}
}
--- NEW FILE: HPLPowerManagementM.nc ---
// $Id: HPLPowerManagementM.nc,v 1.1 2004/11/13 01:12:40 philipb Exp $
/* tab:4
* "Copyright (c) 2000-2003 The Regents of the University of California.
* All rights reserved.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation for any purpose, without fee, and without written agreement is
* hereby granted, provided that the above copyright notice, the following
* two paragraphs and the author appear in all copies of this software.
*
* IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
* DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
* OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
* CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS
* ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
* PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
*
* Copyright (c) 2002-2003 Intel Corporation
* All rights reserved.
*
* This file is distributed under the terms in the attached INTEL-LICENSE
* file. If you do not find these files, copies can be found by writing to
* Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
* 94704. Attention: Intel License Inquiry.
*/
/* Author: Robert Szewczyk
*
* $Id: HPLPowerManagementM.nc,v 1.1 2004/11/13 01:12:40 philipb Exp $
*/
/**
* @author Robert Szewczyk
*/
module HPLPowerManagementM {
provides {
interface PowerManagement;
command result_t Enable();
command result_t Disable();
}
}
implementation{
bool disabled = TRUE;
async command uint8_t PowerManagement.adjustPower() {
return 0;
}
command result_t Enable() {
atomic disabled = FALSE;
return SUCCESS;
}
command result_t Disable() {
atomic disabled = TRUE;
return SUCCESS;
}
}
--- NEW FILE: PXA27XClockM.nc ---
/* tab:4
*
*
* "Copyright (c) 2000-2002 The Regents of the University of California.
* All rights reserved.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation for any purpose, without fee, and without written agreement is
* hereby granted, provided that the above copyright notice, the following
* two paragraphs and the author appear in all copies of this software.
*
* IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
* DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
* OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
* CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS
* ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
* PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
*
*/
/* tab:4
* IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By
* downloading, copying, installing or using the software you agree to
* this license. If you do not agree to this license, do not download,
* install, copy or use the software.
*
* Intel Open Source License
*
* Copyright (c) 2002 Intel Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* Neither the name of the Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*/
/* @author Phil Buonadonna
*/
module PXA27XClockM {
provides interface Clock;
provides interface StdControl;
uses interface PXA27XInterrupt as OSTIrq;
}
implementation
{
/* This implementation of Clock uses the PXA27x OST Channel 5 and only
* supports the use of TimerM.
*/
uint8_t gmScale;
uint8_t gmInterval;
uint8_t gmCounter;
async event void OSTIrq.fired() {
bool fFireEvent = FALSE;
if (OSSR & OIER_E5) {
atomic {
gmCounter++;
if (gmCounter >= gmInterval) {
gmCounter = 0;
fFireEvent = TRUE;
}
OSSR = (OIER_E5); // Reset the Status register bit.
}
if (fFireEvent) {
signal Clock.fire();
}
}
}
command result_t StdControl.init() {
atomic {
gmScale = DEFAULT_SCALE;
gmInterval = DEFAULT_INTERVAL;
gmCounter = 0;
}
/* Disable all clock interrupts */
//OIER = 0x0UL;
call OSTIrq.allocate();
return SUCCESS;
}
command result_t StdControl.start() {
uint8_t mInt, mScl;
atomic {
mInt = gmInterval;
mScl = gmScale;
gmCounter = 0;
}
OMCR5 = (OMCR_C | OMCR_P | OMCR_R | OMCR_CRES(0x1)); // Resolution = 1/32768th sec
call Clock.setRate(mInt,mScl);
atomic {
OIER |= (OIER_E5); // Enable the interrupts
}
call OSTIrq.enable();
OSCR5 = 0x0UL; // Start the counter
return SUCCESS;
}
command result_t StdControl.stop() {
atomic {
OIER &= ~(OIER_E5); // Disable interrupts on channel 5
}
call OSTIrq.disable();
OMCR5 = 0x0UL; // Disable the counter..
return SUCCESS;
}
async command result_t Clock.setRate(char interval, char scale) {
// roughly translate mica's clock since it sits in the common interface
// directory. Base on interfaces/Clock.h the following mapping is ~correct.
uint32_t rate;
atomic {
gmScale = scale;
gmInterval = interval;
gmCounter = 0;
}
call OSTIrq.allocate();
switch (scale) {
case 0: rate = (0 << 0); break;
case 1: rate = (1 << 0); break;
case 2: rate = (1 << 3); break;
case 3: rate = (1 << 5); break;
case 4: rate = (1 << 6); break;
case 5: rate = (1 << 7); break;
case 6: rate = (1 << 8); break;
default: rate = 0;
}
// Set OS Timer Match Register 5 to the given rate
OMCR5 = (OMCR_C | OMCR_P | OMCR_R | OMCR_CRES(0x1)); // Resolution = 1/32768th sec
OSMR5 = rate;
call OSTIrq.enable();
atomic {
OIER |= (OIER_E5); // Enable the interrupts
}
OSCR5 = 0x0UL; // Start the counter
return SUCCESS;
}
async command void Clock.setInterval(uint8_t value) {
atomic {
gmInterval = value;
}
return;
}
async command void Clock.setNextInterval(uint8_t value) {
}
async command uint8_t Clock.getInterval() {
uint8_t ItvlVal;
atomic {
ItvlVal = gmInterval;
}
return ItvlVal;
}
async command uint8_t Clock.getScale() {
}
async command void Clock.setNextScale(uint8_t scale) {
}
async command result_t Clock.setIntervalAndScale(uint8_t interval, uint8_t scale) {
}
async command uint8_t Clock.readCounter() {
uint8_t CntrVal;
atomic {
CntrVal = gmCounter;
}
return CntrVal;
}
async command void Clock.setCounter(uint8_t n) {
}
async command void Clock.intDisable() {
}
async command void Clock.intEnable() {
}
default async event result_t Clock.fire() { return SUCCESS; }
}
--- NEW FILE: PXA27XGPIOInt.nc ---
//$Id: PXA27XGPIOInt.nc,v 1.1 2004/11/13 01:12:40 philipb Exp $
/* tab:4
* IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By
* downloading, copying, installing or using the software you agree to
* this license. If you do not agree to this license, do not download,
* install, copy or use the software.
*
* Intel Open Source License
*
* Copyright (c) 2002 Intel Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* Neither the name of the Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*/
//@author Phil Buonadonna
interface PXA27XGPIOInt
{
async command void enable(uint8_t mode);
async command void disable();
async command void clear();
async event void fired();
}
--- NEW FILE: PXA27XGPIOIntM.nc ---
// $Id: PXA27XGPIOIntM.nc,v 1.1 2004/11/13 01:12:40 philipb Exp $
/* tab:4
* IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By
* downloading, copying, installing or using the software you agree to
* this license. If you do not agree to this license, do not download,
* install, copy or use the software.
*
* Intel Open Source License
*
* Copyright (c) 2002 Intel Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* Neither the name of the Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*/
//@author Phil Buonadonna
module PXA27XGPIOIntM {
provides {
interface StdControl;
interface PXA27XGPIOInt[uint8_t pin];
}
uses {
interface PXA27XInterrupt as GPIOIrq; // GPIO 2 - 120 only
interface PXA27XInterrupt as GPIOIrq0;
interface PXA27XInterrupt as GPIOIrq1;
}
}
implementation {
bool gfInitialized = FALSE;
command result_t StdControl.init() {
bool isInited;
atomic {
isInited = gfInitialized;
gfInitialized = TRUE;
}
if (!isInited) {
call GPIOIrq0.allocate();
call GPIOIrq1.allocate();
call GPIOIrq.allocate();
}
return SUCCESS;
}
command result_t StdControl.start() {
call GPIOIrq0.enable();
call GPIOIrq1.enable();
call GPIOIrq.enable();
return SUCCESS;
}
command result_t StdControl.stop() {
return SUCCESS;
}
async command void PXA27XGPIOInt.enable[uint8_t pin](uint8_t mode)
{
if (pin < 121) {
switch (mode) {
case TOSH_RISING_EDGE:
_GRER(pin) |= _GPIO_bit(pin);
_GFER(pin) &= ~(_GPIO_bit(pin));
break;
case TOSH_FALLING_EDGE:
_GRER(pin) &= ~(_GPIO_bit(pin));
_GFER(pin) |= _GPIO_bit(pin);
break;
case TOSH_BOTH_EDGE:
_GRER(pin) |= _GPIO_bit(pin);
_GFER(pin) |= _GPIO_bit(pin);
break;
default:
break;
}
}
return;
}
async command void PXA27XGPIOInt.disable[uint8_t pin]()
{
if (pin < 121) {
_GRER(pin) &= ~(_GPIO_bit(pin));
_GFER(pin) &= ~(_GPIO_bit(pin));
}
return;
}
async command void PXA27XGPIOInt.clear[uint8_t pin]()
{
if (pin < 121) {
_GEDR(pin) = _GPIO_bit(pin);
}
return;
}
default async event void PXA27XGPIOInt.fired[uint8_t pin]()
{
return;
}
async event void GPIOIrq.fired()
{
uint32_t DetectReg;
uint8_t pin;
uint8_t i;
atomic DetectReg = GEDR0;
for (i = 0;i < 32; i++) {
if (DetectReg & (1 << i)) {
pin = i;
signal PXA27XGPIOInt.fired[pin]();
}
}
atomic DetectReg = GEDR1;
for (i = 0;i < 32; i++) {
if (DetectReg & (1 << i)) {
pin = 32 + i;
signal PXA27XGPIOInt.fired[pin]();
}
}
atomic DetectReg = GEDR2;
for (i = 0;i < 32; i++) {
if (DetectReg & (1 << i)) {
pin = 64 + i;
signal PXA27XGPIOInt.fired[pin]();
}
}
atomic DetectReg = GEDR3;
for (i = 0;i < 32; i++) {
if (DetectReg & (1 << i)) {
pin = 96 + i;
signal PXA27XGPIOInt.fired[pin]();
}
}
return;
}
async event void GPIOIrq0.fired()
{
signal PXA27XGPIOInt.fired[0]();
}
async event void GPIOIrq1.fired()
{
signal PXA27XGPIOInt.fired[1]();
}
}
--- NEW FILE: PXA27XInterrupt.nc ---
// $Id: PXA27XInterrupt.nc,v 1.1 2004/11/13 01:12:40 philipb Exp $
/* tab:4
* IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By
* downloading, copying, installing or using the software you agree to
* this license. If you do not agree to this license, do not download,
* install, copy or use the software.
*
* Intel Open Source License
*
* Copyright (c) 2002 Intel Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* Neither the name of the Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*/
/*
*
* Authors: Phil Buonadonna
*/
interface PXA27XInterrupt
{
async command result_t allocate();
async command void enable();
async command void disable();
async event void fired();
}
--- NEW FILE: PXA27XInterruptM.nc ---
// $Id: PXA27XInterruptM.nc,v 1.1 2004/11/13 01:12:40 philipb Exp $
/* tab:4
* IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By
* downloading, copying, installing or using the software you agree to
* this license. If you do not agree to this license, do not download,
* install, copy or use the software.
*
* Intel Open Source License
*
* Copyright (c) 2002 Intel Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* Neither the name of the Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*/
/*
*
* Authors: Phil Buonadonna
*/
module PXA27XInterruptM
{
provides {
interface PXA27XInterrupt as PXA27XIrq[uint8_t id];
interface PXA27XInterrupt as PXA27XFiq[uint8_t id];
}
}
implementation {
/* Core PXA27X interrupt dispatch vectors */
/* DO NOT change the name of these functions */
void hplarmv_irq() __attribute__ ((interrupt ("IRQ"), spontaneous, C)) {
uint32_t IRQPending;
IRQPending = ICHP; // Determine which interrupt to service
IRQPending >>= 16; // Right justify to the IRQ portion
while (IRQPending & (1 << 15)) {
uint8_t PeripheralID = (IRQPending & 0x1f); // Get rid of the Valid bit
signal PXA27XIrq.fired[PeripheralID](); // Handler is responsible for clearing interrupt
IRQPending = ICHP; // Determine which interrupt to service
IRQPending >>= 16; // Right justify to the IRQ portion
}
return;
}
void hplarmv_fiq() __attribute__ ((interrupt ("FIQ"), spontaneous, C)) {
uint32_t FIQPending;
FIQPending = ICHP; // Determine which interrupt to service
FIQPending &= 0xFF; // Mask off the IRQ portion
while (FIQPending & (1 << 15)) {
uint8_t PeripheralID = (FIQPending & 0x1f); // Get rid of the Valid bit
signal PXA27XFiq.fired[PeripheralID](); // Handler is responsible for clearing interrupt
FIQPending = ICHP;
FIQPending &= 0xFF;
}
return;
}
/* Helper functions */
/* NOTE: Read-back of all register writes is necessary to ensure the data latches */
result_t allocate(uint8_t id, bool level, uint8_t priority)
{
uint32_t tmp;
result_t result = FAIL;
atomic {
if ((id < 34) && (priority < 32)) {
if (!(IPR(priority) & IPR_VALID)) {
IPR(priority) = (IPR_VALID | (id));
tmp = IPR(priority);
if (level) {
_ICLR(id) |= _PPID_Bit(id);
tmp = _ICLR(id);
}
}
result = SUCCESS;
}
}
return result;
}
void enable(uint8_t id)
{
uint32_t tmp;
atomic {
if (id < 34) {
_ICMR(id) |= _PPID_Bit(id);
tmp = _ICMR(id);
}
}
return;
}
void disable(uint8_t id)
{
uint32_t tmp;
atomic {
if (id < 34) {
_ICMR(id) &= ~(_PPID_Bit(id));
tmp = _ICMR(id);
}
}
return;
}
/* Interface implementation */
async command result_t PXA27XIrq.allocate[uint8_t id]()
{
return allocate(id, FALSE, TOSH_IRP_TABLE[id]);
}
async command void PXA27XIrq.enable[uint8_t id]()
{
enable(id);
return;
}
async command void PXA27XIrq.disable[uint8_t id]()
{
disable(id);
return;
}
async command result_t PXA27XFiq.allocate[uint8_t id]()
{
return allocate(id, TRUE, TOSH_IRP_TABLE[id]);
}
async command void PXA27XFiq.enable[uint8_t id]()
{
enable(id);
return;
}
async command void PXA27XFiq.disable[uint8_t id]()
{
disable(id);
return;
}
default async event void PXA27XIrq.fired[uint8_t id]()
{
return;
}
default async event void PXA27XFiq.fired[uint8_t id]()
{
return;
}
}
--- NEW FILE: README.txt ---
Project: imote2 & pxa27x platform support beta
Description: TinyOS support files for the imote2 platform using the Intel PXA27X processor with
the CC2420 Radio.
Team Members:
- Philip Buonadonna (phil.buonadonna at intel.com)
- Ralph Kling (ralph.kling. at intel.com)
- Lama Nachman (lama.nachman at intel.com)
- Robert Adler (robert.p.adler at intel.com)
- Vincent Hummel (vincent.hummel at intel.com)
--- NEW FILE: arm_defs.h ---
/* tab:4
* IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By
* downloading, copying, installing or using the software you agree to
* this license. If you do not agree to this license, do not download,
* install, copy or use the software.
*
* Intel Open Source License
*
* Copyright (c) 2002 Intel Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* Neither the name of the Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*/
/*
*
* Authors: Philip Buonadonna
*
*
*/
#ifndef _ARM_DEFS_H
#define _ARM_DEFS_H
#define ARM_CPSR_MODE_MASK (0x0000001F)
#define ARM_CPSR_INT_MASK (0x000000C0)
#define ARM_CPSR_COND_MASK (0xF8000000)
#define ARM_CPSR_MODE_USR (0x10)
#define ARM_CPSR_MODE_FIQ (0x11)
#define ARM_CPSR_MODE_IRQ (0x12)
#define ARM_CPSR_MODE_SVC (0x13)
#define ARM_CPSR_MODE_ABT (0x17)
#define ARM_CPSR_MODE_UND (0x1B)
#define ARM_CPSR_MODE_SYS (0x1F)
#define ARM_CPSR_BIT_N (1 << 31)
#define ARM_CPSR_BIT_Z (1 << 30)
#define ARM_CPSR_BIT_C (1 << 29)
#define ARM_CPSR_BIT_V (1 << 28)
#define ARM_CPSR_BIT_Q (1 << 27)
#define ARM_CPSR_BIT_I (1 << 7)
#define ARM_CPSR_BIT_F (1 << 6)
#define ARM_CPRS_BIT_T (1 << 5)
#endif /*_ARM_DEFS_H */
--- NEW FILE: inttypes.h ---
#ifndef __INTTYPES_H_
#define __INTTYPES_H_
typedef signed char int8_t;
typedef unsigned char uint8_t;
typedef short int16_t;
typedef unsigned short uint16_t;
typedef int int32_t;
typedef unsigned int uint32_t;
typedef long long int64_t;
typedef unsigned long long uint64_t;
typedef int32_t intptr_t;
typedef uint32_t uintptr_t;
#endif
--- NEW FILE: pxa27x_registers.h ---
// $Id: pxa27x_registers.h,v 1.1 2004/11/13 01:12:40 philipb Exp $
/* tab:4
* IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By
* downloading, copying, installing or using the software you agree to
* this license. If you do not agree to this license, do not download,
* install, copy or use the software.
*
* Intel Open Source License
*
* Copyright (c) 2002 Intel Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
[...1283 lines suppressed...]
#define MSRXFIFO _PXAREG(0x41800018) /* MSHC Receive FIFO register 17-14 */
#define MSTXFIFO _PXAREG(0x4180001C) /* MSHC Transmit FIFO register 17-15 */
/******************************************************************************/
/* Synchronous Serial Port 3 */
/******************************************************************************/
#define SSCR0_3 _PXAREG(0x41900000) /* SSP 3 Control register 0 8-25 */
#define SSCR1_3 _PXAREG(0x41900004) /* SSP 3 Control register 1 8-29 */
#define SSSR_3 _PXAREG(0x41900008) /* SSP 3 Status register 8-43 */
#define SSITR_3 _PXAREG(0x4190000C) /* SSP 3 Interrupt Test register 8-42 */
#define SSDR_3 _PXAREG(0x41900010) /* SSP 3 Data Write register/Data Read register 8-48 */
#define SSTO_3 _PXAREG(0x41900028) /* SSP 3 Time-Out register 8-41 */
#define SSPSP_3 _PXAREG(0x4190002C) /* SSP 3 Programmable Serial Protocol 8-39 */
#define SSTSA_3 _PXAREG(0x41900030) /* SSP TX Timeslot Active register 8-48 */
#define SSRSA_3 _PXAREG(0x41900034) /* SSP RX Timeslot Active register 8-49 */
#define SSTSS_3 _PXAREG(0x41900038) /* SSP Timeslot Status register 8-50 */
#define SSACD_3 _PXAREG(0x4190003C) /* SSP Audio Clock Divider register 8-51 */
#endif /* _PXA27X_REGISTER_H */
--- NEW FILE: pxa27xhardware.h ---
// $Id: pxa27xhardware.h,v 1.1 2004/11/13 01:12:40 philipb Exp $
/* tab:4
* IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By
* downloading, copying, installing or using the software you agree to
* this license. If you do not agree to this license, do not download,
* install, copy or use the software.
*
* Intel Open Source License
*
* Copyright (c) 2002 Intel Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* Neither the name of the Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*/
/* tab:4
*
*
* "Copyright (c) 2000-2002 The Regents of the University of California.
* All rights reserved.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation for any purpose, without fee, and without written agreement is
* hereby granted, provided that the above copyright notice, the following
* two paragraphs and the author appear in all copies of this software.
*
* IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
* DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
* OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
* CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS
* ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
* PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
*
*/
/*
*
* Authors: Philip Buonadonna
*
*
*/
#ifndef PXA27X_HARDWARE_H
#define PXA27X_HARDWARE_H
#include "arm_defs.h"
#include "pxa27x_registers.h"
#define TOSH_ASSIGN_PIN(name, port, regbit) \
static inline void TOSH_SET_##name##_PIN() {_GPSR(regbit) |= _GPIO_bit(regbit);} \
static inline void TOSH_CLR_##name##_PIN() {_GPCR(regbit) |= _GPIO_bit(regbit);} \
static inline char TOSH_READ_##name##_PIN() {return ((_GPLR(regbit) & _GPIO_bit(regbit)) != 0);} \
static inline void TOSH_MAKE_##name##_OUTPUT() {_GPIO_setaltfn(regbit,0);_GPDR(regbit) |= _GPIO_bit(regbit);} \
static inline void TOSH_MAKE_##name##_INPUT() {_GPIO_setaltfn(regbit,0);_GPDR(regbit) &= ~(_GPIO_bit(regbit));}
#define TOSH_ASSIGN_OUTPUT_ONLY_PIN(name, port, regbit) \
static inline void TOSH_SET_##name##_PIN() {_GPSR(regbit) |= _GPIO_bit(regbit);} \
static inline void TOSH_CLR_##name##_PIN() {_GPCR(regbit) |= _GPIO_bit(regbit);} \
static inline void TOSH_MAKE_##name##_OUTPUT() {_GPDR(regbit) |= _GPIO_bit(regbit);}
// We need slightly different defs than SIGNAL, INTERRUPT
#define TOSH_SIGNAL(signame) \
void signame() __attribute__ ((signal, spontaneous, C))
#define TOSH_INTERRUPT(signame) \
void signame() __attribute__ ((interrupt, spontaneous, C))
// GPIO Interrupt Defines
#define TOSH_RISING_EDGE (1)
#define TOSH_FALLING_EDGE (2)
#define TOSH_BOTH_EDGE (3)
void TOSH_wait()
{
asm volatile("nop");
asm volatile("nop");
}
void TOSH_sleep()
{
// Place PXA into idle
asm volatile (
"mcr p14,0,%0,c7,c0,0"
:
: "r" (1)
);
}
/**
* (Busy) wait <code>usec</code> microseconds
*/
inline void TOSH_uwait(uint16_t usec)
{
uint32_t mark = usec;
mark <<= 2;
mark *= 13;
mark >>= 2;
OSCR0 = 0;
while (OSCR0 < mark);
}
typedef uint32_t __nesc_atomic_t;
inline __nesc_atomic_t __nesc_atomic_start(void) __attribute__((spontaneous))
{
uint32_t result = 0;
uint32_t temp = 0;
asm volatile (
"mrs %0,CPSR\n\t"
"orr %1,%2,%4\n\t"
"msr CPSR_cf,%3"
: "=r" (result) , "=r" (temp)
: "0" (result) , "1" (temp) , "i" (ARM_CPSR_INT_MASK)
);
return result;
}
inline void __nesc_atomic_end(__nesc_atomic_t oldState) __attribute__((spontaneous))
{
uint32_t statusReg = 0;
asm volatile (
"mrs %0,CPSR\n\t"
"bic %0, %1, %2\n\t"
"orr %0, %1, %3\n\t"
"msr CPSR_c, %1"
: "=r" (statusReg)
: "0" (statusReg),"i" (ARM_CPSR_INT_MASK), "r" (oldState)
);
return;
}
inline void __nesc_enable_interrupt() {
uint32_t statusReg = 0;
asm volatile (
"mrs %0,CPSR\n\t"
"bic %0,%1,#0xc0\n\t"
"msr CPSR_c, %1"
: "=r" (statusReg)
: "0" (statusReg)
);
return;
}
#endif //TOSH_HARDWARE_H
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