[Tinyos-beta-commits] CVS: tinyos-1.x/beta/platform/pxa27x DMA.h,
NONE, 1.1 PXA27XHPLDMA.nc, NONE, 1.1 PXA27XHPLDMAC.nc, NONE,
1.1 PXA27XHPLDMAM.nc, NONE, 1.1 PXA27XDMAC.nc, 1.1,
1.2 PXA27XDMAChannel.nc, 1.1, 1.2 PXA27XDMAM.nc, 1.1, 1.2
Robbie Adler
radler at users.sourceforge.net
Thu Aug 18 16:07:15 PDT 2005
- Previous message: [Tinyos-beta-commits] CVS: tinyos-1.x/beta/platform/pxa27x
HPLInit.nc, 1.4, 1.5 mmu_table.s, 1.1, 1.2 util.s, 1.1, 1.2
- Next message: [Tinyos-beta-commits] CVS: tinyos-1.x/beta/platform/pxa27x
GlobalUtil.h, NONE, 1.1 SSP.h, NONE, 1.1
- Messages sorted by:
[ date ]
[ thread ]
[ subject ]
[ author ]
Update of /cvsroot/tinyos/tinyos-1.x/beta/platform/pxa27x
In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv26791
Modified Files:
PXA27XDMAC.nc PXA27XDMAChannel.nc PXA27XDMAM.nc
Added Files:
DMA.h PXA27XHPLDMA.nc PXA27XHPLDMAC.nc PXA27XHPLDMAM.nc
Log Message:
initial update of functional DMA components and interfaces
--- NEW FILE: DMA.h ---
#ifndef __DMA_H_
#define __DMA_H_
typedef enum
{
DMA_8ByteBurst = 1,
DMA_16ByteBurst,
DMA_32ByteBurst
} DMAMaxBurstSize_t;
typedef enum
{
DMA_NonPeripheralWidth = 0 ,
DMA_1ByteWidth,
DMA_2ByteWidth,
DMA_4ByteWidth
} DMATransferWidth_t;
typedef enum
{
DMA_Priority1 = 1 ,
DMA_Priority2 = 2,
DMA_Priority3 = 4,
DMA_Priority4 = 8
} DMAPriority_t;
typedef enum
{
DMAID_DREQ0 = 0,
DMAID_DREQ1,
DMAID_I2S_RX,
DMAID_I2S_TX,
DMAID_BTUART_RX,
DMAID_BTUART_TX,
DMAID_FFUART_RX,
DMAID_FFUART_TX,
DMAID_AC97_MIC,
DMAID_AC97_MODEMRX,
DMAID_AC97_MODEMTX,
DMAID_AC97_AUDIORX,
DMAID_AC97_AUDIOTX,
DMAID_SSP1_RX,
DMAID_SSP1_TX,
DMAID_SSP2_RX,
DMAID_SSP2_TX,
DMAID_ICP_RX,
DMAID_ICP_TX,
DMAID_STUART_RX,
DMAID_STUART_TX,
DMAID_MMC_RX,
DMAID_MMC_TX,
DMAID_USB_END0 = 24,
DMAID_USB_ENDA,
DMAID_USB_ENDB,
DMAID_USB_ENDC,
DMAID_USB_ENDD,
DMAID_USB_ENDE,
DMAID_USB_ENDF,
DMAID_USB_ENDG,
DMAID_USB_ENDH,
DMAID_USB_ENDI,
DMAID_USB_ENDJ,
DMAID_USB_ENDK,
DMAID_USB_ENDL,
DMAID_USB_ENDM,
DMAID_USB_ENDN,
DMAID_USB_ENDP,
DMAID_USB_ENDQ,
DMAID_USB_ENDR,
DMAID_USB_ENDS,
DMAID_USB_ENDT,
DMAID_USB_ENDU,
DMAID_USB_ENDV,
DMAID_USB_ENDW,
DMAID_USB_ENDX,
DMAID_MSL_RX1,
DMAID_MSL_TX1,
DMAID_MSL_RX2,
DMAID_MSL_TX2,
DMAID_MSL_RX3,
DMAID_MSL_TX3,
DMAID_MSL_RX4,
DMAID_MSL_TX4,
DMAID_MSL_RX5,
DMAID_MSL_TX5,
DMAID_MSL_RX6,
DMAID_MSL_TX6,
DMAID_MSL_RX7,
DMAID_MSL_TX7,
DMAID_USIM_RX,
DMAID_USIM_TX,
DMAID_MEMSTICK_RX,
DMAID_MEMSTICK_TX,
DMAID_SSP3_RX,
DMAID_SSP3_TX,
DMAID_CIF_RX0,
DMAID_CIF_RX1,
DMAID_DREQ2
} DMAPeripheralID_t;
#endif //__DMA_H_
--- NEW FILE: PXA27XHPLDMA.nc ---
// $Id: PXA27XHPLDMA.nc,v 1.1 2005/08/18 23:07:13 radler Exp $
/* tab:4
* IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By
* downloading, copying, installing or using the software you agree to
* this license. If you do not agree to this license, do not download,
* install, copy or use the software.
*
* Intel Open Source License
*
* Copyright (c) 2002 Intel Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* Neither the name of the Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*/
/*
*
* Authors: Phil Buonadonna
* Authors: Robbie Adler
*/
interface PXA27XHPLDMA
{
command void setByteAlignment(uint32_t channel,bool enable);
command void mapChannel(uint32_t channel,uint16_t peripheralID);
command void unmapChannel(uint32_t channel);
command void setDCSR(uint32_t channel, uint32_t val);
command uint32_t getDCSR(uint32_t channel);
command void setDCMD(uint32_t channel, uint32_t val);
command uint32_t getDCMD(uint32_t channel);
command void setDDADR(uint32_t channel, uint32_t val);
command uint32_t getDDADR(uint32_t channel);
command void setDSADR(uint32_t channel, uint32_t val);
command uint32_t getDSADR(uint32_t channel);
command void setDTADR(uint32_t channel, uint32_t val);
command uint32_t getDTADR(uint32_t channel);
command void setDPCSR(uint32_t val);
command uint32_t getDPCSR();
}
--- NEW FILE: PXA27XHPLDMAC.nc ---
// $Id: PXA27XHPLDMAC.nc,v 1.1 2005/08/18 23:07:13 radler Exp $
/* tab:4
* IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By
* downloading, copying, installing or using the software you agree to
* this license. If you do not agree to this license, do not download,
* install, copy or use the software.
*
* Intel Open Source License
*
* Copyright (c) 2002 Intel Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* Neither the name of the Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*/
/*
*
* Authors: Phil Buonadonna
*/
configuration PXA27XDMAC
{
provides {
interface StdControl;
interface PXA27XDMAChannel[uint8_t channel];
interface PXA27XDMAExtReq[uint8_t pin];
async command uint32_t getDPCSR();
async command void setDPCSR(uint32_t val);
}
}
implementation
{
components PXA27XDMAM, PXA27XInterruptM;
StdControl = PXA27XDMAM;
PXA27XDMAChannel = PXA27XDMAM;
PXA27XDMAExtReq = PXA27XDMAM;
getDPCSR = PXA27XDMAM;
setDPCSR = PXA27XDMAM;
PXA27XDMAM.DMAIrq -> PXA27XInterruptM.PXA27XIrq[PPID_DMAC];
}
--- NEW FILE: PXA27XHPLDMAM.nc ---
// $Id: PXA27XHPLDMAM.nc,v 1.1 2005/08/18 23:07:13 radler Exp $
/* tab:4
* IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By
* downloading, copying, installing or using the software you agree to
* this license. If you do not agree to this license, do not download,
* install, copy or use the software.
*
* Intel Open Source License
*
* Copyright (c) 2002 Intel Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* Neither the name of the Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*/
/*
*
* Authors: Phil Buonadonna
*/
module PXA27XHPLDMAM
{
provides {
interface PXA27XHPLDMA;
// interface PXA27XDMAExtReq[uint8_t pin];
}
}
implementation
{
command void PXA27XHPLDMA.setByteAlignment(uint32_t channel, bool enable)
{
if (channel < 32) {
if (enable) {
DALGN |= (1 << channel);
}
else {
DALGN &= ~(1 << channel);
}
}
return;
}
command void PXA27XHPLDMA.mapChannel(uint32_t channel,uint16_t peripheralID){
if(channel < 32){
DRCMR(peripheralID) = DRCMR_CHLNUM(channel) | DRCMR_MAPVLD;
}
return;
}
command void PXA27XHPLDMA.unmapChannel(uint32_t channel){
if(channel < 32){
DRCMR(channel) = 0;
}
}
command void PXA27XHPLDMA.setDCSR(uint32_t channel,uint32_t val) {
if (channel < 32) {
DCSR(channel) = val;
}
return;
}
command uint32_t PXA27XHPLDMA.getDCSR(uint32_t channel) {
uint32_t val;
if (channel < 32) {
val = DCSR(channel);
}
return val;
}
command void PXA27XHPLDMA.setDCMD(uint32_t channel, uint32_t val) {
if (channel < 32) {
DCMD(channel) = val;
}
return;
}
command uint32_t PXA27XHPLDMA.getDCMD(uint32_t channel) {
uint32_t val;
if (channel < 32) {
val = DCMD(channel);
}
return val;
}
command void PXA27XHPLDMA.setDDADR(uint32_t channel ,uint32_t val) {
if (channel < 32) {
DDADR(channel) = val;
}
return;
}
command uint32_t PXA27XHPLDMA.getDDADR(uint32_t channel) {
uint32_t val;
if (channel < 32) {
val = DDADR(channel);
}
return val;
}
command void PXA27XHPLDMA.setDSADR(uint32_t channel, uint32_t val){
if (channel < 32) {
DSADR(channel) = val;
}
return;
}
command uint32_t PXA27XHPLDMA.getDSADR(uint32_t channel) {
uint32_t val;
if (channel < 32) {
val = DSADR(channel);
}
return val;
}
command void PXA27XHPLDMA.setDTADR(uint32_t channel, uint32_t val) {
if (channel < 32) {
DTADR(channel) = val;
}
return;
}
command uint32_t PXA27XHPLDMA.getDTADR(uint32_t channel) {
uint32_t val;
if (channel < 32) {
val = DTADR(channel);
}
return val;
}
#if 0
//we don't expose any of the external DMA pins, so no sense in exposing this. However, there's also no sense in deleting it...
command uint8_t PXA27XDMAExtReq.getDREQPend[uint8_t pin]()
{
uint8_t val;
if (pin < 3) {
atomic val = (DRQSR(pin) & 0x1F);
}
return val;
}
command void PXA27XDMAExtReq.clearDREQPend[uint8_t pin]()
{
if (pin < 3) {
atomic DRQSR(pin) = DRQSR_CLR;
}
return;
}
#endif
command uint32_t PXA27XHPLDMA.getDPCSR()
{
return DPCSR;
}
command void PXA27XHPLDMA.setDPCSR(uint32_t val)
{
DPCSR = val;
return;
}
}
Index: PXA27XDMAC.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-1.x/beta/platform/pxa27x/PXA27XDMAC.nc,v
retrieving revision 1.1
retrieving revision 1.2
diff -C2 -d -r1.1 -r1.2
*** PXA27XDMAC.nc 28 Mar 2005 17:13:36 -0000 1.1
--- PXA27XDMAC.nc 18 Aug 2005 23:07:13 -0000 1.2
***************
*** 41,44 ****
--- 41,45 ----
*
* Authors: Phil Buonadonna
+ * Robbie Adler
*/
***************
*** 48,54 ****
interface StdControl;
interface PXA27XDMAChannel[uint8_t channel];
! interface PXA27XDMAExtReq[uint8_t pin];
! async command uint32_t getDPCSR();
! async command void setDPCSR(uint32_t val);
}
}
--- 49,53 ----
interface StdControl;
interface PXA27XDMAChannel[uint8_t channel];
! //interface PXA27XDMAExtReq[uint8_t pin];
}
}
***************
*** 56,68 ****
implementation
{
! components PXA27XDMAM, PXA27XInterruptM;
StdControl = PXA27XDMAM;
PXA27XDMAChannel = PXA27XDMAM;
! PXA27XDMAExtReq = PXA27XDMAM;
! getDPCSR = PXA27XDMAM;
! setDPCSR = PXA27XDMAM;
!
! PXA27XDMAM.DMAIrq -> PXA27XInterruptM.PXA27XIrq[PPID_DMAC];
}
--- 55,65 ----
implementation
{
! components PXA27XDMAM, PXA27XHPLDMAM, PXA27XInterruptM;
StdControl = PXA27XDMAM;
PXA27XDMAChannel = PXA27XDMAM;
! //PXA27XDMAExtReq = PXA27XDMAM;
! PXA27XDMAM.PXA27XHPLDMA -> PXA27XHPLDMAM;
! PXA27XDMAM.Interrupt -> PXA27XInterruptM.PXA27XIrq[PPID_DMAC];
}
Index: PXA27XDMAChannel.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-1.x/beta/platform/pxa27x/PXA27XDMAChannel.nc,v
retrieving revision 1.1
retrieving revision 1.2
diff -C2 -d -r1.1 -r1.2
*** PXA27XDMAChannel.nc 28 Mar 2005 17:13:36 -0000 1.1
--- PXA27XDMAChannel.nc 18 Aug 2005 23:07:13 -0000 1.2
***************
*** 38,67 ****
*
*/
! /*
*
! * Authors: Phil Buonadonna
! */
interface PXA27XDMAChannel
{
! async command result_t setMap(uint8_t device);
! async command uint8_t getMap();
!
! async command void setByteAlignment(uint8_t val);
!
! async command void setDCSR(uint32_t val);
! async command uint32_t getDCSR();
! async command void setDCMD(uint32_t val);
! async command uint32_t getDCMD();
! async command void setDDADR(uint32_t val);
! async command uint32_t getDDADR();
! async command void setDSADR(uint32_t val);
! async command uint32_t getDSADR();
! async command void setDTADR(uint32_t val);
! async command uint32_t getDTADR();
async event void Interrupt();
-
}
--- 38,74 ----
*
*/
!
! /**
*
! * @author Robbie Adler
! **/
+ includes DMA;
interface PXA27XDMAChannel
{
! // this interface is intended to describe the high level functionality
! // of our DMA controller. The commands exposed by this interface represent
! // all of the information normally required by the PXA27X's DMA controller.
! // However, it is left up to the underlying implementation whether to use
! // descriptor-based or non-descriptor-based channel commands
!
! command result_t requestChannel(DMAPeripheralID_t peripheralID,
! DMAPriority_t priority, bool permanent);
! event result_t requestChannelDone();
! command result_t returnChannel();
+ command result_t setSourceAddr(uint32_t val);
+ command result_t setTargetAddr(uint32_t val);
+ command result_t enableSourceAddrIncrement(bool enable);
+ command result_t enableTargetAddrIncrement(bool enable);
+ command result_t enableSourceFlowControl(bool enable);
+ command result_t enableTargetFlowControl(bool enable);
+ command result_t setMaxBurstSize(DMAMaxBurstSize_t size);
+ command result_t setTransferLength(uint16_t length);
+ command result_t setTransferWidth(DMATransferWidth_t width);
+ command result_t run();
+ command result_t stop();
async event void Interrupt();
}
Index: PXA27XDMAM.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-1.x/beta/platform/pxa27x/PXA27XDMAM.nc,v
retrieving revision 1.1
retrieving revision 1.2
diff -C2 -d -r1.1 -r1.2
*** PXA27XDMAM.nc 28 Mar 2005 17:13:36 -0000 1.1
--- PXA27XDMAM.nc 18 Aug 2005 23:07:13 -0000 1.2
***************
*** 38,59 ****
*
*/
! /*
*
! * Authors: Phil Buonadonna
! */
module PXA27XDMAM
{
provides {
- interface StdControl;
interface PXA27XDMAChannel[uint8_t channel];
! interface PXA27XDMAExtReq[uint8_t pin];
! async command uint32_t getDPCSR();
! async command void setDPCSR(uint32_t val);
! }
uses {
! interface PXA27XInterrupt as DMAIrq;
}
}
--- 38,59 ----
*
*/
!
! /**
*
! * @author Robbie Adler
! **/
+ includes GlobalUtil;
module PXA27XDMAM
{
provides {
interface PXA27XDMAChannel[uint8_t channel];
! interface StdControl;
! }
uses {
! interface PXA27XHPLDMA;
! interface PXA27XInterrupt as Interrupt;
}
}
***************
*** 61,273 ****
implementation
{
! uint8_t mDeviceMap[32];
! bool mfInitialized = FALSE;
! command result_t StdControl.init()
! {
! bool isInited;
! int i;
! atomic {
! isInited = mfInitialized;
! mfInitialized = TRUE;
! }
! if (!isInited) {
! atomic {
! for (i = 0;i < 32;i++) {
! mDeviceMap[i] = -1;
! }
}
- call DMAIrq.allocate();
}
!
return SUCCESS;
}
! command result_t StdControl.start()
! {
! result_t result = FAIL;
! if (mfInitialized == TRUE) {
! call DMAIrq.enable();
! result = SUCCESS;
! }
! return result;
}
! command result_t StdControl.stop()
! {
return SUCCESS;
}
!
! async command result_t PXA27XDMAChannel.setMap[uint8_t channel](uint8_t device)
! {
! result_t result = FAIL;
!
! if ((channel < 32) && ((device < 70) || (device == 74))) {
! uint32_t oldDevice;
! atomic oldDevice = mDeviceMap[channel];
! if (oldDevice != -1) {
! DRCMR(oldDevice) &= ~(DRCMR_MAPVLD);
! }
! DRCMR(device) = (DRCMR_MAPVLD | DRCMR_CHLNUM(channel));
! atomic mDeviceMap[channel] = device;
! result=SUCCESS;
! }
! return result;
}
- async command uint8_t PXA27XDMAChannel.getMap[uint8_t channel]()
- {
- if (channel < 32) {
- int dev;
- atomic dev = mDeviceMap[channel];
- return dev;
- }
- }
! async command void PXA27XDMAChannel.setByteAlignment[uint8_t channel](bool flag)
! {
! if (channel < 32) {
! if (flag) {
! DALGN |= (1 << channel);
}
! else {
! DALGN &= ~(1 << channel);
}
}
! return;
! }
!
! async command void PXA27XDMAChannel.setDCSR[uint8_t channel](uint32_t val)
! {
! if (channel < 32) {
! DCSR(channel) = val;
}
! return;
}
!
! async command uint32_t PXA27XDMAChannel.getDCSR[uint8_t channel]()
! {
! uint32_t val;
! if (channel < 32) {
! val = DCSR(channel);
}
! return val;
}
!
! async command void PXA27XDMAChannel.setDCMD[uint8_t channel](uint32_t val)
! {
! if (channel < 32) {
! DCMD(channel) = val;
! }
! return;
}
!
! async command uint32_t PXA27XDMAChannel.getDCMD[uint8_t channel]()
! {
! uint32_t val;
! if (channel < 32) {
! val = DCMD(channel);
}
! return val;
}
!
! async command void PXA27XDMAChannel.setDDADR[uint8_t channel](uint32_t val)
! {
! if (channel < 32) {
! DDADR(channel) = val;
}
! return;
}
!
! async command uint32_t PXA27XDMAChannel.getDDADR[uint8_t channel]()
! {
! uint32_t val;
! if (channel < 32) {
! val = DDADR(channel);
}
! return val;
}
!
! async command void PXA27XDMAChannel.setDSADR[uint8_t channel](uint32_t val)
! {
! if (channel < 32) {
! DSADR(channel) = val;
! }
! return;
}
! async command uint32_t PXA27XDMAChannel.getDSADR[uint8_t channel]()
! {
! uint32_t val;
! if (channel < 32) {
! val = DSADR(channel);
}
! return val;
}
!
! async command void PXA27XDMAChannel.setDTADR[uint8_t channel](uint32_t val)
! {
! if (channel < 32) {
! DTADR(channel) = val;
! }
! return;
}
!
! async command uint32_t PXA27XDMAChannel.getDTADR[uint8_t channel]()
! {
! uint32_t val;
! if (channel < 32) {
! val = DTADR(channel);
}
! return val;
}
!
! async command uint8_t PXA27XDMAExtReq.getDREQPend[uint8_t pin]()
! {
! uint8_t val;
! if (pin < 3) {
! atomic val = (DRQSR(pin) & 0x1F);
}
! return val;
}
!
! async command void PXA27XDMAExtReq.clearDREQPend[uint8_t pin]()
! {
! if (pin < 3) {
! atomic DRQSR(pin) = DRQSR_CLR;
}
! return;
! }
!
! async command uint32_t getDPCSR()
! {
! return DPCSR;
! }
!
! async command void setDPCSR(uint32_t val)
! {
! DPCSR = val;
! return;
}
!
! async event void DMAIrq.fired()
! {
! uint32_t IntReg;
!
! atomic IntReg = DINT;
! while (IntReg) {
! uint32_t channel;
! channel = 31 - _pxa27x_clzui(IntReg);
! if (channel < 32) {
! signal PXA27XDMAChannel.Interrupt[channel]();
! IntReg &= ~(1 << channel);
}
}
! return;
}
default async event void PXA27XDMAChannel.Interrupt[uint8_t channel]()
{
// Default behavior: clear all potential interrupts on the channel
if (channel < 32) {
--- 61,346 ----
implementation
{
! /************
! Implementation Notes:
! Current thinking is to use the unique("") construct combined with a request, requestDone
! mechanism to allow more than the 32 possible channels to at least be supported.
! ********/
! /*******************
! The following belong in a header file, but I can't put it where I want it due to the way that nesc currently
! handles included files
! ***********/
!
! #define DEFINE_PARAMTASK(funcname) \
! task void _##funcname##veneer(){\
! uint32_t argument;\
! popqueue(¶mtaskQueue,&argument);\
! funcname(argument);}
!
! #define POST_PARAMTASK(funcname, arg) \
! {pushqueue(¶mtaskQueue, arg);post _##funcname##veneer();}
!
! typedef struct {
! uint32_t DDADR;
! uint32_t DSADR;
! uint32_t DTADR;
! uint32_t DCMD;
! } DMADescriptor_t;
!
! typedef struct {
! bool channelValid;
! uint8_t realChannel;
! DMAPeripheralID_t peripheralID;
! uint16_t bytesLeft;
! } DMAChannelInfo_t;
!
! typedef struct {
! uint8_t virtualChannel;
! bool inUse;
! bool permanent;
! } ChannelMapItem_t;
!
! #define NUMDMACHANNELS uniqueCount("DMAChannel")
!
! //need to figure out how to align each entry on a 16 byte boundary if we're going to use
! //the descriptor based mode.
! DMADescriptor_t mDescriptorArray[NUMDMACHANNELS];
! DMAChannelInfo_t mChannelArray[NUMDMACHANNELS];
!
! ChannelMapItem_t mPriorityMap[32];
!
! command result_t StdControl.init(){
!
! int i;
! atomic{
! for(i=0; i<NUMDMACHANNELS; i++){
! mChannelArray[i].channelValid = FALSE;
}
}
! call Interrupt.allocate();
return SUCCESS;
}
! command result_t StdControl.start(){
! call Interrupt.enable();
! return SUCCESS;
}
! command result_t StdControl.stop(){
! call Interrupt.disable();
return SUCCESS;
}
!
!
! void postRequestChannelDone(uint8_t channel){
! signal PXA27XDMAChannel.requestChannelDone[channel]();
}
+ DEFINE_PARAMTASK(postRequestChannelDone);
! command result_t PXA27XDMAChannel.requestChannel[uint8_t channel](DMAPeripheralID_t peripheralID,
! DMAPriority_t priority,
! bool permanent){
!
! //want to allow a device to request multiple priority level so that it can get
! //the highest possible available.
! uint32_t i, realChannel;
! bool foundChannel = FALSE;
! atomic{
! if(mChannelArray[channel].channelValid ==TRUE){
! foundChannel = TRUE;
}
!
! if(foundChannel == FALSE && (priority & DMA_Priority1)){
! for(i=0; i<7; i++){
! realChannel = (i < 4)? i: i+12;
! if(mPriorityMap[realChannel].inUse == FALSE){
! //found a channel to use!
! mPriorityMap[realChannel].inUse = TRUE;
! mPriorityMap[realChannel].virtualChannel = channel;
! mPriorityMap[realChannel].permanent = permanent;
! mChannelArray[channel].channelValid = TRUE;
! mChannelArray[channel].realChannel = realChannel;
! mChannelArray[channel].peripheralID = peripheralID;
! foundChannel = TRUE;
! break;
! }
! }
! }
! if((foundChannel == FALSE) && (priority & DMA_Priority2)){
! for(i=0; i<7; i++){
! realChannel = (i < 4)? i+4: i+16;
! if(mPriorityMap[realChannel].inUse == FALSE){
! //found a channel to use!
! mPriorityMap[realChannel].inUse = TRUE;
! mPriorityMap[realChannel].virtualChannel = channel;
! mPriorityMap[realChannel].permanent = permanent;
! mChannelArray[channel].channelValid = TRUE;
! mChannelArray[channel].realChannel = realChannel;
! mChannelArray[channel].peripheralID = peripheralID;
! foundChannel = TRUE;
! break;
! }
! }
! }
! if((foundChannel == FALSE) && (priority & DMA_Priority3)){
! for(i=0; i<7; i++){
! realChannel = (i < 4)? i+8: i+20;
! if(mPriorityMap[realChannel].inUse == FALSE){
! //found a channel to use!
! mPriorityMap[realChannel].inUse = TRUE;
! mPriorityMap[realChannel].virtualChannel = channel;
! mPriorityMap[realChannel].permanent = permanent;
! mChannelArray[channel].channelValid = TRUE;
! mChannelArray[channel].realChannel = realChannel;
! mChannelArray[channel].peripheralID = peripheralID;
! foundChannel = TRUE;
! break;
! }
! }
! }
! if((foundChannel == FALSE) && (priority & DMA_Priority4)){
! for(i=0; i<7; i++){
! realChannel = (i < 4)? i+12: i+24;
! if(mPriorityMap[realChannel].inUse == FALSE){
! //found a channel to use!
! mPriorityMap[realChannel].inUse = TRUE;
! mPriorityMap[realChannel].virtualChannel = channel;
! mPriorityMap[realChannel].permanent = permanent;
! mChannelArray[channel].channelValid = TRUE;
! mChannelArray[channel].realChannel = realChannel;
! mChannelArray[channel].peripheralID = peripheralID;
! foundChannel = TRUE;
! break;
! }
! }
}
}
! if(foundChannel == TRUE){
! POST_PARAMTASK(postRequestChannelDone, channel);
}
! //if we didn't find a channel, we will need to rerun this function once we finish with a channel
! //we will deal with this case later
! return SUCCESS;
}
!
! command result_t PXA27XDMAChannel.returnChannel[uint8_t channel](){
! uint32_t realChannel;
! atomic{
! realChannel = mChannelArray[channel].realChannel;
! mChannelArray[channel].channelValid = FALSE;
! mPriorityMap[realChannel].inUse = FALSE;
}
! return SUCCESS;
}
!
! default event result_t PXA27XDMAChannel.requestChannelDone[uint8_t channel](){
! return FAIL;
}
!
! command result_t PXA27XDMAChannel.setSourceAddr[uint8_t channel](uint32_t val){
! atomic{
! mDescriptorArray[channel].DSADR = val;
}
! return SUCCESS;
}
! command result_t PXA27XDMAChannel.setTargetAddr[uint8_t channel](uint32_t val){
! atomic{
! mDescriptorArray[channel].DTADR = val;
}
! return SUCCESS;
}
! command result_t PXA27XDMAChannel.enableSourceAddrIncrement[uint8_t channel](bool enable){
! atomic{
! mDescriptorArray[channel].DCMD = (enable == TRUE) ? mDescriptorArray[channel].DCMD | DCMD_INCSRCADDR : mDescriptorArray[channel].DCMD & ~DCMD_INCSRCADDR;
}
! return SUCCESS;
}
! command result_t PXA27XDMAChannel.enableTargetAddrIncrement[uint8_t channel](bool enable){
! atomic{
! mDescriptorArray[channel].DCMD = (enable == TRUE) ? mDescriptorArray[channel].DCMD | DCMD_INCTRGADDR : mDescriptorArray[channel].DCMD & ~DCMD_INCTRGADDR;
! }
! return SUCCESS;
}
! command result_t PXA27XDMAChannel.enableSourceFlowControl[uint8_t channel](bool enable){
! atomic{
! mDescriptorArray[channel].DCMD = (enable == TRUE) ? mDescriptorArray[channel].DCMD | DCMD_FLOWSRC : mDescriptorArray[channel].DCMD & ~DCMD_FLOWSRC;
}
! return SUCCESS;
}
!
! command result_t PXA27XDMAChannel.enableTargetFlowControl[uint8_t channel](bool enable){
! atomic{
! mDescriptorArray[channel].DCMD = (enable == TRUE) ? mDescriptorArray[channel].DCMD | DCMD_FLOWTRG : mDescriptorArray[channel].DCMD & ~DCMD_FLOWTRG;
! }
! return SUCCESS;
}
!
! command result_t PXA27XDMAChannel.setMaxBurstSize[uint8_t channel](DMAMaxBurstSize_t size){
! if(size >= DMA_8ByteBurst && size <= DMA_32ByteBurst){
! atomic{
! //clear it out since otherwise |'ing doesn't work so well
! mDescriptorArray[channel].DCMD &= ~DCMD_MAXSIZE;
! mDescriptorArray[channel].DCMD |= DCMD_SIZE(size);
! }
! return SUCCESS;
}
! return FAIL;
}
!
! command result_t PXA27XDMAChannel.setTransferLength[uint8_t channel](uint16_t length){
! uint16_t currentLength;
! currentLength = (length<8192) ? length: 8190;
! atomic{
! mChannelArray[channel].bytesLeft = length-currentLength;
! //clear it out since otherwise |'ing doesn't work so well
! mDescriptorArray[channel].DCMD &= ~DCMD_MAXLEN;
! mDescriptorArray[channel].DCMD |= DCMD_LEN(currentLength);
}
! return SUCCESS;
}
!
! command result_t PXA27XDMAChannel.setTransferWidth[uint8_t channel](DMATransferWidth_t width){
! if(width >= DMA_NonPeripheralWidth && width <= DMA_4ByteWidth){
! atomic{
! //clear it out since otherwise |'ing doesn't work so well
! mDescriptorArray[channel].DCMD &= ~DCMD_MAXWIDTH;
! mDescriptorArray[channel].DCMD |= DCMD_WIDTH(width);
! }
! return SUCCESS;
}
! return FAIL;
}
! command result_t PXA27XDMAChannel.run[uint8_t channel](){
! uint8_t realChannel;
! uint32_t width;
!
! atomic{
! realChannel= mChannelArray[channel].realChannel;
! width = (mDescriptorArray[channel].DCMD >> 14) & 0x3;
!
! call PXA27XHPLDMA.mapChannel(realChannel, mChannelArray[channel].peripheralID);
! if(width){
! call PXA27XHPLDMA.setByteAlignment(realChannel,TRUE);
}
+
+ call PXA27XHPLDMA.setDCSR(realChannel, DCSR_NODESCFETCH);
+ call PXA27XHPLDMA.setDCMD(realChannel, mDescriptorArray[channel].DCMD | DCMD_ENDIRQEN);
+ call PXA27XHPLDMA.setDSADR(realChannel, mDescriptorArray[channel].DSADR);
+ call PXA27XHPLDMA.setDTADR(realChannel, mDescriptorArray[channel].DTADR);
+ call PXA27XHPLDMA.setDCSR(realChannel, DCSR_RUN | DCSR_NODESCFETCH);
}
! return SUCCESS;
! }
! command result_t PXA27XDMAChannel.stop[uint8_t channel](){
! return SUCCESS;
}
+
default async event void PXA27XDMAChannel.Interrupt[uint8_t channel]()
{
+ #if 0
// Default behavior: clear all potential interrupts on the channel
if (channel < 32) {
***************
*** 278,285 ****
--- 351,426 ----
DCMD(channel) = tmp;
}
+ #endif
return;
}
+ async event void Interrupt.fired()
+ {
+ uint32_t IntReg;
+
+ atomic IntReg = DINT;
+ while (IntReg) {
+ uint32_t realChannel, virtualChannel,status, update;
+ realChannel = 31 - _pxa27x_clzui(IntReg);
+ status = call PXA27XHPLDMA.getDCSR(realChannel);
+ update = (status & 0xFFA00000) | DCSR_MASKRUN;
+
+ if(status & DCSR_BUSERRINTR){
+ update |= DCSR_BUSERRINTR;
+ }
+
+ if(status & DCSR_STARTINTR){
+ update |= DCSR_STARTINTR;
+ }
+
+ if(status & DCSR_ENDINTR){
+ uint16_t currentLength;
+
+ update |= DCSR_ENDINTR;
+ //channel is done...need to do the inverse mapping from real channel to virtual channel..
+
+ atomic{
+ virtualChannel = mPriorityMap[realChannel].virtualChannel;
+ currentLength = mChannelArray[virtualChannel].bytesLeft;
+ }
+ if(currentLength > 0){
+ currentLength = (currentLength<8192) ? currentLength: 8190;
+
+ atomic{
+ //update the bytes left count
+ mChannelArray[virtualChannel].bytesLeft -= currentLength;
+ //clear it out since otherwise |'ing doesn't work so well
+ mDescriptorArray[virtualChannel].DCMD &= ~DCMD_MAXLEN;
+ mDescriptorArray[virtualChannel].DCMD |= DCMD_LEN(currentLength);
+
+ //go again!!!
+ call PXA27XHPLDMA.setDCMD(realChannel, mDescriptorArray[virtualChannel].DCMD | DCMD_ENDIRQEN);
+ call PXA27XHPLDMA.setDCSR(realChannel, DCSR_RUN | DCSR_NODESCFETCH);
+ }
+ }
+ else{
+ signal PXA27XDMAChannel.Interrupt[virtualChannel]();
+ }
+
+ }
+
+ if(status & DCSR_STOPINTR){
+ update &= ~(DCSR_STOPIRQEN);
+ }
+
+ if(status & DCSR_RASINTR){
+ update |= DCSR_RASINTR;
+ }
+
+ if(status & DCSR_EORINT){
+ update |= DCSR_EORINT;
+ }
+ call PXA27XHPLDMA.setDCSR(realChannel,update);
+ IntReg &= ~(1 << realChannel);
+ }
+ return;
+ }
}
+
- Previous message: [Tinyos-beta-commits] CVS: tinyos-1.x/beta/platform/pxa27x
HPLInit.nc, 1.4, 1.5 mmu_table.s, 1.1, 1.2 util.s, 1.1, 1.2
- Next message: [Tinyos-beta-commits] CVS: tinyos-1.x/beta/platform/pxa27x
GlobalUtil.h, NONE, 1.1 SSP.h, NONE, 1.1
- Messages sorted by:
[ date ]
[ thread ]
[ subject ]
[ author ]
More information about the Tinyos-beta-commits
mailing list