[Tinyos-beta-commits]
CVS: tinyos-1.x/beta/Deluge/Deluge/TOSBoot/msp430
HPLUSARTControl.nc, NONE, 1.1 InternalFlashC.nc, NONE,
1.1 HPLUSART0M.nc, 1.1, 1.2 ProgFlashM.nc, 1.1, 1.2 hardware.h,
1.2, 1.3 msp430hardware.h, 1.1, NONE
Jonathan Hui
jwhui at users.sourceforge.net
Tue May 17 13:48:26 PDT 2005
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STM25PM.nc, 1.1, 1.2
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CVS: tinyos-1.x/beta/Deluge/Deluge/TOSBoot/build/telosb
app.c, 1.6, 1.7 ident_flags.txt, 1.6, 1.7 main.exe, 1.6,
1.7 main.ihex, 1.6, 1.7
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Update of /cvsroot/tinyos/tinyos-1.x/beta/Deluge/Deluge/TOSBoot/msp430
In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv19131/msp430
Modified Files:
HPLUSART0M.nc ProgFlashM.nc hardware.h
Added Files:
HPLUSARTControl.nc InternalFlashC.nc
Removed Files:
msp430hardware.h
Log Message:
- Now verifies the image by checking CRCs across the image before
reprogramming. Was badly needed, since earlier versions did not check
whether the binary was valid.
- Since there is no hardware protection for the bootloader section on
the msp430, software checks help ensure that the bootloader is not
overwritten.
- Handles errors better:
1) If an image is inavlid, don't reprogram.
2) If an image started to program but fails in the middle, try
reprogramming again. If reprogramming still fails after three
times, try reprogramming with golden image.
3) If golden image is invalid, don't reprogram.
4) If golden image started to program but fails in the middle, try
reprogramming again.
- Additional improvements in code size means the added functionality
is implemented in the same code size (just under 2K).
--- NEW FILE: HPLUSARTControl.nc ---
includes msp430usart;
interface HPLUSARTControl {
command void disableSPI();
command void setModeSPI();
command result_t isTxIntrPending();
command result_t isRxIntrPending();
command void tx(uint8_t data);
command uint8_t rx();
}
--- NEW FILE: InternalFlashC.nc ---
// $Id: InternalFlashC.nc,v 1.1 2005/05/17 20:48:24 jwhui Exp $
/* tab:4
*
*
* "Copyright (c) 2000-2004 The Regents of the University of California.
* All rights reserved.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation for any purpose, without fee, and without written agreement is
* hereby granted, provided that the above copyright notice, the following
* two paragraphs and the author appear in all copies of this software.
*
* IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
* DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
* OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
* CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS
* ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
* PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
*
*/
/**
* InternalFlashC.nc - Internal flash implementation for telos msp
* platform. On the msp, the flash must first be erased before a value
* can be written. However, the msp can only erase the flash at a
* segment granularity (128 bytes for the information section). This
* module allows transparent read/write of individual bytes to the
* information section by dynamically switching between the two
* provided segments in the information section.
*
* Valid address range is 0x1000 - 0x107E (0x107F is used to store the
* version number of the information segment).
*
* @author Jonathan Hui <jwhui at cs.berkeley.edu>
*/
includes InternalFlash;
module InternalFlashC {
provides interface InternalFlash;
}
implementation {
enum {
IFLASH_OFFSET = 0x1000,
IFLASH_SIZE = 128,
IFLASH_SEG0_VNUM_ADDR = 0x107f,
IFLASH_SEG1_VNUM_ADDR = 0x10ff,
};
uint8_t chooseSegment() {
int8_t vnum0 = *(int8_t*)IFLASH_SEG0_VNUM_ADDR;
int8_t vnum1 = *(int8_t*)IFLASH_SEG1_VNUM_ADDR;
return !( (vnum0 - vnum1) > 0 );
}
command result_t InternalFlash.write(void* addr, void* buf, uint16_t size) {
volatile uint8_t *newPtr;
uint8_t *oldPtr;
uint8_t *bufPtr = (uint8_t*)buf;
uint16_t i;
addr += IFLASH_OFFSET;
newPtr = oldPtr = (uint8_t*)IFLASH_OFFSET;
if (chooseSegment()) {
oldPtr += IFLASH_SIZE;
}
else {
addr += IFLASH_SIZE;
newPtr += IFLASH_SIZE;
}
FCTL2 = FWKEY + FSSEL1 + FN2;
FCTL3 = FWKEY;
FCTL1 = FWKEY + ERASE;
*newPtr = 0;
FCTL1 = FWKEY + WRT;
for ( i = 0; i < IFLASH_SIZE-1; i++, newPtr++, oldPtr++ ) {
if ((uint16_t)newPtr < (uint16_t)addr || (uint16_t)addr+size <= (uint16_t)newPtr)
*newPtr = *oldPtr;
else
*newPtr = *bufPtr++;
}
*newPtr = *oldPtr+1;
FCTL1 = FWKEY;
FCTL3 = FWKEY + LOCK;
return SUCCESS;
}
command result_t InternalFlash.read(void* addr, void* buf, uint16_t size) {
addr += IFLASH_OFFSET;
if (chooseSegment())
addr += IFLASH_SIZE;
memcpy(buf, addr, size);
return SUCCESS;
}
}
Index: HPLUSART0M.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-1.x/beta/Deluge/Deluge/TOSBoot/msp430/HPLUSART0M.nc,v
retrieving revision 1.1
retrieving revision 1.2
diff -C2 -d -r1.1 -r1.2
*** HPLUSART0M.nc 21 Apr 2005 17:31:41 -0000 1.1
--- HPLUSART0M.nc 17 May 2005 20:48:23 -0000 1.2
***************
*** 1,427 ****
- /*
- * Copyright (c) 2004-2005, Technische Universitat Berlin
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * - Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
- * - Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * - Neither the name of the Technische Universitat Berlin nor the names
- * of its contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
- * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
- * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
- * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
- * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * - Description ----------------------------------------------------------
- * Implementation of USART0 lowlevel functionality - stateless.
- * Setting a mode will by default disable USART-Interrupts.
- * - Revision -------------------------------------------------------------
- * $Revision$
- * $Date$
- * @author: Jan Hauer (hauer at tkn.tu-berlin.de)
- * @author: Joe Polastre
- * ========================================================================
- */
module HPLUSART0M {
! provides interface HPLUSARTControl as USARTControl;
! provides interface HPLUSARTFeedback as USARTData;
! provides interface HPLI2CInterrupt;
}
! implementation
! {
! MSP430REG_NORACE(ME1);
! MSP430REG_NORACE(IFG1);
! MSP430REG_NORACE(U0TCTL);
!
! uint16_t l_br;
! uint8_t l_mctl;
! uint8_t l_ssel;
!
! /*
! TOSH_SIGNAL(UART0RX_VECTOR) {
! uint8_t temp = U0RXBUF;
! signal USARTData.rxDone(temp);
! }
!
! TOSH_SIGNAL(UART0TX_VECTOR) {
! if (call USARTControl.isI2C())
! signal HPLI2CInterrupt.fired();
! else
! signal USARTData.txDone();
! }
! */
!
! default async event void HPLI2CInterrupt.fired() { }
!
! async command bool USARTControl.isSPI() {
! bool _ret = FALSE;
! // atomic{
! if (ME1 & USPIE0)
! _ret = TRUE;
! // }
! return _ret;
! }
!
! async command bool USARTControl.isUART() {
! bool _ret = FALSE;
! // atomic {
! if ((ME1 & UTXE0) && (ME1 & URXE0) &&
! TOSH_IS_URXD0_MODFUNC() &&
! TOSH_IS_UTXD0_MODFUNC())
! _ret = TRUE;
! // }
! return _ret;
! }
!
! async command bool USARTControl.isUARTtx() {
! bool _ret = FALSE;
! // atomic {
! if ((ME1 & UTXE0) &&
! TOSH_IS_UTXD0_MODFUNC() &&
! TOSH_IS_URXD0_IOFUNC())
! _ret = TRUE;
! // }
! return _ret;
! }
!
! async command bool USARTControl.isUARTrx() {
! bool _ret = FALSE;
! // atomic {
! if ((ME1 & URXE0) &&
! TOSH_IS_URXD0_MODFUNC() &&
! TOSH_IS_UTXD0_IOFUNC())
! _ret = TRUE;
! // }
! return _ret;
! }
!
! async command bool USARTControl.isI2C() {
! bool _ret = FALSE;
! #ifdef __msp430_have_usart0_with_i2c
! // atomic {
! if ((U0CTL & I2C) && (U0CTL & SYNC) && (U0CTL & I2CEN))
! _ret = TRUE;
! // }
! #endif
! return _ret;
! }
!
! async command msp430_usartmode_t USARTControl.getMode() {
! if (call USARTControl.isUART())
! return USART_UART;
! else if (call USARTControl.isUARTrx())
! return USART_UART_RX;
! else if (call USARTControl.isUARTtx())
! return USART_UART_TX;
! else if (call USARTControl.isSPI())
! return USART_SPI;
! else if (call USARTControl.isI2C())
! return USART_I2C;
! else
! return USART_NONE;
! }
!
! /**
! * Sets the USART mode to one of the options from msp430_usartmode_t
! * defined in MSP430USART.h
! */
! async command void USARTControl.setMode(msp430_usartmode_t _mode) {
! switch (_mode) {
! case USART_UART:
! call USARTControl.setModeUART();
! break;
! case USART_UART_RX:
! call USARTControl.setModeUART_RX();
! break;
! case USART_UART_TX:
! call USARTControl.setModeUART_TX();
! break;
! case USART_SPI:
! call USARTControl.setModeSPI();
! break;
! case USART_I2C:
! call USARTControl.setModeI2C();
! break;
! default:
! break;
! }
! }
!
! async command void USARTControl.enableUART() {
! TOSH_SEL_UTXD0_MODFUNC();
! TOSH_SEL_URXD0_MODFUNC();
! ME1 |= (UTXE0 | URXE0); // USART0 UART module enable
! }
!
! async command void USARTControl.disableUART() {
! ME1 &= ~(UTXE0 | URXE0); // USART0 UART module enable
! TOSH_SEL_UTXD0_IOFUNC();
! TOSH_SEL_URXD0_IOFUNC();
! }
!
! async command void USARTControl.enableUARTTx() {
! TOSH_SEL_UTXD0_MODFUNC();
! ME1 |= UTXE0; // USART0 UART Tx module enable
! }
!
! async command void USARTControl.disableUARTTx() {
! ME1 &= ~UTXE0; // USART0 UART Tx module enable
! TOSH_SEL_UTXD0_IOFUNC();
! }
!
! async command void USARTControl.enableUARTRx() {
! TOSH_SEL_URXD0_MODFUNC();
! ME1 |= URXE0; // USART0 UART Rx module enable
! }
!
! async command void USARTControl.disableUARTRx() {
! ME1 &= ~URXE0; // USART0 UART Rx module disable
! TOSH_SEL_URXD0_IOFUNC();
! }
!
! async command void USARTControl.enableSPI() {
! TOSH_SEL_SIMO0_MODFUNC();
! TOSH_SEL_SOMI0_MODFUNC();
! TOSH_SEL_UCLK0_MODFUNC();
! ME1 |= USPIE0; // USART0 SPI module enable
! }
!
! async command void USARTControl.disableSPI() {
! ME1 &= ~USPIE0; // USART0 SPI module disable
! TOSH_SEL_SIMO0_IOFUNC();
! TOSH_SEL_SOMI0_IOFUNC();
! TOSH_SEL_UCLK0_IOFUNC();
! }
!
! async command void USARTControl.enableI2C() {
! #ifdef __msp430_have_usart0_with_i2c
! /*atomic*/ U0CTL |= I2C | I2CEN | SYNC;
! #endif
! }
!
! async command void USARTControl.disableI2C() {
! #ifdef __msp430_have_usart0_with_i2c
! // if (call USARTControl.isI2C())
! /*atomic*/ U0CTL &= ~(I2C | I2CEN | SYNC);
! #endif
! }
!
! async command void USARTControl.setModeSPI() {
! // check if we are already in SPI mode
! // if (call USARTControl.getMode() == USART_SPI)
! // return;
!
! call USARTControl.disableUART();
! call USARTControl.disableI2C();
!
! // atomic {
! TOSH_SEL_SIMO0_MODFUNC();
! TOSH_SEL_SOMI0_MODFUNC();
! TOSH_SEL_UCLK0_MODFUNC();
!
! IE1 &= ~(UTXIE0 | URXIE0); // interrupt disable
!
! U0CTL = SWRST;
! U0CTL |= CHAR | SYNC | MM; // 8-bit char, SPI-mode, USART as master
! U0CTL &= ~(0x20);
!
! U0TCTL = STC ; // 3-pin
! U0TCTL |= CKPH; // half-cycle delayed UCLK
! /*
! if (l_ssel & 0x80) {
! U0TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3);
! U0TCTL |= (l_ssel & 0x7F);
! }
! else {
! */
! U0TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3);
! U0TCTL |= SSEL_SMCLK; // use SMCLK, assuming 1MHz
! // }
! /*
! if (l_br != 0) {
! U0BR0 = l_br & 0x0FF;
! U0BR1 = (l_br >> 8) & 0x0FF;
! }
! else {
! */
! U0BR0 = 0x02; // as fast as possible
! U0BR1 = 0x00;
! // }
! U0MCTL = 0;
!
! ME1 &= ~(UTXE0 | URXE0); //USART UART module disable
! ME1 |= USPIE0; // USART SPI module enable
! U0CTL &= ~SWRST;
! IFG1 &= ~(UTXIFG0 | URXIFG0);
! IE1 &= ~(UTXIE0 | URXIE0); // interrupt disabled
! // }
! return;
}
! void setUARTModeCommon() {
! // atomic {
! U0CTL = SWRST;
! U0CTL |= CHAR; // 8-bit char, UART-mode
!
! U0RCTL &= ~URXEIE; // even erroneous characters trigger interrupts
!
!
! U0CTL = SWRST;
! U0CTL |= CHAR; // 8-bit char, UART-mode
! if (l_ssel & 0x80) {
! U0TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3);
! U0TCTL |= (l_ssel & 0x7F);
! }
! else {
! U0TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3);
! U0TCTL |= SSEL_ACLK; // use ACLK, assuming 32khz
! }
! if ((l_mctl != 0) || (l_br != 0)) {
! U0BR0 = l_br & 0x0FF;
! U0BR1 = (l_br >> 8) & 0x0FF;
! U0MCTL = l_mctl;
! }
! else {
! U0BR0 = 0x03; // 9600 baud
! U0BR1 = 0x00;
! U0MCTL = 0x4A;
! }
! ME1 &= ~USPIE0; // USART0 SPI module disable
! ME1 |= (UTXE0 | URXE0); //USART0 UART module enable;
!
! U0CTL &= ~SWRST;
! IFG1 &= ~(UTXIFG0 | URXIFG0);
! IE1 &= ~(UTXIE0 | URXIE0); // interrupt disabled
! // }
! return;
! }
!
! async command void USARTControl.setModeUART_TX() {
! // check if we are already in UART mode
! if (call USARTControl.getMode() == USART_UART_TX)
! return;
! call USARTControl.disableSPI();
! call USARTControl.disableI2C();
! call USARTControl.disableUART();
- // atomic {
- TOSH_SEL_UTXD0_MODFUNC();
- TOSH_SEL_URXD0_IOFUNC();
- // }
- setUARTModeCommon();
- return;
}
! async command void USARTControl.setModeUART_RX() {
! // check if we are already in UART mode
! if (call USARTControl.getMode() == USART_UART_RX)
! return;
!
! call USARTControl.disableSPI();
! call USARTControl.disableI2C();
! call USARTControl.disableUART();
!
! // atomic {
! TOSH_SEL_URXD0_MODFUNC();
! TOSH_SEL_UTXD0_IOFUNC();
! // }
! setUARTModeCommon();
! return;
! }
!
! async command void USARTControl.setModeUART() {
! // check if we are already in UART mode
! if (call USARTControl.getMode() == USART_UART)
! return;
!
! call USARTControl.disableSPI();
! call USARTControl.disableI2C();
! call USARTControl.disableUART();
!
! // atomic {
! TOSH_SEL_UTXD0_MODFUNC();
! TOSH_SEL_URXD0_MODFUNC();
! // }
! setUARTModeCommon();
! return;
! }
!
! // i2c enable bit is not set by default
! async command void USARTControl.setModeI2C() {
! #ifdef __msp430_have_usart0_with_i2c
! // check if we are already in I2C mode
! if (call USARTControl.getMode() == USART_I2C)
! return;
!
! call USARTControl.disableUART();
! call USARTControl.disableSPI();
!
! // atomic {
! TOSH_MAKE_SIMO0_INPUT();
! TOSH_MAKE_UCLK0_INPUT();
! TOSH_SEL_SIMO0_MODFUNC();
! TOSH_SEL_UCLK0_MODFUNC();
!
! IE1 &= ~(UTXIE0 | URXIE0); // interrupt disable
!
! U0CTL = SWRST;
! U0CTL |= SYNC | I2C; // 7-bit addr, I2C-mode, USART as master
! U0CTL &= ~I2CEN;
!
! U0CTL |= MST;
!
! I2CTCTL = I2CSSEL_2; // use 1MHz SMCLK as the I2C reference
!
! I2CPSC = 0x00; // I2C CLK runs at 1MHz/10 = 100kHz
! I2CSCLH = 0x03;
! I2CSCLL = 0x03;
!
! I2CIE = 0; // clear all I2C interrupt enables
! I2CIFG = 0; // clear all I2C interrupt flags
! // }
! #endif
! return;
! }
!
! async command void USARTControl.setClockSource(uint8_t source) {
! // atomic {
! l_ssel = source | 0x80;
! U0TCTL &= ~(SSEL_0 | SSEL_1 | SSEL_2 | SSEL_3);
! U0TCTL |= (l_ssel & 0x7F);
! // }
! }
!
! async command void USARTControl.setClockRate(uint16_t baudrate, uint8_t mctl) {
! // atomic {
! l_br = baudrate;
! l_mctl = mctl;
! U0BR0 = baudrate & 0x0FF;
! U0BR1 = (baudrate >> 8) & 0x0FF;
! U0MCTL = mctl;
! // }
! }
!
! async command result_t USARTControl.isTxIntrPending(){
if (IFG1 & UTXIFG0){
IFG1 &= ~UTXIFG0;
--- 1,43 ----
module HPLUSART0M {
! provides interface HPLUSARTControl;
}
! implementation {
! command void HPLUSARTControl.disableSPI() {
! // USART0 SPI module disable
! ME1 &= ~USPIE0;
! TOSH_SEL_SIMO0_IOFUNC();
! TOSH_SEL_SOMI0_IOFUNC();
! TOSH_SEL_UCLK0_IOFUNC();
}
! command void HPLUSARTControl.setModeSPI() {
! TOSH_SEL_SIMO0_MODFUNC();
! TOSH_SEL_SOMI0_MODFUNC();
! TOSH_SEL_UCLK0_MODFUNC();
! // 8-bit char, SPI-mode, USART as master
! U0CTL = SWRST | CHAR | SYNC | MM;
! // 3-pin + half-cycle delayed UCLK
! U0TCTL = STC + CKPH + SSEL_SMCLK;
! // as fast as possible
! U0BR0 = 0x02;
! U0BR1 = 0x00;
! U0MCTL = 0;
! // enable SPI
! ME1 = USPIE0;
! U0CTL &= ~SWRST;
!
! // clear interrupts
! IFG1 &= ~(UTXIFG0 | URXIFG0);
}
! command result_t HPLUSARTControl.isTxIntrPending(){
if (IFG1 & UTXIFG0){
IFG1 &= ~UTXIFG0;
***************
*** 431,442 ****
}
! async command result_t USARTControl.isTxEmpty(){
! if (U0TCTL & TXEPT) {
! return SUCCESS;
! }
! return FAIL;
! }
!
! async command result_t USARTControl.isRxIntrPending(){
if (IFG1 & URXIFG0){
IFG1 &= ~URXIFG0;
--- 47,51 ----
}
! command result_t HPLUSARTControl.isRxIntrPending(){
if (IFG1 & URXIFG0){
IFG1 &= ~URXIFG0;
***************
*** 446,488 ****
}
! async command result_t USARTControl.disableRxIntr(){
! /*atomic*/ IE1 &= ~URXIE0;
! return SUCCESS;
! }
!
! async command result_t USARTControl.disableTxIntr(){
! /*atomic*/ IE1 &= ~UTXIE0;
! return SUCCESS;
! }
!
! async command result_t USARTControl.enableRxIntr(){
! // atomic {
! IFG1 &= ~URXIFG0;
! IE1 |= URXIE0;
! // }
! return SUCCESS;
! }
!
! async command result_t USARTControl.enableTxIntr(){
! // atomic {
! IFG1 &= ~UTXIFG0;
! IE1 |= UTXIE0;
! // }
! return SUCCESS;
! }
!
! async command result_t USARTControl.tx(uint8_t data){
! /*atomic*/ U0TXBUF = data;
! return SUCCESS;
}
! async command uint8_t USARTControl.rx(){
! uint8_t value;
! /*atomic*/ value = U0RXBUF;
! return value;
}
- default async event result_t USARTData.txDone() { return SUCCESS; }
-
- default async event result_t USARTData.rxDone(uint8_t data) { return SUCCESS; }
}
--- 55,65 ----
}
! command void HPLUSARTControl.tx(uint8_t data){
! U0TXBUF = data;
}
! command uint8_t HPLUSARTControl.rx(){
! return U0RXBUF;
}
}
Index: ProgFlashM.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-1.x/beta/Deluge/Deluge/TOSBoot/msp430/ProgFlashM.nc,v
retrieving revision 1.1
retrieving revision 1.2
diff -C2 -d -r1.1 -r1.2
*** ProgFlashM.nc 21 Apr 2005 17:31:41 -0000 1.1
--- ProgFlashM.nc 17 May 2005 20:48:24 -0000 1.2
***************
*** 42,46 ****
uint16_t *wordBuf = (uint16_t*)buf;
uint16_t i = 0;
!
FCTL2 = FWKEY + FSSEL1 + FN2;
FCTL3 = FWKEY;
--- 42,49 ----
uint16_t *wordBuf = (uint16_t*)buf;
uint16_t i = 0;
!
! if (addr < TOSBOOT_END || addr + len > 0x10000L)
! return FAIL;
!
FCTL2 = FWKEY + FSSEL1 + FN2;
FCTL3 = FWKEY;
***************
*** 48,56 ****
*flashAddr = 0;
FCTL1 = FWKEY + WRT;
! if (addr == (BL_MSP_RESET_ADDR/BL_INT_PAGE_SIZE)*BL_INT_PAGE_SIZE)
! *(uint16_t*)BL_MSP_RESET_ADDR = BOOTLOADER_START;
! for (i = 0; i < len / sizeof(uint16_t); i++) {
if ((uint16_t)flashAddr != BL_MSP_RESET_ADDR)
! *flashAddr++ = wordBuf[i];
}
FCTL1 = FWKEY;
--- 51,59 ----
*flashAddr = 0;
FCTL1 = FWKEY + WRT;
! for (i = 0; i < len / sizeof(uint16_t); i++, flashAddr++) {
if ((uint16_t)flashAddr != BL_MSP_RESET_ADDR)
! *flashAddr = wordBuf[i];
! else
! *flashAddr = TOSBOOT_START;
}
FCTL1 = FWKEY;
Index: hardware.h
===================================================================
RCS file: /cvsroot/tinyos/tinyos-1.x/beta/Deluge/Deluge/TOSBoot/msp430/hardware.h,v
retrieving revision 1.2
retrieving revision 1.3
diff -C2 -d -r1.2 -r1.3
*** hardware.h 2 May 2005 04:56:01 -0000 1.2
--- hardware.h 17 May 2005 20:48:24 -0000 1.3
***************
*** 3,11 ****
#include "msp430hardware.h"
- #include "MSP430ADC12.h"
-
- #include "CC2420Const.h"
-
- #include "AM.h"
// LEDs
--- 3,6 ----
***************
*** 14,34 ****
TOSH_ASSIGN_PIN(YELLOW_LED, 5, 6);
- // CC2420 RADIO #defines
- TOSH_ASSIGN_PIN(RADIO_CSN, 4, 2);
- TOSH_ASSIGN_PIN(RADIO_VREF, 4, 5);
- TOSH_ASSIGN_PIN(RADIO_RESET, 4, 6);
- TOSH_ASSIGN_PIN(RADIO_FIFOP, 1, 0);
- TOSH_ASSIGN_PIN(RADIO_SFD, 4, 1);
- TOSH_ASSIGN_PIN(RADIO_GIO0, 1, 3);
- TOSH_ASSIGN_PIN(RADIO_FIFO, 1, 3);
- TOSH_ASSIGN_PIN(RADIO_GIO1, 1, 4);
- TOSH_ASSIGN_PIN(RADIO_CCA, 1, 4);
-
- TOSH_ASSIGN_PIN(CC_FIFOP, 1, 0);
- TOSH_ASSIGN_PIN(CC_FIFO, 1, 3);
- TOSH_ASSIGN_PIN(CC_SFD, 4, 1);
- TOSH_ASSIGN_PIN(CC_VREN, 4, 5);
- TOSH_ASSIGN_PIN(CC_RSTN, 4, 6);
-
// UART pins
TOSH_ASSIGN_PIN(SOMI0, 3, 2);
--- 9,12 ----
***************
*** 37,91 ****
TOSH_ASSIGN_PIN(UTXD0, 3, 4);
TOSH_ASSIGN_PIN(URXD0, 3, 5);
- TOSH_ASSIGN_PIN(UTXD1, 3, 6);
- TOSH_ASSIGN_PIN(URXD1, 3, 7);
- TOSH_ASSIGN_PIN(UCLK1, 5, 3);
- TOSH_ASSIGN_PIN(SOMI1, 5, 2);
- TOSH_ASSIGN_PIN(SIMO1, 5, 1);
-
- // ADC
- TOSH_ASSIGN_PIN(ADC0, 6, 0);
- TOSH_ASSIGN_PIN(ADC1, 6, 1);
- TOSH_ASSIGN_PIN(ADC2, 6, 2);
- TOSH_ASSIGN_PIN(ADC3, 6, 3);
- TOSH_ASSIGN_PIN(ADC4, 6, 4);
- TOSH_ASSIGN_PIN(ADC5, 6, 5);
- TOSH_ASSIGN_PIN(ADC6, 6, 6);
- TOSH_ASSIGN_PIN(ADC7, 6, 7);
! // HUMIDITY
! TOSH_ASSIGN_PIN(HUM_SDA, 1, 5);
! TOSH_ASSIGN_PIN(HUM_SCL, 1, 6);
! TOSH_ASSIGN_PIN(HUM_PWR, 1, 7);
!
! // GIO pins
! TOSH_ASSIGN_PIN(GIO0, 2, 0);
! TOSH_ASSIGN_PIN(GIO1, 2, 1);
! TOSH_ASSIGN_PIN(GIO2, 2, 3);
! TOSH_ASSIGN_PIN(GIO3, 2, 6);
TOSH_ASSIGN_PIN(USERINT, 2, 7);
- // 1-Wire
- TOSH_ASSIGN_PIN(ONEWIRE, 2, 4);
-
- void HUMIDITY_MAKE_CLOCK_OUTPUT() { TOSH_MAKE_HUM_SCL_OUTPUT(); }
- void HUMIDITY_MAKE_CLOCK_INPUT() { TOSH_MAKE_HUM_SCL_INPUT(); }
- void HUMIDITY_CLEAR_CLOCK() { TOSH_CLR_HUM_SCL_PIN(); }
- void HUMIDITY_SET_CLOCK() { TOSH_SET_HUM_SCL_PIN(); }
- void HUMIDITY_MAKE_DATA_OUTPUT() { TOSH_MAKE_HUM_SDA_OUTPUT(); }
- void HUMIDITY_MAKE_DATA_INPUT() { TOSH_MAKE_HUM_SDA_INPUT(); }
- void HUMIDITY_CLEAR_DATA() { TOSH_CLR_HUM_SDA_PIN(); }
- void HUMIDITY_SET_DATA() { TOSH_SET_HUM_SDA_PIN(); }
- char HUMIDITY_GET_DATA() { return TOSH_READ_HUM_SDA_PIN(); }
-
- #define HUMIDITY_TIMEOUT_MS 30
- #define HUMIDITY_TIMEOUT_TRIES 20
-
- enum {
- // Sensirion Humidity addresses and commands
- TOSH_HUMIDITY_ADDR = 5,
- TOSH_HUMIDTEMP_ADDR = 3,
- TOSH_HUMIDITY_RESET = 0x1E
- };
-
// FLASH
TOSH_ASSIGN_PIN(FLASH_PWR, 4, 3);
--- 15,22 ----
TOSH_ASSIGN_PIN(UTXD0, 3, 4);
TOSH_ASSIGN_PIN(URXD0, 3, 5);
! // User Interupt Pin
TOSH_ASSIGN_PIN(USERINT, 2, 7);
// FLASH
TOSH_ASSIGN_PIN(FLASH_PWR, 4, 3);
***************
*** 93,153 ****
TOSH_ASSIGN_PIN(FLASH_HOLD, 4, 7);
- // PROGRAMMING PINS (tri-state)
- //TOSH_ASSIGN_PIN(TCK, );
- TOSH_ASSIGN_PIN(PROG_RX, 1, 1);
- TOSH_ASSIGN_PIN(PROG_TX, 2, 2);
-
- // send a bit via bit-banging to the flash
- void TOSH_FLASH_M25P_DP_bit(bool set) {
- if (set)
- TOSH_SET_SIMO0_PIN();
- else
- TOSH_CLR_SIMO0_PIN();
- TOSH_SET_UCLK0_PIN();
- TOSH_CLR_UCLK0_PIN();
- }
-
- // put the flash into deep sleep mode
- // important to do this by default
- void TOSH_FLASH_M25P_DP() {
- // SIMO0, UCLK0
- TOSH_MAKE_SIMO0_OUTPUT();
- TOSH_MAKE_UCLK0_OUTPUT();
- TOSH_MAKE_FLASH_HOLD_OUTPUT();
- TOSH_MAKE_FLASH_CS_OUTPUT();
- TOSH_SET_FLASH_HOLD_PIN();
- TOSH_SET_FLASH_CS_PIN();
-
- TOSH_wait();
-
- // initiate sequence;
- TOSH_CLR_FLASH_CS_PIN();
- TOSH_CLR_UCLK0_PIN();
-
- TOSH_FLASH_M25P_DP_bit(TRUE); // 0
- TOSH_FLASH_M25P_DP_bit(FALSE); // 1
- TOSH_FLASH_M25P_DP_bit(TRUE); // 2
- TOSH_FLASH_M25P_DP_bit(TRUE); // 3
- TOSH_FLASH_M25P_DP_bit(TRUE); // 4
- TOSH_FLASH_M25P_DP_bit(FALSE); // 5
- TOSH_FLASH_M25P_DP_bit(FALSE); // 6
- TOSH_FLASH_M25P_DP_bit(TRUE); // 7
-
- TOSH_SET_FLASH_CS_PIN();
-
- TOSH_SET_SIMO0_PIN();
- TOSH_MAKE_SIMO0_INPUT();
- TOSH_MAKE_UCLK0_INPUT();
- TOSH_CLR_FLASH_HOLD_PIN();
- }
-
-
- // need to undef atomic inside header files or nesC ignores the directive
- #undef atomic
void TOSH_SET_PIN_DIRECTIONS(void)
{
// reset all of the ports to be input and using i/o functionality
- atomic
- {
P1SEL = 0;
P2SEL = 0;
--- 24,30 ----
***************
*** 177,191 ****
P1IE = 0;
P2IE = 0;
-
- // the commands above take care of the pin directions
- // there is no longer a need for explicit set pin
- // directions using the TOSH_SET/CLR macros
-
- // wait 10ms for the flash to startup
- // TOSH_uwait(1024*10);
- // Put the flash in deep sleep state
- // TOSH_FLASH_M25P_DP();
-
- }//atomic
}
--- 54,57 ----
--- msp430hardware.h DELETED ---
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STM25PM.nc, 1.1, 1.2
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