[Tinyos-beta-commits] CVS: tinyos-1.x/beta/platform/imote2
BluSHM.nc, 1.7, 1.8 BulkTxRx.nc, 1.1, 1.2 HPLUARTC.nc, 1.2,
1.3 PMIC.nc, 1.1, 1.2 PMICM.nc, 1.1, 1.2 SSP1M.nc, 1.2,
1.3 UARTBufferC.nc, 1.1, 1.2 pmic.h, 1.3, 1.4
Lama Nachman
lnachman at users.sourceforge.net
Tue Oct 18 14:11:22 PDT 2005
- Previous message: [Tinyos-beta-commits] CVS: tinyos-1.x/beta/platform/imote2
DebugUART.nc, NONE, 1.1 DebugUARTM.nc, NONE,
1.1 HPLDebugUARTC.nc, NONE, 1.1 SettingsC.nc, NONE,
1.1 SettingsM.nc, NONE, 1.1
- Next message: [Tinyos-beta-commits] CVS: tinyos-1.x/beta/platform/pxa27x
PXA27XPowerModes.h, NONE, 1.1 PXA27XPowerModes.nc, NONE,
1.1 PXA27XPowerModesM.nc, NONE, 1.1 Sleep.nc, NONE,
1.1 SleepC.nc, NONE, 1.1 SleepM.nc, NONE, 1.1 HPLInit.nc, 1.8,
1.9 PXA27XUSBClient.h, 1.2, 1.3
- Messages sorted by:
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Update of /cvsroot/tinyos/tinyos-1.x/beta/platform/imote2
In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv31658
Modified Files:
BluSHM.nc BulkTxRx.nc HPLUARTC.nc PMIC.nc PMICM.nc SSP1M.nc
UARTBufferC.nc pmic.h
Log Message:
Changed trace to match the dbg syntax, wired HPLUART to use FFUART by
default, added low power support in PMIC (shutdown unused LDOs, switch
down voltage, etc)
Index: BluSHM.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-1.x/beta/platform/imote2/BluSHM.nc,v
retrieving revision 1.7
retrieving revision 1.8
diff -C2 -d -r1.7 -r1.8
*** BluSHM.nc 6 Sep 2005 18:12:13 -0000 1.7
--- BluSHM.nc 18 Oct 2005 21:11:20 -0000 1.8
***************
*** 61,68 ****
DynQueue OutQueue;
// Internal commands: help, ls, prompt, readmem, writemem.
! void trace(const char *format, ...) __attribute ((C, spontaneous)){
! // if (trace_active(mode))
{
char buf[MAX_PRINTF_LEN+1];
--- 61,69 ----
DynQueue OutQueue;
+ TOS_dbg_mode trace_modes;
// Internal commands: help, ls, prompt, readmem, writemem.
! void trace(TOS_dbg_mode mode, const char *format, ...) __attribute ((C, spontaneous)){
! if (trace_active(mode))
{
char buf[MAX_PRINTF_LEN+1];
***************
*** 71,75 ****
va_start(args, format);
! //if (!(mode & DBG_SIM))
{
buflen=vsnprintf(buf,MAX_PRINTF_LEN,format,args);
--- 72,76 ----
va_start(args, format);
! if (!(mode & DBG_SIM))
{
buflen=vsnprintf(buf,MAX_PRINTF_LEN,format,args);
***************
*** 82,85 ****
--- 83,99 ----
}
+ unsigned char trace_active(TOS_dbg_mode mode) __attribute__((C, spontaneous)){
+ return (trace_modes & mode) != 0;
+ }
+
+ void trace_unset() __attribute__ ((C,spontaneous)){
+ trace_modes = 0;
+ }
+
+ void trace_set(TOS_dbg_mode mode) __attribute__ ((C, spontaneous)){
+ trace_modes = mode;
+ }
+
+
void generalSend(uint8_t *buf, uint32_t buflen){
DynQueue QueueTemp;
***************
*** 117,121 ****
strcpy(blush_history[0], data->src);
-
if(0 == strncmp("help", data->src, strlen("help"))){
generalSend("Blue Shell v1.1 (BluSH)\r\n\
--- 131,134 ----
***************
*** 207,211 ****
blush_history[i][0] = '\0';
! // trace_set(DBG_USR1|DBG_USR2|DBG_USR3);
call UartControl.init();
strncpy( blush_prompt, "BluSH>", BLUSH_PROMPT_LENGTH );
--- 220,224 ----
blush_history[i][0] = '\0';
! trace_set(DBG_USR1|DBG_USR2|DBG_USR3);
call UartControl.init();
strncpy( blush_prompt, "BluSH>", BLUSH_PROMPT_LENGTH );
***************
*** 256,259 ****
--- 269,275 ----
for(i = 0; i < numBytesRead; i++)
switch(buff[i]){
+ case 0x0a:
+ //drop newlines on the floor
+ break;
case 0x0d: //ENTER
blush_history_idx = 0;
Index: BulkTxRx.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-1.x/beta/platform/imote2/BulkTxRx.nc,v
retrieving revision 1.1
retrieving revision 1.2
diff -C2 -d -r1.1 -r1.2
*** BulkTxRx.nc 26 Jul 2005 01:36:07 -0000 1.1
--- BulkTxRx.nc 18 Oct 2005 21:11:20 -0000 1.2
***************
*** 1,4 ****
/**
! * The HPLDMA interface is intended to provide the functionality of a DMA
* controller on both the send and receive sides of a transaction. In order
* to provide this functionality, the interface provide 2 commands and 2
--- 1,4 ----
/**
! * The BulkTxRx interface is intended to provide the functionality of a DMA
* controller on both the send and receive sides of a transaction. In order
* to provide this functionality, the interface provide 2 commands and 2
Index: HPLUARTC.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-1.x/beta/platform/imote2/HPLUARTC.nc,v
retrieving revision 1.2
retrieving revision 1.3
diff -C2 -d -r1.2 -r1.3
*** HPLUARTC.nc 15 Feb 2005 18:09:48 -0000 1.2
--- HPLUARTC.nc 18 Oct 2005 21:11:20 -0000 1.3
***************
*** 54,58 ****
implementation
{
! components HPLSTUARTC as HPLUART0M;
UART = HPLUART0M;
--- 54,58 ----
implementation
{
! components HPLFFUARTC as HPLUART0M;
UART = HPLUART0M;
Index: PMIC.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-1.x/beta/platform/imote2/PMIC.nc,v
retrieving revision 1.1
retrieving revision 1.2
diff -C2 -d -r1.1 -r1.2
*** PMIC.nc 26 Sep 2005 02:22:52 -0000 1.1
--- PMIC.nc 18 Oct 2005 21:11:20 -0000 1.2
***************
*** 50,53 ****
--- 50,54 ----
*/
command result_t setCoreVoltage(uint8_t trimValue);
+ command result_t shutDownLDOs();
command result_t getBatteryVoltage(uint8_t *val);
Index: PMICM.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-1.x/beta/platform/imote2/PMICM.nc,v
retrieving revision 1.1
retrieving revision 1.2
diff -C2 -d -r1.1 -r1.2
*** PMICM.nc 26 Sep 2005 02:22:52 -0000 1.1
--- PMICM.nc 18 Oct 2005 21:11:20 -0000 1.2
***************
*** 42,45 ****
--- 42,53 ----
*/
+ #define START_RADIO_LDO 1
+ #define START_SENSOR_BOARD_LDO 1
+ /*
+ * VCC_MEM is connected to BUCK2 by default, make sure you have a board
+ * that has the right resistor settings before disabling BUCK2
+ */
+ #define DISABLE_BUCK2 0
+
includes trace;
***************
*** 69,73 ****
CKEN |= CKEN15_PMI2C;
PCFR |= PCFR_PI2C_EN;
! PICR = ICR_IUE | ICR_SCLEA;
atomic{
gotReset=FALSE;
--- 77,81 ----
CKEN |= CKEN15_PMI2C;
PCFR |= PCFR_PI2C_EN;
! PICR = ICR_IUE | ICR_SCLE;
atomic{
gotReset=FALSE;
***************
*** 144,147 ****
--- 152,195 ----
}
+ void startLDOs() {
+ uint8_t temp;
+ uint8_t oldVal, newVal;
+
+ #if START_SENSOR_BOARD_LDO
+ // TODO : Need to move out of here to sensor board functions
+ readPMIC(PMIC_A_REG_CONTROL_1, &oldVal, 1);
+ newVal = oldVal | ARC1_LDO10_EN | ARC1_LDO11_EN; // sensor board
+ writePMIC(PMIC_A_REG_CONTROL_1, newVal);
+
+ readPMIC(PMIC_B_REG_CONTROL_2, &oldVal, 1);
+ newVal = oldVal | BRC2_LDO10_EN | BRC2_LDO11_EN;
+ writePMIC(PMIC_B_REG_CONTROL_2, newVal);
+ #endif
+
+ #if START_RADIO_LDO
+ // TODO : Move to radio start
+ readPMIC(PMIC_B_REG_CONTROL_1, &oldVal, 1);
+ newVal = oldVal | BRC1_LDO5_EN;
+ writePMIC(PMIC_B_REG_CONTROL_1, newVal);
+ #endif
+
+ #if DISABLE_BUCK2 // Disable BUCK2 if VCC_MEM is not configured to use BUCK2
+ readPMIC(PMIC_B_REG_CONTROL_1, &oldVal, 1);
+ newVal = oldVal & ~BRC1_BUCK_EN;
+ writePMIC(PMIC_B_REG_CONTROL_1, newVal);
+ #endif
+
+ #if 0
+ // Configure above LDOs, Radio and sensor board LDOs to turn off in sleep
+ // TODO : Sleep setting doesn't work
+ temp = BSC1_LDO1(1) | BSC1_LDO2(1) | BSC1_LDO3(1) | BSC1_LDO4(1);
+ writePMIC(PMIC_B_SLEEP_CONTROL_1, temp);
+ temp = BSC2_LDO5(1) | BSC2_LDO7(1) | BSC2_LDO8(1) | BSC2_LDO9(1);
+ writePMIC(PMIC_B_SLEEP_CONTROL_2, temp);
+ temp = BSC3_LDO12(1);
+ writePMIC(PMIC_B_SLEEP_CONTROL_3, temp);
+ #endif
+ }
+
command result_t StdControl.start(){
//init unit
***************
*** 168,171 ****
--- 216,221 ----
// Set default core voltage to 0.85 V
call PMIC.setCoreVoltage(B2R1_TRIM_P85_V);
+
+ startLDOs();
return SUCCESS;
}
***************
*** 185,194 ****
if(status & ISR_ITE){
update |= ISR_ITE;
! trace("sent data");
}
if(status & ISR_BED){
update |= ISR_BED;
! trace("bus error");
}
PISR = update;
--- 235,244 ----
if(status & ISR_ITE){
update |= ISR_ITE;
! trace(DBG_USR1,"sent data");
}
if(status & ISR_BED){
update |= ISR_BED;
! trace(DBG_USR1,"bus error");
}
PISR = update;
***************
*** 217,221 ****
}
else{
! trace("PMIC EVENTs =%#x %#x %#x\r\n",events[0], events[1], events[2]);
}
}
--- 267,271 ----
}
else{
! trace(DBG_USR1,"PMIC EVENTs =%#x %#x %#x\r\n",events[0], events[1], events[2]);
}
}
***************
*** 229,232 ****
--- 279,310 ----
}
+ command result_t PMIC.shutDownLDOs() {
+ uint8_t temp;
+ uint8_t oldVal, newVal;
+ /*
+ * Shut down all LDOs that are not controlled by the sleep mode
+ * Note, we assume here the LDO10 & LDO11 (sensor board) will be off
+ * Should be moved to sensor board control
+ */
+
+ // LDO1, LDO4, LDO6, LDO7, LDO8, LDO9, LDO10, LDO 11, LDO13, LDO14
+
+ readPMIC(PMIC_A_REG_CONTROL_1, &oldVal, 1);
+ newVal = oldVal & ~ARC1_LDO13_EN & ~ARC1_LDO14_EN;
+ newVal = newVal & ~ARC1_LDO10_EN & ~ARC1_LDO11_EN; // sensor board
+ writePMIC(PMIC_A_REG_CONTROL_1, newVal);
+
+ readPMIC(PMIC_B_REG_CONTROL_1, &oldVal, 1);
+ newVal = oldVal & ~BRC1_LDO1_EN & ~BRC1_LDO4_EN & ~BRC1_LDO5_EN &
+ ~BRC1_LDO6_EN & ~BRC1_LDO7_EN;
+ writePMIC(PMIC_B_REG_CONTROL_1, newVal);
+
+ readPMIC(PMIC_B_REG_CONTROL_2, &oldVal, 1);
+ newVal = oldVal & ~BRC2_LDO8_EN & ~BRC2_LDO9_EN & ~BRC2_LDO10_EN &
+ ~BRC2_LDO11_EN & ~BRC2_LDO14_EN & ~BRC2_SIMCP_EN;
+ writePMIC(PMIC_B_REG_CONTROL_2, newVal);
+
+ return SUCCESS;
+ }
result_t getPMICADCVal(uint8_t channel, uint8_t *val){
***************
*** 270,274 ****
//if charger is present due some stuff...75 should be 4.65V or so
if(val > 75 ) {
! trace("Charger Voltage is %.3fV...enabling charger...\r\n", ((val*6) * .01035));
//write the total timeout to be 8 hours
writePMIC(PMIC_TCTR_CONTROL,8);
--- 348,352 ----
//if charger is present due some stuff...75 should be 4.65V or so
if(val > 75 ) {
! trace(DBG_USR1,"Charger Voltage is %.3fV...enabling charger...\r\n", ((val*6) * .01035));
//write the total timeout to be 8 hours
writePMIC(PMIC_TCTR_CONTROL,8);
***************
*** 281,285 ****
}
else{
! trace("Charger Voltage is %.3fV...charger not enabled\r\n", ((val*6) * .01035));
}
}
--- 359,363 ----
}
else{
! trace(DBG_USR1,"Charger Voltage is %.3fV...charger not enabled\r\n", ((val*6) * .01035));
}
}
***************
*** 287,291 ****
//turn off the charger and the LED
call PMIC.getBatteryVoltage(&val);
! trace("Disabling Charger...Battery Voltage is %.3fV\r\n", (val * .01035) + 2.65);
//disable everything that we enabled
writePMIC(PMIC_TCTR_CONTROL,0);
--- 365,369 ----
//turn off the charger and the LED
call PMIC.getBatteryVoltage(&val);
! trace(DBG_USR1,"Disabling Charger...Battery Voltage is %.3fV\r\n", (val * .01035) + 2.65);
//disable everything that we enabled
writePMIC(PMIC_TCTR_CONTROL,0);
***************
*** 318,325 ****
uint8_t val;
if(call PMIC.getBatteryVoltage(&val)){
! trace("Battery Voltage is %.3fV\r\n", (val * .01035) + 2.65);
}
else{
! trace("Error: getBatteryVoltage failed\r\n");
}
return BLUSH_SUCCESS_DONE;
--- 396,403 ----
uint8_t val;
if(call PMIC.getBatteryVoltage(&val)){
! trace(DBG_USR1,"Battery Voltage is %.3fV\r\n", (val * .01035) + 2.65);
}
else{
! trace(DBG_USR1,"Error: getBatteryVoltage failed\r\n");
}
return BLUSH_SUCCESS_DONE;
***************
*** 337,341 ****
uint8_t vBat, vChg, iChg;
call PMIC.chargingStatus(&vBat, &vChg, &iChg);
! trace("vBat = %.3fV %vChg = %.3fV iChg = %.3fA\r\n", (vBat * .01035) + 2.65,((vChg*6) * .01035), ((iChg * .01035)/1.656));
return BLUSH_SUCCESS_DONE;
}
--- 415,419 ----
uint8_t vBat, vChg, iChg;
call PMIC.chargingStatus(&vBat, &vChg, &iChg);
! trace(DBG_USR1,"vBat = %.3fV %vChg = %.3fV iChg = %.3fA\r\n", (vBat * .01035) + 2.65,((vChg*6) * .01035), ((iChg * .01035)/1.656));
return BLUSH_SUCCESS_DONE;
}
Index: SSP1M.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-1.x/beta/platform/imote2/SSP1M.nc,v
retrieving revision 1.2
retrieving revision 1.3
diff -C2 -d -r1.2 -r1.3
*** SSP1M.nc 18 Aug 2005 22:32:21 -0000 1.2
--- SSP1M.nc 18 Oct 2005 21:11:20 -0000 1.3
***************
*** 1,4 ****
//@author Robbie Adler
!
module SSP1M {
provides {
--- 1,4 ----
//@author Robbie Adler
! includes mmu;
module SSP1M {
provides {
***************
*** 292,296 ****
//need to fake the dma transaction until we get DMA working...
! gRxBuffer = RxBuffer;
gRxNumBytes = NumBytes;
gRxBufferPos = 0;
--- 292,296 ----
//need to fake the dma transaction until we get DMA working...
! gRxBuffer = (uint16_t *)RxBuffer;
gRxNumBytes = NumBytes;
gRxBufferPos = 0;
***************
*** 306,310 ****
call RxDMAChannel.setSourceAddr(0x41000010);
! call RxDMAChannel.setTargetAddr(RxBuffer);
call RxDMAChannel.enableSourceAddrIncrement(FALSE);
call RxDMAChannel.enableTargetAddrIncrement(TRUE);
--- 306,310 ----
call RxDMAChannel.setSourceAddr(0x41000010);
! call RxDMAChannel.setTargetAddr((uint32_t)RxBuffer);
call RxDMAChannel.enableSourceAddrIncrement(FALSE);
call RxDMAChannel.enableTargetAddrIncrement(TRUE);
***************
*** 415,425 ****
}
- task void signalBulkTxRxReceiveDone(){
- if(gNumRxFifoOverruns>0){
- trace("Num ROR's = %d\r\n",gNumRxFifoOverruns);
- }
- signal BulkTxRx.BulkReceiveDone(gRxBuffer, gRxNumBytes);
- }
-
async event void SSPInterrupt.fired(){
uint32_t temp;
--- 415,418 ----
***************
*** 494,498 ****
uint32_t SSCR0;
! call RxDMAChannel.run();
SSCR0 = createSSCR0() | SSCR0_SSE;
call HPLSSP.setSSCR0(SSCR0);
--- 487,491 ----
uint32_t SSCR0;
! call RxDMAChannel.run(TRUE);
SSCR0 = createSSCR0() | SSCR0_SSE;
call HPLSSP.setSSCR0(SSCR0);
***************
*** 502,513 ****
async event void RxDMAChannel.Interrupt(){
- //turn off things and post a task to signal that we're done
uint32_t SSCR0;
! gRxInProgress = FALSE;
! SSCR0 = call HPLSSP.getSSCR0();
! SSCR0 &= ~SSCR0_SSE;
! call HPLSSP.setSSCR0(SSCR0);
! post signalBulkTxRxReceiveDone();
return;
}
--- 495,522 ----
async event void RxDMAChannel.Interrupt(){
uint32_t SSCR0;
+ uint8_t *newBuffer;
! //invlidate the DCache so that we can bring our data in
! invalidateDCache((uint8_t *)gRxBuffer, gRxNumBytes);
! gRxBuffer = (uint8_t *)signal BulkTxRx.BulkReceiveDone((uint8_t *)gRxBuffer,
! gRxNumBytes);
! if(gRxBuffer){
! //we want to do another read of gRxNumBytes)
! //we should still have our DMA channel, so just all set size and run!
! call RxDMAChannel.setTargetAddr((uint32_t)gRxBuffer);
! call RxDMAChannel.setTransferLength(gRxNumBytes);
! call RxDMAChannel.run(TRUE);
! }
! else{
! if(gNumRxFifoOverruns>0){
! trace(DBG_USR1,"Num ROR's = %d\r\n",gNumRxFifoOverruns);
! }
!
! gRxInProgress = FALSE;
! SSCR0 = call HPLSSP.getSSCR0();
! SSCR0 &= ~SSCR0_SSE;
! call HPLSSP.setSSCR0(SSCR0);
! }
return;
}
Index: UARTBufferC.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-1.x/beta/platform/imote2/UARTBufferC.nc,v
retrieving revision 1.1
retrieving revision 1.2
diff -C2 -d -r1.1 -r1.2
*** UARTBufferC.nc 9 Mar 2005 00:59:24 -0000 1.1
--- UARTBufferC.nc 18 Oct 2005 21:11:20 -0000 1.2
***************
*** 7,11 ****
}
implementation {
! components UARTBufferM, UART;
Control = UARTBufferM;
--- 7,11 ----
}
implementation {
! components UARTBufferM, DebugUART;
Control = UARTBufferM;
***************
*** 13,17 ****
ReceiveData = UARTBufferM;
! UARTBufferM.ByteComm -> UART;
! UARTBufferM.ByteControl -> UART;
}
--- 13,17 ----
ReceiveData = UARTBufferM;
! UARTBufferM.ByteComm -> DebugUART;
! UARTBufferM.ByteControl -> DebugUART;
}
Index: pmic.h
===================================================================
RCS file: /cvsroot/tinyos/tinyos-1.x/beta/platform/imote2/pmic.h,v
retrieving revision 1.3
retrieving revision 1.4
diff -C2 -d -r1.3 -r1.4
*** pmic.h 26 Sep 2005 02:22:52 -0000 1.3
--- pmic.h 18 Oct 2005 21:11:20 -0000 1.4
***************
*** 113,116 ****
--- 113,119 ----
#define PMIC_B_REG_CONTROL_1 0x97
#define PMIC_B_REG_CONTROL_2 0x98
+ #define PMIC_B_SLEEP_CONTROL_1 0x99
+ #define PMIC_B_SLEEP_CONTROL_2 0x9A
+ #define PMIC_B_SLEEP_CONTROL_3 0x9B
// IRQ_MASK_A
***************
*** 205,207 ****
--- 208,225 ----
#define BRC2_SLEEP 0x80 // off
+ // Sleep control 1 for Baseband reg space
+ #define BSC1_LDO1(_x) (((_x) & 0x3) << 0)
+ #define BSC1_LDO2(_x) (((_x) & 0x3) << 2)
+ #define BSC1_LDO3(_x) (((_x) & 0x3) << 4)
+ #define BSC1_LDO4(_x) (((_x) & 0x3) << 6)
+
+ // Sleep control 2 for Baseband reg space
+ #define BSC2_LDO5(_x) (((_x) & 0x3) << 0)
+ #define BSC2_LDO7(_x) (((_x) & 0x3) << 2)
+ #define BSC2_LDO8(_x) (((_x) & 0x3) << 4)
+ #define BSC2_LDO9(_x) (((_x) & 0x3) << 6)
+
+ // Sleep control 3 for Baseband reg space
+ #define BSC3_LDO12(_x) (((_x) & 0x3) << 0)
+
#endif //PMIC_H
- Previous message: [Tinyos-beta-commits] CVS: tinyos-1.x/beta/platform/imote2
DebugUART.nc, NONE, 1.1 DebugUARTM.nc, NONE,
1.1 HPLDebugUARTC.nc, NONE, 1.1 SettingsC.nc, NONE,
1.1 SettingsM.nc, NONE, 1.1
- Next message: [Tinyos-beta-commits] CVS: tinyos-1.x/beta/platform/pxa27x
PXA27XPowerModes.h, NONE, 1.1 PXA27XPowerModes.nc, NONE,
1.1 PXA27XPowerModesM.nc, NONE, 1.1 Sleep.nc, NONE,
1.1 SleepC.nc, NONE, 1.1 SleepM.nc, NONE, 1.1 HPLInit.nc, 1.8,
1.9 PXA27XUSBClient.h, 1.2, 1.3
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