[Tinyos-beta-commits] CVS: tinyos-1.x/beta/platform/imote2
HPLCC2420M.nc, 1.5, 1.6
Robbie Adler
radler at users.sourceforge.net
Mon Sep 19 13:58:40 PDT 2005
Update of /cvsroot/tinyos/tinyos-1.x/beta/platform/imote2
In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv21539
Modified Files:
HPLCC2420M.nc
Log Message:
some fixes for DMA/cache coherency issues
Index: HPLCC2420M.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-1.x/beta/platform/imote2/HPLCC2420M.nc,v
retrieving revision 1.5
retrieving revision 1.6
diff -C2 -d -r1.5 -r1.6
*** HPLCC2420M.nc 18 Aug 2005 22:34:00 -0000 1.5
--- HPLCC2420M.nc 19 Sep 2005 20:58:38 -0000 1.6
***************
*** 41,44 ****
--- 41,45 ----
*/
+ includes MMU;
module HPLCC2420M {
provides {
***************
*** 83,88 ****
norace uint16_t txramaddr;
norace uint16_t rxramaddr;
!
!
command result_t StdControl.init() {
--- 84,90 ----
norace uint16_t txramaddr;
norace uint16_t rxramaddr;
! norace uint32_t errno;
! uint8_t RxDMAInProgress;
!
command result_t StdControl.init() {
***************
*** 161,165 ****
uint8_t status = 0;
uint8_t tmp;
!
TOSH_CLR_CC_CSN_PIN();
// Empty the PXA recieve fifo...
--- 163,170 ----
uint8_t status = 0;
uint8_t tmp;
! if(RxDMAInProgress == TRUE){
! RxDMAInProgress++;
! }
!
TOSH_CLR_CC_CSN_PIN();
// Empty the PXA recieve fifo...
***************
*** 186,189 ****
--- 191,198 ----
uint8_t tmp;
+ if(RxDMAInProgress == TRUE){
+ RxDMAInProgress++;
+ }
+
TOSH_CLR_CC_CSN_PIN();
***************
*** 215,218 ****
--- 224,231 ----
uint8_t tmp;
+ if(RxDMAInProgress == TRUE ){
+ RxDMAInProgress++;
+ }
+
TOSH_CLR_CC_CSN_PIN();
***************
*** 249,252 ****
--- 262,271 ----
// XXX - To simplify things, this only supports 11 byte reads. Longer would be
// signficantly more complicated.
+
+ if(RxDMAInProgress == TRUE){
+ RxDMAInProgress++;
+ }
+
+
if (length < 12) {
***************
*** 291,294 ****
--- 310,318 ----
uint8_t i = 0, tmp;
+ if(RxDMAInProgress == TRUE){
+ RxDMAInProgress++;
+ }
+
+
if (length < 12) {
TOSH_CLR_CC_CSN_PIN();
***************
*** 337,342 ****
uint8_t tmp, OkToUse;
uint8_t pktlen;
! result_t result = SUCCESS;
!
atomic {
rxbuf = data;
--- 361,370 ----
uint8_t tmp, OkToUse;
uint8_t pktlen;
!
! if(RxDMAInProgress == TRUE){
! RxDMAInProgress++;
! }
!
!
atomic {
rxbuf = data;
***************
*** 346,371 ****
while (SSSR_3 & SSSR_RNE) tmp = SSDR_3;
TOSH_CLR_CC_CSN_PIN();
SSDR_3 = (CC2420_RXFIFO | 0x40);
- SSDR_3 = 0;
-
while (SSSR_3 & SSSR_BSY);
-
tmp = SSDR_3;
! pktlen = SSDR_3;
! rxbuf[0] = pktlen;
pktlen++;
-
if (pktlen > 0 && (OkToUse == 0)) {
! rxlen = (pktlen < length) ? pktlen : length;
! call RxDMAChannel.setTargetAddr((uint32_t)(&rxbuf[1]));
! call RxDMAChannel.setTransferLength(rxlen-1);
SSCR1_3 |= SSCR1_RSRE;
! call RxDMAChannel.run();
!
atomic{
gbIgnoreTxDMA = TRUE;
--- 374,421 ----
while (SSSR_3 & SSSR_RNE) tmp = SSDR_3;
+ //for cache coherency reasons, we need to read in the length field from the radio's ram
+ //read 1 byte from address 0x80
+ TOSH_CLR_CC_CSN_PIN();
+
+ //put the address we're interested in out after formating it properly
+ SSDR_3 = 0x80;
+ SSDR_3 = (((0x80 >>1) & 0xc0) | 0x20);
+
+ SSDR_3 = 0; //get the byte we care about
+
+ while(SSSR_3 & SSSR_BSY);
+ TOSH_SET_CC_CSN_PIN();
+
+ tmp = SSDR_3;
+ tmp = SSDR_3;
+ pktlen = SSDR_3;
+
TOSH_CLR_CC_CSN_PIN();
+ //send the access RXFIFO command
SSDR_3 = (CC2420_RXFIFO | 0x40);
while (SSSR_3 & SSSR_BSY);
tmp = SSDR_3;
!
!
! //increment the length to include the length byte itself
pktlen++;
if (pktlen > 0 && (OkToUse == 0)) {
! //don't want to overflow memory...
! atomic{
! rxlen = (pktlen < length) ? pktlen : length;
! }
+ call RxDMAChannel.setTargetAddr((uint32_t)(rxbuf));
+ call RxDMAChannel.setTransferLength(rxlen);
! //enable the dma interrupt and go
SSCR1_3 |= SSCR1_RSRE;
! if(call RxDMAChannel.run(TRUE) == FAIL){
! errno = -1;
! return FAIL;
! }
! RxDMAInProgress = TRUE;
atomic{
gbIgnoreTxDMA = TRUE;
***************
*** 374,389 ****
call TxDMAChannel.setSourceAddr((uint32_t)txbuf);
call TxDMAChannel.enableSourceAddrIncrement(FALSE);
! call TxDMAChannel.setTransferLength(rxlen-1);
! //request a permanent channel
!
SSCR1_3 |= SSCR1_TSRE;
! call TxDMAChannel.run();
}
else {
TOSH_SET_CC_CSN_PIN();
! result = FAIL;
}
-
- return result;
}
--- 424,437 ----
call TxDMAChannel.setSourceAddr((uint32_t)txbuf);
call TxDMAChannel.enableSourceAddrIncrement(FALSE);
! call TxDMAChannel.setTransferLength(rxlen);
!
! //enable the dma interrupt and go
SSCR1_3 |= SSCR1_TSRE;
! return call TxDMAChannel.run(TRUE);
}
else {
TOSH_SET_CC_CSN_PIN();
! return FAIL;
}
}
***************
*** 401,406 ****
*/
async command result_t HPLCC2420FIFO.writeTXFIFO(uint8_t length, uint8_t *data) {
-
uint8_t OkToUse;
atomic {
txbuf = data;
--- 449,458 ----
*/
async command result_t HPLCC2420FIFO.writeTXFIFO(uint8_t length, uint8_t *data) {
uint8_t OkToUse;
+
+ if(RxDMAInProgress == TRUE){
+ RxDMAInProgress++;
+ }
+
atomic {
txbuf = data;
***************
*** 409,412 ****
--- 461,465 ----
}
if(OkToUse == 0){
+ cleanDCache(txbuf, txlen);
call TxDMAChannel.setSourceAddr((uint32_t)data);
***************
*** 424,428 ****
SSCR1_3 |= SSCR1_TSRE;
! call TxDMAChannel.run();
return SUCCESS;
}
--- 477,481 ----
SSCR1_3 |= SSCR1_TSRE;
! call TxDMAChannel.run(TRUE);
return SUCCESS;
}
***************
*** 570,576 ****
--- 623,632 ----
async event void RxDMAChannel.Interrupt(){
//turn off things and post a task to signal that we're done
+ RxDMAInProgress = FALSE;
TOSH_SET_CC_CSN_PIN();
SSCR1_3 &= ~SSCR1_RSRE;
+ invalidateDCache(rxbuf, rxlen);
+
post signalRXFIFO();
return;
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