[Tinyos-beta-commits] CVS: tinyos-1.x/beta/platform/pxa27x
FileList.h, NONE, 1.1 FileStorageUtil.nc, NONE,
1.1 FormatStorageC.nc, NONE, 1.1 FormatStorageM.nc, NONE,
1.1 HALPXA27X.nc, NONE, 1.1 HALPXA27XC.nc, NONE,
1.1 HALPXA27XM.nc, NONE, 1.1 I2CTempC.nc, NONE,
1.1 I2CTempM.nc, NONE, 1.1 PXA27XOneHzClock.nc, NONE,
1.1 PXA27XPowerManagement.nc, NONE,
1.1 PXA27XPowerManagementM.nc, NONE, 1.1 PXA27XRTCC.nc, NONE,
1.1 PXA27XRTCM.nc, NONE, 1.1 PXA27XSysTimeM.nc, NONE,
1.1 PXA27XWallClockM.nc, NONE, 1.1 PXA27xPowerManagement.h,
NONE, 1.1 PXAFlash.h, NONE, 1.1 SectorStorage.nc, NONE,
1.1 StorageManager.nc, NONE, 1.1 StorageManagerC.nc, NONE,
1.1 StorageManagerM.nc, NONE, 1.1 Storage_chip.h, NONE,
1.1 SysTime64.nc, NONE, 1.1 SysTimeC.nc, NONE, 1.1 TimerM.nc,
NONE, 1.1 WallClock.nc, NONE, 1.1 pxa27x_registers_def.h, NONE, 1.1
Lama Nachman
lnachman at users.sourceforge.net
Mon Oct 9 19:14:38 PDT 2006
- Previous message: [Tinyos-beta-commits] CVS: tinyos-1.x/beta/platform/imote2
BluSHC.nc, 1.4, 1.5 BluSHM.nc, 1.8, 1.9 BulkTxRx.nc, 1.2,
1.3 FlashM.nc, 1.12, 1.13 HPLCC2420M.nc, 1.8,
1.9 HPLFFUARTC.nc, 1.1, 1.2 HPLFFUARTM.nc, 1.3,
1.4 HPLSTUARTC.nc, 1.1, 1.2 HPLSTUARTM.nc, 1.3,
1.4 HPLUSBClientGPIOM.nc, 1.4, 1.5 PMIC.nc, 1.2, 1.3 PMICC.nc,
1.1, 1.2 PMICM.nc, 1.3, 1.4 SSP.nc, 1.1, 1.2 SSP1C.nc, 1.2,
1.3 SSP1M.nc, 1.4, 1.5 SettingsC.nc, 1.2, 1.3 SettingsM.nc,
1.2, 1.3 TimerJiffyAsyncC.nc, 1.1, 1.2 hardware.h, 1.8,
1.9 pmic.h, 1.4, 1.5
- Next message: [Tinyos-beta-commits]
CVS: tinyos-1.x/beta/platform/pxa27x Flash.nc, 1.3,
1.4 HPLClock.nc, 1.1, 1.2 HPLInitM.nc, 1.3,
1.4 PXA27XClockM.nc, 1.2, 1.3 PXA27XDMAC.nc, 1.2,
1.3 PXA27XDMAChannel.nc, 1.3, 1.4 PXA27XDMAExtReq.nc, 1.1,
1.2 PXA27XDMAM.nc, 1.3, 1.4 PXA27XGPIOIntC.nc, 1.1,
1.2 PXA27XGPIOIntM.nc, 1.3, 1.4 PXA27XI2CM.nc, 1.2,
1.3 PXA27XInterruptM.nc, 1.4, 1.5 PXA27XPowerModes.h, 1.2,
1.3 PXA27XPowerModesM.nc, 1.2, 1.3 PXA27XUSBClientC.nc, 1.4,
1.5 PXA27XUSBClientM.nc, 1.10, 1.11 PXA27Xdynqueue.c, 1.4,
1.5 PXA27Xdynqueue.h, 1.2, 1.3 SimpleWDTM.nc, 1.1,
1.2 pxa27xhardware.h, 1.7, 1.8
- Messages sorted by:
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Update of /cvsroot/tinyos/tinyos-1.x/beta/platform/pxa27x
In directory sc8-pr-cvs10.sourceforge.net:/tmp/cvs-serv10261
Added Files:
FileList.h FileStorageUtil.nc FormatStorageC.nc
FormatStorageM.nc HALPXA27X.nc HALPXA27XC.nc HALPXA27XM.nc
I2CTempC.nc I2CTempM.nc PXA27XOneHzClock.nc
PXA27XPowerManagement.nc PXA27XPowerManagementM.nc
PXA27XRTCC.nc PXA27XRTCM.nc PXA27XSysTimeM.nc
PXA27XWallClockM.nc PXA27xPowerManagement.h PXAFlash.h
SectorStorage.nc StorageManager.nc StorageManagerC.nc
StorageManagerM.nc Storage_chip.h SysTime64.nc SysTimeC.nc
TimerM.nc WallClock.nc pxa27x_registers_def.h
Log Message:
Pushed out new release OCT/2006
--- NEW FILE: FileList.h ---
/* tab:4
*
*
* "Copyright (c) 2000-2002 The Regents of the University of California.
* All rights reserved.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation for any purpose, without fee, and without written agreement is
* hereby granted, provided that the above copyright notice, the following
* two paragraphs and the author appear in all copies of this software.
*
* IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
* DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
* OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
* CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS
* ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
* PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
*
*/
/* tab:4
* IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By
* downloading, copying, installing or using the software you agree to
* this license. If you do not agree to this license, do not download,
* install, copy or use the software.
*
* Intel Open Source License
*
* Copyright (c) 2002 Intel Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* Neither the name of the Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*/
/**
* @file FileList.h
* @author Junaith Ahemed Shahabdeen
*
* Linked List definitions and access functions for the
* Flash File System.
*
*/
#ifndef _FILE_LIST_H
#define _FILE_LIST_H
typedef struct list_ptr
{
struct list_ptr *next, *prev;
} list_ptr;
#define INIT_LIST(ptr) do { \
(ptr)->next = (ptr); (ptr)->prev = (ptr); \
} while (0)
#define get_list_entry(ptr, type, member) \
((type *)((char *)(ptr)-(unsigned long)(&((type *)0)->member)))
#define for_each_node_in_list(pos, n, head) \
for (pos = (head)->next, n = pos->next; pos != (head); pos = n, n = pos->next)
#define for_each_member(pos, head, member) \
for (pos = get_list_entry((head)->next, typeof(*pos), member); \
&pos->member != (head); \
pos = get_list_entry(pos->member.next, typeof(*pos), member))
#define for_each_prev(pos, head) \
for (pos = (head)->prev; pos != (head); pos = pos->prev)
#define move_list_ptr(pos, head, num, cnt) \
for (pos = (head)->next;(pos != head) && (cnt < num); pos = pos->next, cnt ++)
static inline void _add_to_list(list_ptr *node,
list_ptr *prev,
list_ptr *next)
{
next->prev = node;
node->next = next;
node->prev = prev;
prev->next = node;
}
static inline void _del_node_from_list (list_ptr *prev, list_ptr *next)
{
next->prev = prev;
prev->next = next;
}
static inline void add_node(list_ptr *node, list_ptr *head)
{
_add_to_list (node, head, head->next);
}
static inline void add_node_to_tail(list_ptr *node, list_ptr *head)
{
_add_to_list (node, head->prev, head);
}
static inline void delete_node(list_ptr *entry)
{
_del_node_from_list(entry->prev, entry->next);
entry->next = (void *) 0;
entry->prev = (void *) 0;
}
static inline int is_list_empty(list_ptr *head)
{
return head->next == head;
}
static inline void _list_join(list_ptr *list,
list_ptr *head)
{
list_ptr *first = list->next;
list_ptr *last = list->prev;
list_ptr *at = head->next;
first->prev = head;
head->next = first;
last->next = at;
at->prev = last;
}
static inline void join_lists (list_ptr *list,
list_ptr *head)
{
if (!is_list_empty(list))
_list_join(list, head->prev);
//_list_join(list, head);
}
#endif
--- NEW FILE: FileStorageUtil.nc ---
// $Id: FileStorageUtil.nc,v 1.1 2006/10/10 02:14:35 lnachman Exp $
/* tab:2
* "Copyright (c) 2000-2005 The Regents of the University of California.
* All rights reserved.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation for any purpose, without fee, and without written agreement is
* hereby granted, provided that the above copyright notice, the following
* two paragraphs and the author appear in all copies of this software.
*
* IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
* DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
* OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
* CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS
* ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
* PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
*/
/**
* @author Junaith Ahemed Shahabdeen
*
*/
includes Storage;
interface FileStorageUtil
{
/**
* FileStorageUtil.updateMountStatus
*
* The function updates the current mount status of a file in
* its metadata. The mount status is a boolean set to TRUE
* when mounted and FALSE when unmounted.
*
*/
command result_t updateMountStatus(volume_id_t id, bool status);
/**
* FileStorageUtil.filedeleted
*
* Event which is signaled after a successfull file delete. This event
* is usedful to notify the storage manager after a file delete.
*
* @param filename Name of the file that was deleted.
*/
event void filedeleted (volume_id_t id, const uint8_t* filename);
}
--- NEW FILE: FormatStorageC.nc ---
// $Id: FormatStorageC.nc,v 1.1 2006/10/10 02:14:35 lnachman Exp $
/* tab:2
* "Copyright (c) 2000-2005 The Regents of the University of California.
* All rights reserved.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation for any purpose, without fee, and without written agreement is
* hereby granted, provided that the above copyright notice, the following
* two paragraphs and the author appear in all copies of this software.
*
* IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
* DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
* OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
* CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS
* ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
* PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
*/
/*
* @author: Jonathan Hui <jwhui at cs.berkeley.edu>
*/
includes crc;
configuration FormatStorageC
{
provides
{
interface FileStorage;
interface FileStorageUtil;
}
}
implementation {
components CrcC, FormatStorageM, Main;
components HALPXA27XC;
components FlashC;
FileStorage = FormatStorageM;
FileStorageUtil = FormatStorageM;
Main.StdControl -> FormatStorageM;
FormatStorageM.Flash -> FlashC;
FormatStorageM.Crc -> CrcC;
FormatStorageM.HALPXA27X -> HALPXA27XC.HALPXA27X[unique("HALPXA27X")];
}
--- NEW FILE: FormatStorageM.nc ---
// $Id: FormatStorageM.nc,v 1.1 2006/10/10 02:14:35 lnachman Exp $
/* tab:2
* "Copyright (c) 2000-2005 The Regents of the University of California.
* All rights reserved.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation for any purpose, without fee, and without written agreement is
* hereby granted, provided that the above copyright notice, the following
* two paragraphs and the author appear in all copies of this software.
*
* IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
* DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
* OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
* CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS
[...1299 lines suppressed...]
}
void pageProgramDone()
{
return;
}
event void HALPXA27X.blockEraseDone()
{
return;
}
event void HALPXA27X.pageProgramDone()
{
//pageProgramDone();
}
event void HALPXA27X.bulkEraseDone() {}
event void HALPXA27X.writeSRDone() {}
}
--- NEW FILE: HALPXA27X.nc ---
// $Id: HALPXA27X.nc,v 1.1 2006/10/10 02:14:35 lnachman Exp $
/* tab:4
* "Copyright (c) 2000-2005 The Regents of the University of California.
* All rights reserved.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation for any purpose, without fee, and without written agreement is
* hereby granted, provided that the above copyright notice, the following
* two paragraphs and the author appear in all copies of this software.
*
* IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
* DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
* OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
* CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS
* ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
* PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
*/
/*
* @author: Jonathan Hui <jwhui at cs.berkeley.edu>
*/
includes PXAFlash;
interface HALPXA27X
{
command result_t read(stm25p_addr_t addr, void* data, stm25p_addr_t len);
command result_t pageProgram(stm25p_addr_t addr, void* data, stm25p_addr_t len);
event void pageProgramDone();
command result_t blockErase(stm25p_addr_t addr);
event void blockEraseDone();
command result_t bulkErase();
event void bulkEraseDone();
command result_t readSR(void* value);
command result_t writeSR(uint8_t value);
event void writeSRDone();
command result_t computeCrc(uint16_t* crcResult, uint16_t crc,
stm25p_addr_t addr, stm25p_addr_t len);
command stm25p_sig_t getSignature();
command result_t clearBlock (uint16_t block);
command result_t wordProgram (stm25p_addr_t addr, uint16_t word);
}
--- NEW FILE: HALPXA27XC.nc ---
// $Id: HALPXA27XC.nc,v 1.1 2006/10/10 02:14:35 lnachman Exp $
/* tab:4
* "Copyright (c) 2000-2005 The Regents of the University of California.
* All rights reserved.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation for any purpose, without fee, and without written agreement is
* hereby granted, provided that the above copyright notice, the following
* two paragraphs and the author appear in all copies of this software.
*
* IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
* DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
* OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
* CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS
* ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
* PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
*/
/*
* @author: Jonathan Hui <jwhui at cs.berkeley.edu>
*
* ported to Imote2 - Junaith Ahemed
*/
includes crc;
includes PXAFlash;
configuration HALPXA27XC
{
provides
{
interface StdControl;
interface HALPXA27X[volume_t volume];
}
}
implementation
{
components HALPXA27XM, FlashC, LedsC as Leds, TimerC;
StdControl = HALPXA27XM;
StdControl = TimerC;
HALPXA27X = HALPXA27XM;
HALPXA27XM.Flash -> FlashC;
HALPXA27XM.Leds -> Leds;
HALPXA27XM.Timer -> TimerC.Timer[unique("Timer")];
}
--- NEW FILE: HALPXA27XM.nc ---
// $Id: HALPXA27XM.nc,v 1.1 2006/10/10 02:14:35 lnachman Exp $
/* tab:4
* "Copyright (c) 2000-2005 The Regents of the University of California.
* All rights reserved.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation for any purpose, without fee, and without written agreement is
* hereby granted, provided that the above copyright notice, the following
* two paragraphs and the author appear in all copies of this software.
*
* IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
* DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
* OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
* CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS
* ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
* PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
*/
/*
* @author: Jonathan Hui <jwhui at cs.berkeley.edu>
*/
module HALPXA27XM {
provides {
interface StdControl;
interface HALPXA27X[volume_t volume];
}
uses {
interface Flash;
interface Leds;
interface Timer;
}
}
implementation
{
volume_t curVolume;
stm25p_sig_t signature;
uint16_t crcScratch;
uint8_t curCmd;
command result_t StdControl.init()
{
signature = FLASH_INVALID_SIG;
return SUCCESS;
}
command result_t StdControl.start() { return SUCCESS; }
command result_t StdControl.stop() { return SUCCESS; }
//task void signalDone()
void signalDone()
{
uint8_t tmpCmd = curCmd;
switch(tmpCmd)
{
case FLASH_PP: signal HALPXA27X.pageProgramDone[curVolume](); break;
case FLASH_SE: signal HALPXA27X.blockEraseDone[curVolume](); break;
case FLASH_BE: signal HALPXA27X.bulkEraseDone[curVolume](); break;
case FLASH_WRSR: signal HALPXA27X.writeSRDone[curVolume](); break;
}
}
#if 0
bool isWriting()
{
uint8_t status;
sendCmd(FLASH_RDSR, 0, &status, sizeof(status));
return !!(status & 0x1);
}
#endif
event result_t Timer.fired()
{
return SUCCESS;
}
result_t newRequest(uint8_t cmd, volume_t volume, stm25p_addr_t addr,
uint8_t* data, stm25p_addr_t len)
{
result_t res = SUCCESS;
curVolume = volume;
curCmd = cmd;
switch(curCmd)
{
case FLASH_PP:
res = call Flash.write (addr, data, len);
break;
case FLASH_SE:
res = call Flash.erase (addr);
break;
case FLASH_BE:
break;
case FLASH_READ:
res = call Flash.read (addr, data, len);
break;
case FLASH_WRSR:
break;
default:
return FAIL;
}
if (res == SUCCESS)
//res = post signalDone ();
signalDone ();
return res;
}
//command result_t HALPXA27X.clearBlock[volume_t volume](storage_addr_t block)
command result_t HALPXA27X.clearBlock[volume_t volume](uint16_t block)
{
result_t ret = FAIL;
storage_addr_t Addr = FLASH_LOGGER_START_ADDR + (block * FLASH_BLOCK_SIZE);
ret = call Flash.erase (Addr);
return ret;
}
command result_t HALPXA27X.wordProgram[volume_t volume](stm25p_addr_t addr,
uint16_t word)
{
return call Flash.write (addr, (void*)&word, 2);
}
command result_t HALPXA27X.read[volume_t volume](stm25p_addr_t addr,
void* data,
stm25p_addr_t len)
{
return call Flash.read (addr, data, len);
//return newRequest (FLASH_READ, volume, addr, data, len);
}
command result_t HALPXA27X.pageProgram[volume_t volume](stm25p_addr_t addr,
void* data,
stm25p_addr_t len)
{
return newRequest(FLASH_PP, volume, addr, data, len);
//return call Flash.write (addr, data, len);
}
command result_t HALPXA27X.blockErase[volume_t volume](stm25p_addr_t addr)
{
return newRequest(FLASH_SE, volume, addr, NULL, 0);
}
command result_t HALPXA27X.bulkErase[volume_t volume]()
{
return newRequest(FLASH_BE, volume, 0, NULL, 0);
}
command result_t HALPXA27X.readSR[volume_t volume](void* value)
{
return newRequest(FLASH_RDSR, volume, 0, value, 1);
}
command result_t HALPXA27X.writeSR[volume_t volume](uint8_t value)
{
return newRequest(FLASH_WRSR, volume, 0, &value, 1);
}
command result_t HALPXA27X.computeCrc[volume_t volume](uint16_t* crcResult,
uint16_t crc,
stm25p_addr_t addr,
stm25p_addr_t len)
{
result_t result;
crcScratch = crc;
result = newRequest(FLASH_CRC, volume, addr, NULL, len);
*crcResult = crcScratch;
return result;
}
command stm25p_sig_t HALPXA27X.getSignature[volume_t volume]()
{
return signature;
}
default event void HALPXA27X.pageProgramDone[volume_t volume]() {}
default event void HALPXA27X.blockEraseDone[volume_t volume]() {}
default event void HALPXA27X.bulkEraseDone[volume_t volume]() {}
default event void HALPXA27X.writeSRDone[volume_t volume]() {}
}
--- NEW FILE: I2CTempC.nc ---
/* tab:4
* IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By
* downloading, copying, installing or using the software you agree to
* this license. If you do not agree to this license, do not download,
* install, copy or use the software.
*
* Intel Open Source License
*
* Copyright (c) 2002 Intel Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* Neither the name of the Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*/
/*
*
* Authors: Lama Nachman, Robert Adler
*/
configuration PMICC{
provides{
interface StdControl;
interface PMIC;
}
}
implementation{
components PMICM,
PXA27XInterruptM,
PXA27XGPIOIntC,
BluSHC,
ResetC,
TimerC;
StdControl = PMICM;
PMIC = PMICM;
PMICM.PI2CInterrupt -> PXA27XInterruptM.PXA27XIrq[IID_PWR_I2C];
PMICM.PMICInterrupt -> PXA27XGPIOIntC.PXA27XGPIOInt[1];
PMICM.chargeMonitorTimer -> TimerC.Timer[unique("Timer")];
PMICM.Reset -> ResetC;
BluSHC.BluSH_AppI[unique("BluSH")] -> PMICM.BatteryVoltage;
BluSHC.BluSH_AppI[unique("BluSH")] -> PMICM.ManualCharging;
BluSHC.BluSH_AppI[unique("BluSH")] -> PMICM.AutoCharging;
BluSHC.BluSH_AppI[unique("BluSH")] -> PMICM.ChargingStatus;
BluSHC.BluSH_AppI[unique("BluSH")] -> PMICM.ReadPMIC;
BluSHC.BluSH_AppI[unique("BluSH")] -> PMICM.WritePMIC;
}
--- NEW FILE: I2CTempM.nc ---
/* tab:4
* IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By
* downloading, copying, installing or using the software you agree to
* this license. If you do not agree to this license, do not download,
* install, copy or use the software.
*
* Intel Open Source License
*
* Copyright (c) 2002 Intel Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* Neither the name of the Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*/
/*
*
* Authors: Lama Nachman, Robert Adler
*/
#define START_RADIO_LDO 1
#define START_SENSOR_BOARD_LDO 1
/*
* VCC_MEM is connected to LDO by default,
* If the imote2 board has R49 on and R40 off then ENABLE_BUCK2 can be set t0 0
* This is assumed to be the default setting.
* If the imote2 board has R49 off and R40 on, you need to set ENABLE_BUCK2
* to 1 when making the app.
*/
#ifndef ENABLE_BUCK2
#define ENABLE_BUCK2 0
#endif
includes trace;
module PMICM{
provides{
interface StdControl;
interface BluSH_AppI as BatteryVoltage;
interface BluSH_AppI as AutoCharging;
interface BluSH_AppI as ManualCharging;
interface BluSH_AppI as ChargingStatus;
interface BluSH_AppI as ReadPMIC;
interface BluSH_AppI as WritePMIC;
interface PMIC;
}
uses {
interface PXA27XInterrupt as PI2CInterrupt;
interface PXA27XGPIOInt as PMICInterrupt;
interface Timer as chargeMonitorTimer;
interface Reset;
}
}
implementation {
#include "pmic.h"
bool gotReset;
TOSH_ASSIGN_PIN(PMIC_TXON, A, 108);
command result_t StdControl.init(){
CKEN |= CKEN_CKEN15;
PCFR |= PCFR_PI2C_EN;
PICR = ICR_IUE | ICR_SCLE;
TOSH_MAKE_PMIC_TXON_OUTPUT();
TOSH_CLR_PMIC_TXON_PIN();
atomic{
gotReset=FALSE;
}
return call PI2CInterrupt.allocate();
}
result_t readPMIC(uint8_t address, uint8_t *value, uint8_t numBytes){
//send the PMIC the address that we want to read
if(numBytes > 0){
PIDBR = PMIC_SLAVE_ADDR<<1;
PICR |= ICR_START;
PICR |= ICR_TB;
while(PICR & ICR_TB);
//actually send the address terminated with a STOP
PIDBR = address;
PICR &= ~ICR_START;
PICR |= ICR_STOP;
PICR |= ICR_TB;
while(PICR & ICR_TB);
PICR &= ~ICR_STOP;
//actually request the read of the data
PIDBR = PMIC_SLAVE_ADDR<<1 | 1;
PICR |= ICR_START;
PICR |= ICR_TB;
while(PICR & ICR_TB);
PICR &= ~ICR_START;
//using Page Read Mode
while (numBytes > 1){
PICR |= ICR_TB;
while(PICR & ICR_TB);
*value = PIDBR;
value++;
numBytes--;
}
PICR |= ICR_STOP;
PICR |= ICR_ACKNAK;
PICR |= ICR_TB;
while(PICR & ICR_TB);
*value = PIDBR;
PICR &= ~ICR_STOP;
PICR &= ~ICR_ACKNAK;
return SUCCESS;
}
else{
return FAIL;
}
}
result_t writePMIC(uint8_t address, uint8_t value){
PIDBR = PMIC_SLAVE_ADDR<<1;
PICR |= ICR_START;
PICR |= ICR_TB;
while(PICR & ICR_TB);
PIDBR = address;
PICR &= ~ICR_START;
PICR |= ICR_TB;
while(PICR & ICR_TB);
PIDBR = value;
PICR |= ICR_STOP;
PICR |= ICR_TB;
while(PICR & ICR_TB);
PICR &= ~ICR_STOP;
return SUCCESS;
}
void startLDOs() {
uint8_t oldVal, newVal;
#if START_SENSOR_BOARD_LDO
// TODO : Need to move out of here to sensor board functions
readPMIC(PMIC_A_REG_CONTROL_1, &oldVal, 1);
newVal = oldVal | ARC1_LDO10_EN | ARC1_LDO11_EN; // sensor board
writePMIC(PMIC_A_REG_CONTROL_1, newVal);
readPMIC(PMIC_B_REG_CONTROL_2, &oldVal, 1);
newVal = oldVal | BRC2_LDO10_EN | BRC2_LDO11_EN;
writePMIC(PMIC_B_REG_CONTROL_2, newVal);
#endif
#if START_RADIO_LDO
// TODO : Move to radio start
readPMIC(PMIC_B_REG_CONTROL_1, &oldVal, 1);
newVal = oldVal | BRC1_LDO5_EN;
writePMIC(PMIC_B_REG_CONTROL_1, newVal);
#endif
#if (!ENABLE_BUCK2) // Disable BUCK2 if VCC_MEM is not configured to use BUCK2
readPMIC(PMIC_B_REG_CONTROL_1, &oldVal, 1);
newVal = oldVal & ~BRC1_BUCK_EN;
writePMIC(PMIC_B_REG_CONTROL_1, newVal);
#endif
#if 0
// Configure above LDOs, Radio and sensor board LDOs to turn off in sleep
// TODO : Sleep setting doesn't work
temp = BSC1_LDO1(1) | BSC1_LDO2(1) | BSC1_LDO3(1) | BSC1_LDO4(1);
writePMIC(PMIC_B_SLEEP_CONTROL_1, temp);
temp = BSC2_LDO5(1) | BSC2_LDO7(1) | BSC2_LDO8(1) | BSC2_LDO9(1);
writePMIC(PMIC_B_SLEEP_CONTROL_2, temp);
temp = BSC3_LDO12(1);
writePMIC(PMIC_B_SLEEP_CONTROL_3, temp);
#endif
}
command result_t StdControl.start(){
//init unit
uint8_t val[3];
call PI2CInterrupt.enable();
//irq is apparently active low...however trigger on both for now
call PMICInterrupt.enable(TOSH_FALLING_EDGE);
/*
* Reset the watchdog, switch it to an interrupt, so we can disable it
* Ignore SLEEP_N pin, enable H/W reset via button
*/
writePMIC(PMIC_SYS_CONTROL_A,
SCA_RESET_WDOG | SCA_WDOG_ACTION | SCA_HWRES_EN);
// Disable all interrupts from PMIC except for ONKEY button
writePMIC(PMIC_IRQ_MASK_A, ~IMA_ONKEY_N);
writePMIC(PMIC_IRQ_MASK_B, 0xFF);
writePMIC(PMIC_IRQ_MASK_C, 0xFF);
//read out the EVENT registers so that we can receive interrupts
readPMIC(PMIC_EVENTS, val, 3);
// Set default core voltage to 0.85 V
//call PMIC.setCoreVoltage(B2R1_TRIM_P85_V);
call PMIC.setCoreVoltage(B2R1_TRIM_P95_V);
startLDOs();
// call PMIC.enableSBVoltage_High(TRUE, LDO_TRIM_3P0);
//call PMIC.setIOVoltage(LDO_TRIM_3P0);
//see if the charger is present and start if it is
//call PMIC.enableManualCharging(TRUE);
return SUCCESS;
}
command result_t StdControl.stop(){
call PI2CInterrupt.disable();
call PMICInterrupt.disable();
CKEN &= ~CKEN_CKEN15;
PICR = 0;
return SUCCESS;
}
async event void PI2CInterrupt.fired(){
uint32_t status, update=0;
status = PISR;
if(status & ISR_ITE){
update |= ISR_ITE;
trace(DBG_USR1,"sent data");
}
if(status & ISR_BED){
update |= ISR_BED;
trace(DBG_USR1,"bus error");
}
PISR = update;
}
task void resetTask(){
call Reset.reset();
}
async event void PMICInterrupt.fired(){
uint8_t events[3];
bool localGotReset;
call PMICInterrupt.clear();
readPMIC(PMIC_EVENTS, events, 3);
if(events[EVENTS_A_OFFSET] & EA_ONKEY_N){
atomic{
localGotReset = gotReset;
}
if(localGotReset==TRUE){
//eliminate error since Reset.reset is not declared as async
post resetTask();
}
else{
atomic{
gotReset=TRUE;
}
}
}
else{
trace(DBG_USR1,"PMIC EVENTs =%#x %#x %#x\r\n",events[0], events[1], events[2]);
}
}
/*
* The Buck2 controls the core voltage, set to appropriate trim value
*/
command result_t PMIC.enable5V(bool enable){
uint8_t oldval;
readPMIC(PMIC_USBPUMP,&oldval,1);
if(enable){
oldval |= USBPUMP_USBVE;
}
else{
oldval &= ~(USBPUMP_USBVE);
}
writePMIC(PMIC_USBPUMP,oldval);
}
command result_t PMIC.setCoreVoltage(uint8_t trimValue) {
writePMIC(PMIC_BUCK2_REG1, (trimValue & B2R1_TRIM_MASK) | B2R1_GO);
return SUCCESS;
}
command result_t PMIC.enableSBVoltage_High(bool enable, uint8_t value){
//LDO 11
uint8_t oldVal, newVal;
//enable or disable the LDO
readPMIC(PMIC_A_REG_CONTROL_1, &oldVal, 1);
newVal = (enable == TRUE)? (oldVal | ARC1_LDO11_EN) : (oldVal & ~ARC1_LDO11_EN);
writePMIC(PMIC_A_REG_CONTROL_1, newVal);
//set the right value
if(enable == TRUE){
readPMIC(PMIC_LDO10_LDO11,&oldVal, 1);
newVal = PMIC_SET_LDOHIGH_TRIM(oldVal, value);
writePMIC(PMIC_LDO10_LDO11,newVal);
}
return SUCCESS;
}
command result_t PMIC.enableSBVoltage_Low(bool enable, uint8_t value){
//LDO 10
uint8_t oldVal, newVal;
//enable or disable the LDO
readPMIC(PMIC_A_REG_CONTROL_1, &oldVal, 1);
newVal = (enable == TRUE)? (oldVal | ARC1_LDO10_EN) : (oldVal & ~ARC1_LDO10_EN);
writePMIC(PMIC_A_REG_CONTROL_1, newVal);
//set the right value
if(enable == TRUE){
readPMIC(PMIC_LDO10_LDO11,&oldVal, 1);
newVal = PMIC_SET_LDOLOW_TRIM(oldVal, value);
writePMIC(PMIC_LDO10_LDO11,newVal);
}
}
command result_t PMIC.setIOVoltage(uint8_t value){
//LDO 18
uint8_t oldVal, newVal;
readPMIC(PMIC_LDO18_LDO19,&oldVal, 1);
newVal = PMIC_SET_LDOLOW_TRIM(oldVal, value);
writePMIC(PMIC_LDO18_LDO19,newVal);
return SUCCESS;
}
command result_t PMIC.shutDownLDOs() {
uint8_t oldVal, newVal;
/*
* Shut down all LDOs that are not controlled by the sleep mode
* Note, we assume here the LDO10 & LDO11 (sensor board) will be off
* Should be moved to sensor board control
*/
// LDO1, LDO4, LDO6, LDO7, LDO8, LDO9, LDO10, LDO 11, LDO13, LDO14
readPMIC(PMIC_A_REG_CONTROL_1, &oldVal, 1);
newVal = oldVal & ~ARC1_LDO13_EN & ~ARC1_LDO14_EN;
newVal = newVal & ~ARC1_LDO10_EN & ~ARC1_LDO11_EN; // sensor board
writePMIC(PMIC_A_REG_CONTROL_1, newVal);
readPMIC(PMIC_B_REG_CONTROL_1, &oldVal, 1);
newVal = oldVal & ~BRC1_LDO1_EN & ~BRC1_LDO4_EN & ~BRC1_LDO5_EN &
~BRC1_LDO6_EN & ~BRC1_LDO7_EN;
writePMIC(PMIC_B_REG_CONTROL_1, newVal);
readPMIC(PMIC_B_REG_CONTROL_2, &oldVal, 1);
newVal = oldVal & ~BRC2_LDO8_EN & ~BRC2_LDO9_EN & ~BRC2_LDO10_EN &
~BRC2_LDO11_EN & ~BRC2_LDO14_EN & ~BRC2_SIMCP_EN;
writePMIC(PMIC_B_REG_CONTROL_2, newVal);
return SUCCESS;
}
result_t getPMICADCVal(uint8_t channel, uint8_t *val){
uint8_t oldval;
result_t rval;
//read out the old value so that we can reset at the end
rval= readPMIC(PMIC_ADC_MAN_CONTROL, &oldval,1);
rcombine(rval,writePMIC(PMIC_ADC_MAN_CONTROL, PMIC_AMC_LDO_INT_Enable));
TOSH_uwait(20);
rcombine(rval,writePMIC(PMIC_ADC_MAN_CONTROL, PMIC_AMC_ADCMUX(channel) | PMIC_AMC_MAN_CONV | PMIC_AMC_LDO_INT_Enable));
rcombine(rval, readPMIC(PMIC_MAN_RES,val,1));
//reset to old state
rcombine(rval,writePMIC(PMIC_ADC_MAN_CONTROL, oldval));
return rval;
}
command result_t PMIC.getBatteryVoltage(uint8_t *val){
//for now, let's use the manual conversion mode
return getPMICADCVal(0, val);
}
command result_t PMIC.chargingStatus(uint8_t *vBat, uint8_t *vChg,
uint8_t *iChg, uint8_t *chargeControl){
if(vBat && vChg && iChg && chargeControl){
readPMIC(PMIC_VBAT_RES,vBat,1);
readPMIC(PMIC_VCHMIN_RES,vChg,1);
readPMIC(PMIC_ICHAVERAGE_RES,iChg,1);
readPMIC(PMIC_CHARGE_CONTROL,chargeControl, 1);
return SUCCESS;
}
else{
return FAIL;
}
}
command result_t PMIC.enableAutoCharging(bool enable){
return SUCCESS;
}
command result_t PMIC.enableManualCharging(bool enable){
//just turn on or off the LED for now!!
uint8_t val;
if(enable){
//want to turn on the charger
getPMICADCVal(2, &val);
//if charger is present due some stuff...75 should be 4.65V or so
if(val > 70 ) {
trace(DBG_USR1,"Charger Voltage is %.3fV...enabling charger...\r\n", ((val*6) * .01035));
//write the total timeout to be 8 hours
writePMIC(PMIC_TCTR_CONTROL,8);
//enable the charger at 100mA and 4.35V
writePMIC(PMIC_CHARGE_CONTROL,PMIC_CC_CHARGE_ENABLE | PMIC_CC_ISET(1) | PMIC_CC_VSET(4));
//turn on the LED
writePMIC(PMIC_LED1_CONTROL,0x80);
//turn on the autoADC features that we care about
writePMIC(PMIC_ADC_MAN_CONTROL,PMIC_AMC_LDO_INT_Enable);
writePMIC(PMIC_ADC_AUTO_CONTROL,0xE);
//start a timer to monitor our progress every 5 minutes!
call chargeMonitorTimer.start(TIMER_REPEAT,300000);
}
else{
trace(DBG_USR1,"Charger Voltage is %.3fV...charger not enabled\r\n", ((val*6) * .01035));
}
}
else{
//turn off the charger and the LED
call PMIC.getBatteryVoltage(&val);
trace(DBG_USR1,"Disabling Charger...Battery Voltage is %.3fV\r\n", (val * .01035) + 2.65);
//disable everything that we enabled
writePMIC(PMIC_TCTR_CONTROL,0x0);
writePMIC(PMIC_CHARGE_CONTROL,0x0);
writePMIC(PMIC_LED1_CONTROL,0x0);
writePMIC(PMIC_ADC_MAN_CONTROL,0x0);
writePMIC(PMIC_ADC_AUTO_CONTROL,0x0);
}
return SUCCESS;
}
event result_t chargeMonitorTimer.fired(){
uint8_t val;
call PMIC.getBatteryVoltage(&val);
//stop when vBat>4V
if(val>130){
call PMIC.enableManualCharging(FALSE);
call chargeMonitorTimer.stop();
}
return SUCCESS;
}
command BluSH_result_t BatteryVoltage.getName(char *buff, uint8_t len){
const char name[] = "BatteryVoltage";
strcpy(buff,name);
return BLUSH_SUCCESS_DONE;
}
command BluSH_result_t BatteryVoltage.callApp(char *cmdBuff, uint8_t cmdLen,
char *resBuff, uint8_t resLen){
uint8_t val;
if(call PMIC.getBatteryVoltage(&val)){
trace(DBG_USR1,"Battery Voltage is %.3fV\r\n", (val * .01035) + 2.65);
}
else{
trace(DBG_USR1,"Error: getBatteryVoltage failed\r\n");
}
return BLUSH_SUCCESS_DONE;
}
command BluSH_result_t ChargingStatus.getName(char *buff, uint8_t len){
const char name[] = "ChargingStatus";
strcpy(buff,name);
return BLUSH_SUCCESS_DONE;
}
command BluSH_result_t ChargingStatus.callApp(char *cmdBuff, uint8_t cmdLen,
char *resBuff, uint8_t resLen){
uint8_t vBat, vChg, iChg,chargeControl;
call PMIC.chargingStatus(&vBat, &vChg, &iChg,&chargeControl);
trace(DBG_USR1,"vBat = %.3fV %vChg = %.3fV iChg = %.3fA chargeControl =%#x\r\n", (vBat * .01035) + 2.65,((vChg*6) * .01035), ((iChg * .01035)/1.656),chargeControl);
return BLUSH_SUCCESS_DONE;
}
command BluSH_result_t ManualCharging.getName(char *buff, uint8_t len){
const char name[] = "ManualCharging";
strcpy(buff,name);
return BLUSH_SUCCESS_DONE;
}
command BluSH_result_t ManualCharging.callApp(char *cmdBuff, uint8_t cmdLen,
char *resBuff, uint8_t resLen){
uint8_t val;
//get charger's state
readPMIC(PMIC_CHARGE_CONTROL,&val, 1);
if(val > 0){
//charge is already enabled...disable it
call PMIC.enableManualCharging(FALSE);
}
else{
call PMIC.enableManualCharging(TRUE);
}
return BLUSH_SUCCESS_DONE;
}
command BluSH_result_t AutoCharging.getName(char *buff, uint8_t len){
const char name[] = "AutoCharging";
strcpy(buff,name);
return BLUSH_SUCCESS_DONE;
}
command BluSH_result_t AutoCharging.callApp(char *cmdBuff, uint8_t cmdLen,
char *resBuff, uint8_t resLen){
return BLUSH_SUCCESS_DONE;
}
command BluSH_result_t ReadPMIC.getName(char *buff, uint8_t len){
const char name[] = "ReadPMIC";
strcpy(buff,name);
return BLUSH_SUCCESS_DONE;
}
command BluSH_result_t ReadPMIC.callApp(char *cmdBuff, uint8_t cmdLen,
char *resBuff, uint8_t resLen){
uint32_t address;
uint8_t data;
if(strlen(cmdBuff) <strlen("ReadPMIC 22")){
sprintf(resBuff,"Please enter an address to read\r\n");
}
else{
sscanf(cmdBuff,"ReadPMIC %x", &address);
readPMIC(address, &data,1);
trace(DBG_USR1,"read %#x from PMIC address %#x\r\n",data, address);
}
return BLUSH_SUCCESS_DONE;
}
command BluSH_result_t WritePMIC.getName(char *buff, uint8_t len){
const char name[] = "WritePMIC";
strcpy(buff,name);
return BLUSH_SUCCESS_DONE;
}
command BluSH_result_t WritePMIC.callApp(char *cmdBuff, uint8_t cmdLen,
char *resBuff, uint8_t resLen){
uint32_t address, data;
if(strlen(cmdBuff) <strlen("WritePMIC 22 22")){
sprintf(resBuff,"Please enter an address and a value to write\r\n");
}
else{
sscanf(cmdBuff,"WritePMIC %x %x", &address, &data);
writePMIC(address, data);
trace(DBG_USR1,"Wrote %#x to PMIC address %#x\r\n",data, address);
}
return BLUSH_SUCCESS_DONE;
}
}
--- NEW FILE: PXA27XOneHzClock.nc ---
/**
@author Robbie Adler
**/
interface PXA27XOneHzClock{
/**
command to init the One Hz clock event. This command must only be called once
@param none
**/
command result_t init();
/**
command to enabled the One Hz clock event
@param none
**/
command result_t enable();
/**
command to disable the one Hz clock event
@param none
**/
command result_t disable();
/**
event that indicates that a one Hz timer event has occured
@param none
**/
async event void OneHzClockFired();
}
--- NEW FILE: PXA27XPowerManagement.nc ---
/* tab:4
* IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By
* downloading, copying, installing or using the software you agree to
* this license. If you do not agree to this license, do not download,
* install, copy or use the software.
*
* Intel Open Source License
*
* Copyright (c) 2002 Intel Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* Neither the name of the Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*/
/*
*
* Authors: Lama Nachman
*/
interface PXA27XPowerManagement
{
async command result_t SwitchPowerMode(uint8_t TargetPowerMode);
}
--- NEW FILE: PXA27XPowerManagementM.nc ---
/* tab:4
* IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By
* downloading, copying, installing or using the software you agree to
* this license. If you do not agree to this license, do not download,
* install, copy or use the software.
*
* Intel Open Source License
*
* Copyright (c) 2002 Intel Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* Neither the name of the Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*/
/*
*
* Authors: Lama Nachman
*/
#include "PXA27XPowerManagement.h"
module PXA27XPowerManagementM
{
provides {
interface PXA27XPowerManagement ;
}
}
implementation {
async command result_t PXA27XPowerManagement.SwitchPowerMode(uint8_t TargetPowerMode)
{
#if 0
if (TargetPowerMode == DEEP_SLEEP_MODE) {
/*
* Deep sleep settings
* For lowest power :
* a. Enable DC-DC coverter Set PCFR[DC_EN], clear PCFR[L1_EN]
* b. Turn off the 13MHz Osc PCFR[OPDE]
*/
// TODO: Program SYS_DEL & PWR_DEL
// Enable the DC-DC converter for lowest power setting
//PCFR = PCFR & (~PCFR_L1_EN);
//PCFR = PCFR | PCFR_DC_EN;
// PCFR = PCFR | PCFR_OPDE;
// initiate the voltage change
asm volatile (
"mcr p14,0,%0,c7,c0,0\n\t"
:
: "r" (0x7)
);
}
#endif
}
}
--- NEW FILE: PXA27XRTCC.nc ---
/**
@author Robbie Adler
**/
configuration PXA27XRTCC{
provides interface PXA27XOneHzClock;
}
implementation
{
components PXA27XInterruptM,
PXA27XRTCM;
PXA27XOneHzClock = PXA27XRTCM;
PXA27XRTCM.OneHzIrq -> PXA27XInterruptM.PXA27XIrq[IID_RTC_HZ];
}
--- NEW FILE: PXA27XRTCM.nc ---
/**
@author Robbie Adler
**/
module PXA27XRTCM{
provides interface PXA27XOneHzClock;
uses interface PXA27XInterrupt as OneHzIrq;
}
implementation
{
command result_t PXA27XOneHzClock.init(){
call OneHzIrq.allocate();
return SUCCESS;
}
command result_t PXA27XOneHzClock.enable(){
RTSR |= RTSR_HZE;
call OneHzIrq.enable();
return SUCCESS;
}
command result_t PXA27XOneHzClock.disable(){
RTSR &= ~RTSR_HZE;
call OneHzIrq.disable();
return SUCCESS;
}
async event void OneHzIrq.fired(){
RTSR |= RTSR_HZ;
return signal PXA27XOneHzClock.OneHzClockFired();
}
default async event void PXA27XOneHzClock.OneHzClockFired(){
return;
}
}
--- NEW FILE: PXA27XSysTimeM.nc ---
/* tab:4
*
*
* "Copyright (c) 2000-2002 The Regents of the University of California.
* All rights reserved.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation for any purpose, without fee, and without written agreement is
* hereby granted, provided that the above copyright notice, the following
* two paragraphs and the author appear in all copies of this software.
*
* IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
* DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
* OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
* CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS
* ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
* PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
*
*/
/* tab:4
* IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By
* downloading, copying, installing or using the software you agree to
* this license. If you do not agree to this license, do not download,
* install, copy or use the software.
*
* Intel Open Source License
*
* Copyright (c) 2002 Intel Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* Neither the name of the Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*/
/* @author Lama Nachman, Jonathan Huang
*/
includes trace;
module PXA27XSysTimeM {
provides interface StdControl;
provides interface SysTime64;
uses interface PXA27XInterrupt as OSTIrq1;
uses interface PXA27XInterrupt as OSTIrq2;
}
implementation
{
uint32_t TimeHigh;
void task wrapped() {
trace(DBG_USR1, "Wrapped around %d\r\n",OSCR0);
}
command result_t StdControl.init() {
call OSTIrq1.allocate();
call OSTIrq2.allocate();
return SUCCESS;
}
command result_t StdControl.start() {
OSCR0 = 0x1;
OSMR1 = 0; // interrupt on wrap around, use Match register 1
OIER |= OIER_E1; // enable
TimeHigh = 0;
call OSTIrq1.enable();
return SUCCESS;
}
command result_t StdControl.stop() {
OIER &= ~(OIER_E1);
call OSTIrq1.disable();
return SUCCESS;
}
async command uint32_t SysTime64.getTime32() {
uint32_t time;
atomic {
time = OSCR0;
}
return time;
}
async command result_t SysTime64.setAlarm(uint32_t val) {
atomic {
OSMR2 = val; // interrupt on Match register 2
OIER |= OIER_E2; // enable match register 2
}
call OSTIrq2.enable();
return SUCCESS;
}
async command result_t SysTime64.getTime64(uint32_t *tLow, uint32_t *tHigh) {
atomic {
*tLow = OSCR0;
*tHigh = TimeHigh;
}
return SUCCESS;
}
async event void OSTIrq1.fired() {
if (OSSR & OIER_E1) {
// Wrap around condition
OSSR |= OIER_E1; // clear the status reg
// Increment the time
TimeHigh++;
//post wrapped();
}
}
async event void OSTIrq2.fired() {
uint32_t val;
//post wrapped();
if (OSSR & OIER_E2) {
// match register 2 value is reached
OSSR |= OIER_E2; // clear the status reg
OIER &= ~(OIER_E2); // disable match register 2 interrupt
atomic { val = OSMR2; }
signal SysTime64.alarmFired(val);
call OSTIrq2.disable();
}
}
default async event result_t SysTime64.alarmFired(uint32_t val) {return SUCCESS;}
}
--- NEW FILE: PXA27XWallClockM.nc ---
/* tab:4
*
*
* "Copyright (c) 2000-2002 The Regents of the University of California.
* All rights reserved.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation for any purpose, without fee, and without written agreement is
* hereby granted, provided that the above copyright notice, the following
* two paragraphs and the author appear in all copies of this software.
*
* IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
* DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
* OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
* CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS
* ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
* PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
*
*/
/* tab:4
* IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By
* downloading, copying, installing or using the software you agree to
* this license. If you do not agree to this license, do not download,
* install, copy or use the software.
*
* Intel Open Source License
*
* Copyright (c) 2002 Intel Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* Neither the name of the Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*/
/*
* @author Lama Nachman
*/
module PXA27XWallClockM {
provides interface WallClock;
provides interface StdControl;
}
implementation
{
/*
* The Wallclock is maintained using PXA27x OST Channel 7
*/
command result_t StdControl.init() {
return SUCCESS;
}
command result_t StdControl.start() {
OMCR7 = (OMCR_C | OMCR_P | OMCR_CRES(0x3)); // Resolution = 1 sec
atomic {
OSCR7 = 0x1; // start the counter
}
atomic {
OIER &= ~(OIER_E7); // Disable interrupts, only use it as a counter
}
return SUCCESS;
}
command result_t StdControl.stop() {
return SUCCESS;
}
command result_t WallClock.setWallClock(uint32_t Clock) {
atomic {
OSCR7 = Clock;
}
}
command uint32_t WallClock.getWallClock() {
uint32_t clock;
atomic {
clock = OSCR7;
}
return clock;
}
}
--- NEW FILE: PXA27xPowerManagement.h ---
/* tab:4
*
*
* "Copyright (c) 2000-2002 The Regents of the University of California.
* All rights reserved.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation for any purpose, without fee, and without written agreement is
* hereby granted, provided that the above copyright notice, the following
* two paragraphs and the author appear in all copies of this software.
*
* IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
* DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
* OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
* CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS
* ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
* PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
*
*/
/* tab:4
* IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By
* downloading, copying, installing or using the software you agree to
* this license. If you do not agree to this license, do not download,
* install, copy or use the software.
*
* Intel Open Source License
*
* Copyright (c) 2002 Intel Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* Neither the name of the Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*/
/*
*
* Authors: Lama Nachman
*
* This file includes the PMIC command defintions. We are using the Dialog
* DA9030 part.
*
*/
#ifndef PXA27X_POWER_MANAGEMENT_H
#define PXA27X_POWER_MANAGEMENT_H
#define DEEP_SLEEP_MODE 7
#endif
--- NEW FILE: PXAFlash.h ---
// $Id: PXAFlash.h,v 1.1 2006/10/10 02:14:35 lnachman Exp $
/* tab:4
* "Copyright (c) 2000-2005 The Regents of the University of California.
* All rights reserved.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation for any purpose, without fee, and without written agreement is
* hereby granted, provided that the above copyright notice, the following
* two paragraphs and the author appear in all copies of this software.
*
* IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
* DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
* OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
* CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS
* ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
* PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
*/
/*
* @author: Jonathan Hui <jwhui at cs.berkeley.edu>
*/
#ifndef __PXA_FLASH_H__
#define __PXA_FLASH_H__
#include "Storage.h"
enum
{
FLASH_PAGE_SIZE = 1024,
FLASH_BLOCK_SIZE_LOG2 = 18,
/*Flash Block size is 128k*/
FLASH_BLOCK_SIZE = 0x20000,
//FLASH_BLOCK_SIZE = 1L << FLASH_BLOCK_SIZE_LOG2,
/*Number of blocks allocated for Flash Logger.*/
FLASH_NUM_BLOCKS = 204,
};
enum
{
/* Start address for flash fs. The rest of the blocks
* below the given address is used by the app code
* and the boot loader.
*/
FLASH_LOGGER_START_ADDR = 0x240000,
/* The meta data and the sector table is stored in the
* end two blocks of the files system.
*/
FILE_META_DATA_START_ADDR = 0x1BC0000,
SECTOR_TABLE_START_ADDR = 0x1BE0000,
};
enum
{
FLASH_INVALID_SIG = 0xff,
FLASH_INVALID_VOLUME_ID = 0xff,
FLASH_INVALID_BLOCK = 0xff,
INVALID_PTR = 0xffffffff,
/**
* Values are completely random, but its chosen in such
* a way that its easier to switch a valid table to invalid.
*/
VALID_SECTOR_TABLE = 0xADAD,
INVALID_SECTOR_TABLE = 0xA9A9,
VALID_META_DATA = 0xADAD,
INVALID_META_DATA = 0xA9A9,
};
enum
{
FLASH_CMD_SIZE = 1,
FLASH_ADDR_SIZE = 3,
FLASH_FR_DUMMY_BYTES = 1,
FLASH_RES_DUMMY_BYTES = 3,
};
enum { // I, A, D, T, R
FLASH_WREN = 0, // 1, 0, 0, 0, 0
FLASH_WRDI = 1, // 1, 0, 0, 0, 0
FLASH_RDSR = 2, // 1, 0, 0, 0, 1
FLASH_WRSR = 3, // 1, 0, 0, 1, 0
FLASH_READ = 4, // 1, 3, 0, 0, N
FLASH_FAST_READ = 5, // 1, 3, 1, 0, N
FLASH_PP = 6, // 1, 3, 0, N, 0
FLASH_SE = 7, // 1, 3, 0, 0, 0
FLASH_BE = 8, // 1, 0, 0, 0, 0
FLASH_DP = 9, // 1, 0, 0, 0, 0
FLASH_RES = 10, // 1, 0, 3, 0, 1
FLASH_CRC = 11, // 1, 3, 0, 0, 1
};
typedef uint8_t stm25p_status_t;
typedef uint32_t stm25p_addr_t;
typedef uint8_t stm25p_sig_t;
#define FILE_NAME_SIZE 32
typedef struct
{
uint16_t validity;
volume_id_t volumeId;
uint8_t NumBlocks;
bool IsMounted;
uint8_t fileName [FILE_NAME_SIZE];
uint32_t CurrWritePtr;
uint32_t CurrReadPtr;
uint32_t CurrLoc;
} FileMetadata;
typedef struct
{
volume_id_t volumeId;
} BlockMetadata;
typedef struct
{
uint16_t validity;
uint16_t numfiles;
BlockMetadata block[FLASH_NUM_BLOCKS];
uint16_t crc;
} SectorTable;
enum {
FLASH_INVALID_VERSION = 0xffff,
};
enum {
FLASH_INVALID_ADDR = 0xffffffff,
};
enum {
STORAGE_BLOCK_SIZE = FLASH_BLOCK_SIZE,
};
typedef stm25p_addr_t storage_addr_t;
#endif
--- NEW FILE: SectorStorage.nc ---
// $Id: SectorStorage.nc,v 1.1 2006/10/10 02:14:35 lnachman Exp $
/* tab:2
* "Copyright (c) 2000-2005 The Regents of the University of California.
* All rights reserved.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation for any purpose, without fee, and without written agreement is
* hereby granted, provided that the above copyright notice, the following
* two paragraphs and the author appear in all copies of this software.
*
* IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
* DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
* OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
* CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS
* ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
* PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
*/
/*
* @author: Jonathan Hui <jwhui at cs.berkeley.edu>
*/
includes PXAFlash;
interface SectorStorage
{
command result_t read(storage_addr_t addr, void* data, storage_addr_t len);
command result_t fread(void* data, storage_addr_t len);
command result_t write(storage_addr_t addr, void* data, storage_addr_t len);
event void writeDone(storage_result_t result);
command result_t erase(storage_addr_t addr, storage_addr_t len);
event void eraseDone(storage_result_t result);
command result_t computeCrc(uint16_t* crcResult, uint16_t crc,
storage_addr_t addr, storage_addr_t len);
command result_t append(void* data, storage_addr_t len);
command storage_addr_t getWritePtr ();
command result_t resetWritePtr ();
command storage_addr_t getReadPtr ();
command result_t resetReadPtr ();
command result_t rseek (storage_addr_t addr);
}
--- NEW FILE: StorageManager.nc ---
// $Id: StorageManager.nc,v 1.1 2006/10/10 02:14:35 lnachman Exp $
/* tab:2
* "Copyright (c) 2000-2005 The Regents of the University of California.
* All rights reserved.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation for any purpose, without fee, and without written agreement is
* hereby granted, provided that the above copyright notice, the following
* two paragraphs and the author appear in all copies of this software.
*
* IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
* DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
* OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
* CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS
* ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
* PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
*/
/*
* @author: Jonathan Hui <jwhui at cs.berkeley.edu>
*/
includes PXAFlash;
interface StorageManager {
command uint8_t getNumSectors();
command stm25p_addr_t getVolumeSize();
}
--- NEW FILE: StorageManagerC.nc ---
// $Id: StorageManagerC.nc,v 1.1 2006/10/10 02:14:35 lnachman Exp $
/* tab:4
* "Copyright (c) 2000-2005 The Regents of the University of California.
* All rights reserved.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation for any purpose, without fee, and without written agreement is
* hereby granted, provided that the above copyright notice, the following
* two paragraphs and the author appear in all copies of this software.
*
* IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
* DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
* OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
* CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS
* ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
* PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
*/
/*
* @author: Jonathan Hui <jwhui at cs.berkeley.edu>
*/
includes PXAFlash;
configuration StorageManagerC {
provides {
interface SectorStorage[volume_t volume];
interface FileMount as Mount[volume_t volume];
interface StdControl;
interface StorageManager[volume_t volume];
}
}
implementation {
components CrcC, HALPXA27XC, StorageManagerM, LedsC;
components FormatStorageC;
StdControl = StorageManagerM;
SectorStorage = StorageManagerM.SectorStorage;
Mount = StorageManagerM;
StorageManager = StorageManagerM;
StorageManagerM.FormatStorage -> FormatStorageC.FileStorage;
StorageManagerM.FileStorageUtil -> FormatStorageC;
StorageManagerM.Crc -> CrcC;
StorageManagerM.HALPXA27X -> HALPXA27XC.HALPXA27X[unique("HALPXA27X")];
StorageManagerM.Leds -> LedsC;
}
--- NEW FILE: StorageManagerM.nc ---
// $Id: StorageManagerM.nc,v 1.1 2006/10/10 02:14:35 lnachman Exp $
/* tab:2
* "Copyright (c) 2000-2005 The Regents of the University of California.
* All rights reserved.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation for any purpose, without fee, and without written agreement is
* hereby granted, provided that the above copyright notice, the following
* two paragraphs and the author appear in all copies of this software.
*
* IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
* DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
* OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
* CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS
* ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
* PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
*/
/*
* @author: Jonathan Hui <jwhui at cs.berkeley.edu>
*/
includes trace;
module StorageManagerM
{
provides
{
interface SectorStorage[volume_t volume];
interface FileMount as Mount[volume_t volume];
interface StdControl;
interface StorageManager[volume_t volume];
}
uses
{
interface Crc;
interface HALPXA27X;
interface FileStorage as FormatStorage;
interface FileStorageUtil;
interface Leds;
}
}
implementation
{
enum
{
//NUM_VOLUMES = uniqueCount("StorageManager"),
NUM_VOLUMES = uniqueCount("FlashLogger"),
};
enum
{
S_NEVER_USED,
S_READY,
S_MOUNT,
S_READ,
S_COMPUTE_CRC,
S_WRITE,
S_ERASE,
};
bool FSInited = FALSE;
uint8_t state;
SectorTable* sectorTable;
uint8_t baseSector[NUM_VOLUMES];
volume_t clientVolume;
volume_id_t curVolumeId;
uint16_t crcScratch;
storage_addr_t rwAddr;
storage_addr_t rwLen;
void* rwData;
command result_t StdControl.init()
{
uint8_t i;
state = S_NEVER_USED;
FSInited = FALSE;
for ( i = 0; i < NUM_VOLUMES; i++ )
baseSector[i] = FLASH_INVALID_BLOCK;
return SUCCESS;
}
command result_t StdControl.start()
{
if (!(FSInited))
{
call FormatStorage.init ();
FSInited = TRUE;
}
return SUCCESS;
}
command result_t StdControl.stop()
{
return SUCCESS;
}
void signalDone(storage_result_t result)
{
uint8_t tmpState = state;
state = S_READY;
switch(tmpState)
{
case S_MOUNT:
signal Mount.mountDone[clientVolume](result, curVolumeId);
break;
case S_WRITE:
signal SectorStorage.writeDone[clientVolume](result);
break;
case S_ERASE:
signal SectorStorage.eraseDone[clientVolume](result);
break;
}
}
uint16_t computeSectorTableCrc()
{
return call Crc.crc16(sectorTable, sizeof(SectorTable)-2);
}
void actualMount()
{
volume_id_t i;
// find base block
for (i = 0; i < FLASH_NUM_BLOCKS; i++)
{
if (sectorTable->block[i].volumeId == curVolumeId)
{
baseSector[clientVolume] = i;
call FileStorageUtil.updateMountStatus(curVolumeId, TRUE);
signalDone(STORAGE_OK);
//state = S_READY;
return;
}
}
//state = S_READY;
signalDone(STORAGE_FAIL);
}
task void mount()
{
actualMount();
}
storage_addr_t physicalAddr(storage_addr_t volumeAddr)
{
return FLASH_LOGGER_START_ADDR + FLASH_BLOCK_SIZE*baseSector[clientVolume] + volumeAddr;
}
storage_addr_t calcNumBytes()
{
uint32_t numBytes = rwLen;
return numBytes;
}
/**
* continueOp
*
*
*/
result_t continueOp()
{
storage_addr_t pAddr = physicalAddr(rwAddr);
switch(state)
{
case S_READ:
{
result_t res = FAIL;
volume_id_t i = baseSector[clientVolume];
res = call FormatStorage.updateReadPtr(sectorTable->block[i].volumeId,
rwAddr, rwLen);
if (res == SUCCESS)
{
trace (DBG_USR1,"Reading from %ld Logical Addr %ld\r\n",pAddr, rwAddr);
res = call HALPXA27X.read(pAddr, rwData, rwLen);
}
return res;
}
break;
case S_COMPUTE_CRC:
return call HALPXA27X.computeCrc(&crcScratch, crcScratch, pAddr, rwLen);
case S_MOUNT:
pAddr = rwAddr;
break;
case S_ERASE:
trace (DBG_USR1, "Erasing Block with address %ld \r\n", pAddr);
return call HALPXA27X.blockErase(pAddr);
case S_WRITE:
{
result_t res = FAIL;
volume_id_t i = baseSector[clientVolume];
res = call FormatStorage.updateWritePtr(sectorTable->block[i].volumeId,
rwAddr, rwLen);
if (res == SUCCESS)
res = call HALPXA27X.pageProgram(pAddr, rwData, calcNumBytes());
return res;
}
break;
default:
break;
}
return FAIL;
}
command result_t Mount.mount[volume_t volume](volume_id_t volumeID)
{
if (baseSector[volume] != FLASH_INVALID_BLOCK)
return FAIL;
if (state != S_READY && state != S_NEVER_USED)
return FAIL;
curVolumeId = volumeID;
clientVolume = volume;
if (state == S_NEVER_USED)
{
sectorTable = call FormatStorage.getSectorTable();
if (sectorTable == NULL)
return FAIL;
}
state = S_MOUNT;
actualMount ();
return SUCCESS;
}
command result_t Mount.fopen[volume_t volume](const uint8_t* filename)
{
if (baseSector[volume] != FLASH_INVALID_BLOCK)
{
trace (DBG_USR1, "The interface has currently mounted a different file.\r\n");
return FAIL;
}
if (state != S_READY && state != S_NEVER_USED)
{
trace (DBG_USR1, "Invalid State\r\n");
return FAIL;
}
if (call FormatStorage.isFileMounted(filename) == TRUE)
{
trace (DBG_USR1, "The file is already mounted.\r\n");
return FAIL;
}
clientVolume = volume;
if (state == S_NEVER_USED)
sectorTable = call FormatStorage.getSectorTable();
if (sectorTable == NULL)
return FAIL;
curVolumeId = call FormatStorage.getVolumeId(filename);
if (curVolumeId == FLASH_INVALID_VOLUME_ID)
{
trace (DBG_USR1, "Invalid File Name.\r\n");
return FAIL;
}
/* Reset the read pointer of the file to 0*/
call FormatStorage.updateReadPtr(curVolumeId,0,0);
state = S_MOUNT;
actualMount ();
return SUCCESS;
}
/**
* Mount.fclose
*
*/
command result_t Mount.fclose[volume_t volume] (const uint8_t* filename)
{
uint16_t i = baseSector[volume];
volume_id_t tmpVolumeId = sectorTable->block[i].volumeId;
volume_id_t vol = call FormatStorage.getVolumeId (filename);
if ((vol == FLASH_INVALID_VOLUME_ID) || (vol != tmpVolumeId))
return FAIL;
if (call FormatStorage.isFileMounted(filename) == FALSE)
return FAIL;
state = S_READY;
baseSector[volume] = FLASH_INVALID_BLOCK;
return call FileStorageUtil.updateMountStatus(tmpVolumeId, FALSE);
}
command uint8_t StorageManager.getNumSectors[volume_t volume]()
{
uint16_t i = baseSector[volume];
uint16_t tmpVolumeId = sectorTable->block[i].volumeId;
if (baseSector[volume] == FLASH_INVALID_BLOCK)
return FLASH_INVALID_BLOCK;
for (;i < FLASH_NUM_BLOCKS && sectorTable->block[i].volumeId == tmpVolumeId; i++);
return (i - baseSector[volume]);
}
command storage_addr_t StorageManager.getVolumeSize[volume_t volume]()
{
if (baseSector[volume] == FLASH_INVALID_BLOCK)
return FLASH_INVALID_ADDR;
return FLASH_BLOCK_SIZE * call StorageManager.getNumSectors[volume]();
}
result_t newRequest(uint8_t newState, volume_t volume,
storage_addr_t addr, void* data, storage_addr_t len)
{
result_t result;
if (state != S_READY)
return FALSE;
state = newState;
clientVolume = volume;
rwAddr = addr;
rwData = data;
rwLen = len;
result = continueOp();
if (result == FAIL || state == S_READ || state == S_COMPUTE_CRC)
state = S_READY;
return result;
}
command result_t SectorStorage.read[volume_t volume](storage_addr_t addr,
void* data,
storage_addr_t len)
{
return newRequest(S_READ, volume, addr, data, len);
}
command result_t SectorStorage.write[volume_t volume](storage_addr_t addr,
void* data,
storage_addr_t len)
{
return newRequest(S_WRITE, volume, addr, data, len);
}
command result_t SectorStorage.erase[volume_t volume](storage_addr_t addr,
storage_addr_t len)
{
return newRequest(S_ERASE, volume, addr, NULL, len);
}
command storage_addr_t SectorStorage.getWritePtr[volume_t volume]()
{
uint8_t i = baseSector[volume];
uint16_t tmpVolumeId = sectorTable->block[i].volumeId;
storage_addr_t WritePtr = INVALID_PTR;
return call FormatStorage.getWritePtr1(tmpVolumeId);
}
command result_t SectorStorage.resetWritePtr[volume_t volume]()
{
storage_addr_t len = call StorageManager.getNumSectors[volume]();
return newRequest(S_ERASE, volume, 0, NULL, len);
}
command result_t SectorStorage.fread[volume_t volume](void* data, storage_addr_t len)
{
uint8_t i = baseSector[volume];
uint16_t tmpVolumeId = sectorTable->block[i].volumeId;
storage_addr_t ReadPtr = INVALID_PTR;
storage_addr_t WritePtr = INVALID_PTR;
ReadPtr = call FormatStorage.getReadPtr1 (tmpVolumeId);
if (ReadPtr == INVALID_PTR)
return FAIL;
WritePtr = call FormatStorage.getWritePtr1 (tmpVolumeId);
if ((WritePtr == INVALID_PTR) || (WritePtr <= 0))
return FAIL;
if (ReadPtr >= WritePtr)
return FAIL;
/* Adjust the length of data to be read based on the write pointer.*/
len = ((ReadPtr + len) < WritePtr)? len: (WritePtr - ReadPtr);
return newRequest(S_READ, volume, ReadPtr, data, len);
}
command storage_addr_t SectorStorage.getReadPtr[volume_t volume]()
{
uint8_t i = baseSector[volume];
uint16_t tmpVolumeId = sectorTable->block[i].volumeId;
storage_addr_t ReadPtr = INVALID_PTR;
ReadPtr = call FormatStorage.getReadPtr1 (tmpVolumeId);
return ReadPtr;
}
command result_t SectorStorage.resetReadPtr[volume_t volume]()
{
uint8_t i = baseSector[clientVolume];
uint16_t tmpVolId = sectorTable->block[i].volumeId;
if (call FormatStorage.updateReadPtr(tmpVolId,0,0) == SUCCESS)
return SUCCESS;
return FAIL;
}
command result_t SectorStorage.rseek[volume_t volume](storage_addr_t addr)
{
uint8_t i = baseSector[clientVolume];
uint16_t tmpVolId = sectorTable->block[i].volumeId;
if (addr >= call StorageManager.getVolumeSize[volume]())
return FAIL;
if (call FormatStorage.updateReadPtr(tmpVolId,addr,0) == SUCCESS)
return SUCCESS;
return FAIL;
}
command result_t SectorStorage.append[volume_t volume](void* data,
storage_addr_t len)
{
uint8_t i = baseSector[volume];
uint16_t tmpVolumeId = sectorTable->block[i].volumeId;
storage_addr_t WritePtr = INVALID_PTR;
WritePtr = call FormatStorage.getWritePtr1 (tmpVolumeId);
if (WritePtr == INVALID_PTR)
return FAIL;
return newRequest(S_WRITE, volume, WritePtr, data, len);
}
command result_t SectorStorage.computeCrc[volume_t volume](uint16_t* crcResult,
uint16_t crc,
storage_addr_t addr,
storage_addr_t len)
{
result_t result;
crcScratch = crc;
result = newRequest(S_COMPUTE_CRC, volume, addr, NULL, len);
*crcResult = crcScratch;
return result;
}
void pageProgramDone()
{
storage_addr_t lastBytes;
lastBytes = calcNumBytes();
rwAddr += lastBytes;
rwData += lastBytes;
rwLen -= lastBytes;
if (rwLen == 0)
{
if (state == S_MOUNT)
actualMount();
else
signalDone(STORAGE_OK);
return;
}
if (continueOp() == FAIL)
signalDone(STORAGE_FAIL);
}
event void HALPXA27X.pageProgramDone()
{
pageProgramDone();
}
event void HALPXA27X.blockEraseDone()
{
if (rwLen > 1)
{
state = S_READY;
-- rwLen;
rwAddr += FLASH_BLOCK_SIZE;
if (newRequest(S_ERASE, clientVolume, rwAddr, NULL, rwLen) == FAIL)
signalDone(STORAGE_FAIL);
}
else
{
uint8_t i = baseSector[clientVolume];
uint16_t tmpVolId = sectorTable->block[i].volumeId;
if (call FormatStorage.updateWritePtr(tmpVolId,0,0) == SUCCESS)
signalDone(STORAGE_OK);
else
signalDone(STORAGE_FAIL);
}
}
/**
* FileStorageUtil.filedeleted
*
* Event which is signaled after a successfull file delete. This event
* is usedful to notify the storage manager after a file delete.
*
* @param filename Name of the file that was deleted.
*/
event void FileStorageUtil.filedeleted (volume_id_t id, const uint8_t* filename)
{
uint8_t i = 0;
uint8_t j = 0;
uint16_t tmpId = FLASH_INVALID_BLOCK;
for (i = 0; i < NUM_VOLUMES; i++)
{
j = baseSector[i];
tmpId = sectorTable->block[j].volumeId;
if (id == tmpId)
{
baseSector [i] = FLASH_INVALID_BLOCK;
return;
}
}
}
event void HALPXA27X.bulkEraseDone() {}
event void HALPXA27X.writeSRDone() {}
event void FormatStorage.commitDone(storage_result_t result) {}
default event void Mount.mountDone[volume_t volume](storage_result_t result, volume_id_t id) {}
default event void SectorStorage.eraseDone[volume_t volume](result_t result) {}
default event void SectorStorage.writeDone[volume_t volume](result_t result) {}
}
--- NEW FILE: Storage_chip.h ---
// $Id: Storage_chip.h,v 1.1 2006/10/10 02:14:35 lnachman Exp $
/* tab:2
* "Copyright (c) 2000-2005 The Regents of the University of California.
* All rights reserved.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation for any purpose, without fee, and without written agreement is
* hereby granted, provided that the above copyright notice, the following
* two paragraphs and the author appear in all copies of this software.
*
* IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
* DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
* OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
* CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS
* ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
* PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
*/
/*
* @author: Jonathan Hui <jwhui at cs.berkeley.edu>
*/
#ifndef __STORAGE_CHIP_H__
#define __STORAGE_CHIP_H__
#include "PXAFlash.h"
#endif
--- NEW FILE: SysTime64.nc ---
/*
* Copyright (c) 2003, Vanderbilt University
* All rights reserved.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation for any purpose, without fee, and without written agreement is
* hereby granted, provided that the above copyright notice, the following
* two paragraphs and the author appear in all copies of this software.
*
* IN NO EVENT SHALL THE VANDERBILT UNIVERSITY BE LIABLE TO ANY PARTY FOR
* DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
* OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE VANDERBILT
* UNIVERSITY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* THE VANDERBILT UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS
* ON AN "AS IS" BASIS, AND THE VANDERBILT UNIVERSITY HAS NO OBLIGATION TO
* PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS.
*
* Author: Miklos Maroti
* Modified by : Jonathan Huang, Lama Nachman
* Took out the 16 bit flavors, added a 64 bit flavor.
* Date last modified: 6/6/06
*/
/**
* This interface provides access to a free-running CPU timer that is
* started at startup. The current value of this timer is NOT supposed
* to be changed. On the Imote2 platform the current implementation
* uses OSCR0 running at 3.25 MHz
*/
interface SysTime64
{
/**
* This method returns the 64 bit timer in two chunks
* tLow : the low 32 bits, tHigh : The high 32 bits
* The low 32 bits are stored in OSCR0, the high 32 bits are
* maintained by the software
*/
async command result_t getTime64(uint32_t *tLow, uint32_t *tHigh);
/**
* This method returns the lower 32 bits of the current time.
* It just reads the hardware timer.
*/
async command uint32_t getTime32();
/**
* This method sets a match register such that when OSCR0 reaches
* the value, an interrupt is fired.
*/
async command result_t setAlarm(uint32_t val);
/**
* This event is triggered by the interrupt mentioned above.
*/
async event result_t alarmFired(uint32_t val);
}
--- NEW FILE: SysTimeC.nc ---
/* tab:4
*
*
* "Copyright (c) 2000-2002 The Regents of the University of California.
* All rights reserved.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation for any purpose, without fee, and without written agreement is
* hereby granted, provided that the above copyright notice, the following
* two paragraphs and the author appear in all copies of this software.
*
* IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
* DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
* OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
* CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS
* ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
* PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
*
*/
/* tab:4
* IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By
* downloading, copying, installing or using the software you agree to
* this license. If you do not agree to this license, do not download,
* install, copy or use the software.
*
* Intel Open Source License
*
* Copyright (c) 2002 Intel Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* Neither the name of the Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
*/
configuration SysTimeC {
provides interface StdControl;
provides interface SysTime64;
}
implementation
{
components PXA27XSysTimeM,PXA27XInterruptM;
SysTime64 = PXA27XSysTimeM;
StdControl = PXA27XSysTimeM;
PXA27XSysTimeM.OSTIrq1 -> PXA27XInterruptM.PXA27XIrq[IID_OST_1];
PXA27XSysTimeM.OSTIrq2 -> PXA27XInterruptM.PXA27XIrq[IID_OST_2];
}
--- NEW FILE: TimerM.nc ---
// $Id: TimerM.nc,v 1.1 2006/10/10 02:14:35 lnachman Exp $
/* tab:4
* "Copyright (c) 2000-2003 The Regents of the University of California.
* All rights reserved.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation for any purpose, without fee, and without written agreement is
* hereby granted, provided that the above copyright notice, the following
* two paragraphs and the author appear in all copies of this software.
*
* IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
* DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
* OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
* CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
* INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS
* ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
* PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
*
* Copyright (c) 2002-2003 Intel Corporation
* All rights reserved.
*
* This file is distributed under the terms in the attached INTEL-LICENSE
* file. If you do not find these files, copies can be found by writing to
* Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA,
* 94704. Attention: Intel License Inquiry.
*/
/*
*
* Authors: Joe Polastre <polastre at cs.berkeley.edu>
* Rob Szewczyk <szewczyk at cs.berkeley.edu>
* David Gay <dgay at intel-research.net>
* David Moore
*
* Heavily modified by Robbie Adler for PXA27X
Revision: $Id: TimerM.nc,v 1.1 2006/10/10 02:14:35 lnachman Exp $
*
*/
/**
* @author Su Ping <sping at intel-research.net>
*/
module TimerM {
provides interface Timer[uint8_t id];
provides interface StdControl;
uses {
interface Leds;
interface Clock;
interface PowerManagement;
}
}
implementation {
norace uint32_t mState; // each bit represent a timer state
norace uint32_t mCurrentInterval;
norace int8_t queue_head;
norace int8_t queue_tail;
norace uint8_t queue_size;
norace uint8_t queue[NUM_TIMERS];
uint16_t interval_outstanding;
norace struct timer_s {
uint8_t type; // one-short or repeat timer
int32_t ticks; // clock ticks for a repeat timer
int32_t ticksLeft; // ticks left before the timer expires
} mTimerList[NUM_TIMERS];
command result_t StdControl.init() {
atomic{
mState=0;
queue_head = queue_tail = -1;
queue_size = 0;
mCurrentInterval = 0;
}
return call Clock.setRate(0, 0);
}
command result_t StdControl.start() {
return SUCCESS;
}
command result_t StdControl.stop() {
atomic{
mState=0;
mCurrentInterval = 0;
}
return SUCCESS;
}
command result_t Timer.start[uint8_t id](char type,
uint32_t interval) {
uint32_t countRemaining, currentCount;
if (id >= NUM_TIMERS){
return FAIL;
}
if (type > TIMER_ONE_SHOT){
return FAIL;
}
// if ((type == TIMER_REPEAT) && interval <= 2) return FAIL;
atomic {
//interrupts are disabled here. This means that it is possible for us
//to read a counter value that is equal to its match value. If this
//is the case, it simply means that we beat the interrupt to the atomic
//section.
mTimerList[id].ticks = interval;
mTimerList[id].ticksLeft = interval;
mTimerList[id].type = type;
//get the current counter value
currentCount = call Clock.readCounter();
//this is how much is left
countRemaining = mCurrentInterval - currentCount;
//enable this timer
mState|=(0x1L<<id);
// there are 3 cases to consider:
//1: no timer is started...start one
//2: new timer is longer than the existing one....enqueue it
//3: new timer is shorter or equal to the existing one:
// if(interval < mCurrentInterval)
// what we need will happen before the current interval expires
// if(mCurrentInterval-interval == mCurrrentInterval - originterval - diff == mCurrentInterval -interval -mcurrentInterval + currentcount == currentcount - interval
// we're about to expire...t
//
if(mCurrentInterval == 0){
//we currently don't have a timer running
//this is how much is left on our current interval
mCurrentInterval=interval;
call Clock.setInterval(interval);
}
else{
//we have a timer actively running
if( interval < countRemaining){
if(((countRemaining - interval) > 1 ) ){
//enough time remains for us to change the interval
//let timer expired detection routing deal with negative arguments
mCurrentInterval = interval + currentCount;
call Clock.setInterval(mCurrentInterval);
}
else{
//we're too close in time, but we won't miss this timer since, if a timer is running, it's interval must
//have been at least 1. Thus, we'll fire off this timer the next time we interrupt
}
}
else{
//what's left is greater than what we need..add in what's already elapsed so that we're more accurate
mTimerList[id].ticksLeft += currentCount;
}
}
}
return SUCCESS;
}
command result_t Timer.stop[uint8_t id]() {
result_t ret = FAIL;
if (id>=NUM_TIMERS) return FAIL;
atomic{
if(mState&(0x1L<<id)) { // if the timer is running
mState &= ~(0x1L<<id);
ret = SUCCESS;
}
}
return ret; //timer not running
}
default event result_t Timer.fired[uint8_t id]() {
return SUCCESS;
}
void enqueue(uint8_t value) {
if (queue_tail == NUM_TIMERS - 1)
queue_tail = -1;
queue_tail++;
queue_size++;
queue[(uint8_t)queue_tail] = value;
}
uint8_t dequeue() {
uint8_t ret;
atomic{
if (queue_size == 0){
ret = NUM_TIMERS;
}
else if (queue_head == NUM_TIMERS - 1)
queue_head = -1;
queue_head++;
queue_size--;
ret = queue[(uint8_t)queue_head];
}
return ret;
}
task void signalOneTimer() {
uint8_t itimer = dequeue();
if (itimer < NUM_TIMERS)
signal Timer.fired[itimer]();
}
async event result_t Clock.fire() {
// no need for atomicc statements due to arm ISA guarantees
uint32_t newInterval = ~((uint32_t) 0);
uint32_t i;
if (mState) {
for (i=0;i<NUM_TIMERS;i++) {
if (mState&(0x1L<<i)) {
mTimerList[i].ticksLeft -= mCurrentInterval;
if(mTimerList[i].ticksLeft < newInterval){
newInterval = mTimerList[i].ticksLeft;
}
if (mTimerList[i].ticksLeft<=0) {
/* DCM: only update the timer structure if the
* signalOneTimer() task was able to be posted. */
if (post signalOneTimer()) {
if (mTimerList[i].type==TIMER_REPEAT) {
mTimerList[i].ticksLeft = mTimerList[i].ticks;
} else {// one shot timer
mState &=~(0x1L<<i);
}
enqueue(i);
}
else {
trace(DBG_USR1,"FATAL ERROR: TimerM found Task queue full\r\n");
return FAIL;
}
}
}
}
}
if(newInterval != ~((uint32_t) 0)){
//found a new timer interval to set
mCurrentInterval = newInterval;
call Clock.setInterval(mCurrentInterval);
}
else{
mCurrentInterval = 0;
}
return SUCCESS;
}
}
--- NEW FILE: WallClock.nc ---
/* tab:4
* IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By
* downloading, copying, installing or using the software you agree to
* this license. If you do not agree to this license, do not download,
* install, copy or use the software.
*
* Intel Open Source License
*
* Copyright (c) 2002 Intel Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* Neither the name of the Intel Corporation nor the names of its
* contributors may be used to endorse or promote products derived from
* this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE INTEL OR ITS
* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
* PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
/*
* Authors: Lama Nachman
* This interface is used to set and get the wallclock counter on the imote2
* This is a 32bit, 1 second resolution counter.
*/
interface WallClock {
/*
* This commands sets the value of the counter to the passed 32 bit clock
*
* @param Clock in seconds
*
* @return SUCCESS/FAIL
*/
command result_t setWallClock(uint32_t Clock);
/*
* This commands sets the value of the counter to the passed 32 bit clock
*
* @return the 32bit counter value of the clock
*/
command uint32_t getWallClock();
}
--- NEW FILE: pxa27x_registers_def.h ---
/* tab:4
* IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING. By
* downloading, copying, installing or using the software you agree to
* this license. If you do not agree to this license, do not download,
* install, copy or use the software.
*
* Intel Open Source License
*
* Copyright (c) 2006 Intel Corporation
* All rights reserved.
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are
* met:
*
* Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
[...1582 lines suppressed...]
#define CISR_FEMPTY_0 (1 << 9)
#define CISR_EOL (1 << 8)
#define CISR_PAR_ERR (1 << 7)
#define CISR_CQD (1 << 6)
#define CISR_CDD (1 << 5)
#define CISR_SOF (1 << 4)
#define CISR_EOF (1 << 3)
#define CISR_IFO_2 (1 << 2)
#define CISR_IFO_1 (1 << 1)
#define CISR_IFO_0 (1 << 0)
/*
* FIFO Control Register
*/
#define CIFR_FLVL0(data,x) ((data & ~(0xff << 8)) | (x << 8))
#define CIFR_THL_0(data,x) ((data & ~(0x3 << 4)) | (x << 4))
#define CIFR_RESETF (1 << 3)
#endif /* _PXA27X_REGISTERS_DEF_H */
- Previous message: [Tinyos-beta-commits] CVS: tinyos-1.x/beta/platform/imote2
BluSHC.nc, 1.4, 1.5 BluSHM.nc, 1.8, 1.9 BulkTxRx.nc, 1.2,
1.3 FlashM.nc, 1.12, 1.13 HPLCC2420M.nc, 1.8,
1.9 HPLFFUARTC.nc, 1.1, 1.2 HPLFFUARTM.nc, 1.3,
1.4 HPLSTUARTC.nc, 1.1, 1.2 HPLSTUARTM.nc, 1.3,
1.4 HPLUSBClientGPIOM.nc, 1.4, 1.5 PMIC.nc, 1.2, 1.3 PMICC.nc,
1.1, 1.2 PMICM.nc, 1.3, 1.4 SSP.nc, 1.1, 1.2 SSP1C.nc, 1.2,
1.3 SSP1M.nc, 1.4, 1.5 SettingsC.nc, 1.2, 1.3 SettingsM.nc,
1.2, 1.3 TimerJiffyAsyncC.nc, 1.1, 1.2 hardware.h, 1.8,
1.9 pmic.h, 1.4, 1.5
- Next message: [Tinyos-beta-commits]
CVS: tinyos-1.x/beta/platform/pxa27x Flash.nc, 1.3,
1.4 HPLClock.nc, 1.1, 1.2 HPLInitM.nc, 1.3,
1.4 PXA27XClockM.nc, 1.2, 1.3 PXA27XDMAC.nc, 1.2,
1.3 PXA27XDMAChannel.nc, 1.3, 1.4 PXA27XDMAExtReq.nc, 1.1,
1.2 PXA27XDMAM.nc, 1.3, 1.4 PXA27XGPIOIntC.nc, 1.1,
1.2 PXA27XGPIOIntM.nc, 1.3, 1.4 PXA27XI2CM.nc, 1.2,
1.3 PXA27XInterruptM.nc, 1.4, 1.5 PXA27XPowerModes.h, 1.2,
1.3 PXA27XPowerModesM.nc, 1.2, 1.3 PXA27XUSBClientC.nc, 1.4,
1.5 PXA27XUSBClientM.nc, 1.10, 1.11 PXA27Xdynqueue.c, 1.4,
1.5 PXA27Xdynqueue.h, 1.2, 1.3 SimpleWDTM.nc, 1.1,
1.2 pxa27xhardware.h, 1.7, 1.8
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