[Tinyos-commits] CVS: tinyos-1.x/tos/platform/msp430 HALDMAM.nc, 1.3, 1.4 MSP430DMAM.nc, 1.4, 1.5

[Ben Greenstein]

Update of /cvsroot/tinyos/tinyos-1.x/tos/platform/msp430
In directory sc8-pr-cvs10.sourceforge.net:/tmp/cvs-serv8042

Modified Files:
	HALDMAM.nc MSP430DMAM.nc 
Log Message:
bug fix: can now support back-to-back transfers with different setup params
bug fix: boolean expression in stopTransfer corrected


Index: HALDMAM.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-1.x/tos/platform/msp430/HALDMAM.nc,v
retrieving revision 1.3
retrieving revision 1.4
diff -C2 -d -r1.3 -r1.4
*** HALDMAM.nc	26 Oct 2005 19:47:42 -0000	1.3
--- HALDMAM.nc	4 Sep 2006 18:08:43 -0000	1.4
***************
*** 153,157 ****
  
    async command result_t DMA.stopTransfer[uint8_t channel](){
!     if (gChannelState[channel].transferMode == DMA_BURST_BLOCK_TRANSFER &&
          gChannelState[channel].transferMode == DMA_REPEATED_BURST_BLOCK_TRANSFER){
        switch(channel){
--- 153,157 ----
  
    async command result_t DMA.stopTransfer[uint8_t channel](){
!     if (gChannelState[channel].transferMode == DMA_BURST_BLOCK_TRANSFER ||
          gChannelState[channel].transferMode == DMA_REPEATED_BURST_BLOCK_TRANSFER){
        switch(channel){

Index: MSP430DMAM.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-1.x/tos/platform/msp430/MSP430DMAM.nc,v
retrieving revision 1.4
retrieving revision 1.5
diff -C2 -d -r1.4 -r1.5
*** MSP430DMAM.nc	26 Oct 2005 19:47:42 -0000	1.4
--- MSP430DMAM.nc	4 Sep 2006 18:08:44 -0000	1.5
***************
*** 273,276 ****
--- 273,277 ----
      uint16_t dma0ctl = 0;
  
+     dmactl0 &= ~(DMATSEL_MASK << DMA0TSEL_SHIFT);
      dmactl0 |= ((s.trigger & DMATSEL_MASK) << DMA0TSEL_SHIFT);
      dma0ctl |= (s.request         ? DMAREQ     : 0);
***************
*** 467,470 ****
--- 468,472 ----
      uint16_t dma1ctl = 0;
  
+     dmactl0 &= ~(DMATSEL_MASK << DMA1TSEL_SHIFT);
      dmactl0 |= ((s.trigger & DMATSEL_MASK) << DMA1TSEL_SHIFT);
      dma1ctl |= (s.request         ? DMAREQ     : 0);
***************
*** 663,666 ****
--- 665,669 ----
      uint16_t dma2ctl = 0;
  
+     dmactl0 &= ~(DMATSEL_MASK << DMA2TSEL_SHIFT);
      dmactl0 |= ((s.trigger & DMATSEL_MASK) << DMA2TSEL_SHIFT);
      dma2ctl |= (s.request         ? DMAREQ     : 0);