From vlahan at users.sourceforge.net Thu Mar 13 07:55:50 2008 From: vlahan at users.sourceforge.net (Vlado Handziski) Date: Thu Mar 13 07:56:29 2008 Subject: [Tinyos-commits] CVS: tinyos-1.x/tos/platform/msp430 msp430hardware.h, 1.30, 1.31 Message-ID: Update of /cvsroot/tinyos/tinyos-1.x/tos/platform/msp430 In directory sc8-pr-cvs10.sourceforge.net:/tmp/cvs-serv937 Modified Files: msp430hardware.h Log Message: Modifications suggested in the patch from Steve Ayer on TinyOS Devel: - added a backward compatibility define for the missing __msp430_have_usart0_with_i2c switch that is superseeded by __MSP430_HAS_I2C__ in the newer mspgcc includes - modified the low-power checking routine in alignment with 2.x - removing tabs in indentation Index: msp430hardware.h =================================================================== RCS file: /cvsroot/tinyos/tinyos-1.x/tos/platform/msp430/msp430hardware.h,v retrieving revision 1.30 retrieving revision 1.31 diff -C2 -d -r1.30 -r1.31 *** msp430hardware.h 18 Aug 2005 02:54:39 -0000 1.30 --- msp430hardware.h 13 Mar 2008 14:55:47 -0000 1.31 *************** *** 43,46 **** --- 43,50 ---- #endif + // backwards compatibility to older versions of the header files + #ifdef __MSP430_HAS_I2C__ + #define __msp430_have_usart0_with_i2c + #endif // assign a default DEFAULT_BAUDRATE *************** *** 173,177 **** inline void TOSH_uwait(uint16_t u) ! { uint16_t i; if (u < 500) --- 177,181 ---- inline void TOSH_uwait(uint16_t u) ! { uint16_t i; if (u < 500) *************** *** 191,196 **** ::); } ! ! } void __nesc_disable_interrupt() --- 195,200 ---- ::); } ! ! } void __nesc_disable_interrupt() *************** *** 253,272 **** extern volatile uint8_t TOSH_sched_free; uint16_t LPMode_bits = 0; ! if (LPMode_disabled) { __nesc_enable_interrupt(); return; ! } else { LPMode_bits = LPM3_bits; // TimerA, USART0, USART1 check ! if ( ((((TACTL & MC_3) != MC_0) && (TACTL & TASSEL_3) == TASSEL_2)) ! || ((ME1 & (UTXE0 | URXE0)) && (U0TCTL & SSEL1)) ! || ((ME2 & (UTXE1 | URXE1)) && (U1TCTL & SSEL1)) #ifdef __msp430_have_usart0_with_i2c ! // registers end in "nr" to prevent nesC race condition detection ! || ((U0CTLnr & I2CEN) && (I2CTCTLnr & SSEL1) && ! (I2CDCTLnr & I2CBUSY) && (U0CTLnr & SYNC) && (U0CTLnr & I2C)) ! #endif ! ) LPMode_bits = LPM1_bits; #ifdef __msp430_have_adc12 --- 257,280 ---- extern volatile uint8_t TOSH_sched_free; uint16_t LPMode_bits = 0; ! if (LPMode_disabled) { __nesc_enable_interrupt(); return; ! } ! else { LPMode_bits = LPM3_bits; // TimerA, USART0, USART1 check ! if ( (((TACCTL0 & CCIE) || (TACCTL1 & CCIE) || (TACCTL2 & CCIE)) && ((TACTL & TASSEL_3) == TASSEL_2)) || ! ((ME1 & (UTXE0 | URXE0)) && (U0TCTL & SSEL1)) || ! ((ME2 & (UTXE1 | URXE1)) && (U1TCTL & SSEL1)) ! #ifdef __msp430_have_usart0_with_i2c ! // registers end in "nr" to prevent nesC race condition detection ! || ( (U0CTLnr & I2CEN) && (I2CTCTLnr & SSEL1) && ! (I2CDCTLnr & I2CBUSY) && (U0CTLnr & SYNC) && ! (U0CTLnr & I2C) ! ) ! #endif ! ) LPMode_bits = LPM1_bits; #ifdef __msp430_have_adc12 *************** *** 274,278 **** if (ADC12CTL1 & ADC12BUSY){ if (!(ADC12CTL0 & MSC) && ((TACTL & TASSEL_3) == TASSEL_2)) ! LPMode_bits = LPM1_bits; // TimerA for ADC12 else switch (ADC12CTL1 & ADC12SSEL_3){ --- 282,286 ---- if (ADC12CTL1 & ADC12BUSY){ if (!(ADC12CTL0 & MSC) && ((TACTL & TASSEL_3) == TASSEL_2)) ! LPMode_bits = LPM1_bits; // TimerA for ADC12 else switch (ADC12CTL1 & ADC12SSEL_3){