Fri Apr 7 05:50:00 PDT 2006

Update of /cvsroot/tinyos/tinyos-1.x/contrib/diku/mcs51/tos/platform/mcs51
In directory sc8-pr-cvs1.sourceforge.net:/tmp/cvs-serv20038/tos/platform/mcs51

Added Files:
	.platform 8051.h ADCM.nc Clock.h Clock.nc HPLADCC.nc 
	HPLADCM.nc HPLClock.nc HPLInit.nc HPLInterrupt.nc 
	HPLPowerManagementM.nc HPLUART.nc HPLUARTC.nc HPLUARTM.nc 
	LedsC.nc RealMain.nc TimerC.nc TimerM.nc hardware.h 
	mcs51hardware.h 
Log Message:
A first go at an mcs51 port

--- NEW FILE: .platform ---
@opts = ("-gcc=sdcc",
         "-mmcs51");
#	 "-fnesc-target=keil",
#	 "-fnesc-no-debug"

@opts = ("-fnesc-target=keil",
	 "-fnesc-no-debug");

#push @opts, "-mingw-gcc" if $cygwin;

#@commonplatforms = ("avrmote");

--- NEW FILE: 8051.h ---
/* Chip-specific deffinition, inspired by avr includes:
 sfr_defs.h
 iom128.h
*/
/*
 * Authors:	Martin Leopold, Sidsel Jensen & Anders Egeskov Petersen, 
 *		Dept of Computer Science, University of Copenhagen
 * Date last modified: Nov 2005
 */

// Turn global interrupt flag on/off. The asm definitions are commented
// out to allow it to pass through nescc and will be replaced by the
// mangle script
#define cli() /*_asm  cli  _endasm;*/
#define sei() _asm  sei  _endasm;

// Interrupt numbers according to 8051/8052
// __vector might be an AVR-thing

#define SIG_INTERRUPT0          __vector_0
#define SIG_TIMER0              __vector_1
#define SIG_INTERRUPT1          __vector_2
#define SIG_TIMER1              __vector_3
#define SIG_SERIAL              __vector_4
#define SIG_TIMER2              __vector_5
#define SIG_ADC                 __vector_8

// Special function register (SFR) definitions 
// Gcc definition:
//#define __SFR_OFFSET
//#define _SFR_IO8(io_addr) ((io_addr) + __SFR_OFFSET)
//#define SREG      _SFR_IO8(0x3F)

// The __attribute(()) will be removed by the mangle script and
// the content x will be used to construct:
// sfr at x ...
//
// Alternative to stay within ANSI-C one could imagine using a
// structure with bit fields say struct { int P0:1 }, however the
// silly architecture of the 8051 forces us to controll whether code
// using direct or indirect addressing is generated. I can't se how
// this could be done using ANSI-C
//
// The above scheme allows nescc to parse the code and sdcc to to
// generate the appropriate code.

//sfr at 0xA8 IE; // Interrupt enable

typedef int sfr;
sfr P0 __attribute((x80));
//sfr at 0x80 P0;

sfr SP __attribute((x81));
//sfr at 0x81 SP;

sfr DPL __attribute((x82));
//sfr at 0x82 DPL;

sfr DPH __attribute((x83));
//sfr at 0x83 DPH;

sfr DPL1 __attribute((x84));
//sfr at 0x84 DPL1;

sfr DPH1 __attribute((x85));
//sfr at 0x85 DPH1;

sfr DPS __attribute((x86));
//sfr at 0x86 DPS;

sfr PCON __attribute((x87));
//sfr at 0x87 PCON;

sfr TCON __attribute((x88));
//sfr at 0x88 TCON;

sfr TMOD __attribute((x89));
//sfr at 0x89 TMOD;

sfr TL0 __attribute((x8A));
//sfr at 0x8A TL0;

sfr TL1 __attribute((x8B));
//sfr at 0x8B TL1;

sfr TH0 __attribute((x8C));
//sfr at 0x8C TH0;

sfr TH1 __attribute((x8D));
//sfr at 0x8D TH1;

sfr CKCON __attribute((x8E));
//sfr at 0x8E CKCON;

sfr P1 __attribute((x90));
//sfr at 0x90 P1;

sfr EXIF __attribute((x91));
//sfr at 0x91 EXIF;

sfr MPAGE __attribute((x92));
//sfr at 0x92 MPAGE;

sfr SCON __attribute((x98));
//sfr at 0x98 SCON;

sfr SBUF __attribute((x99));
//sfr at 0x99 SBUF;

sfr IE __attribute((xA8));
//sfr at 0xA8 IE;

sfr IP __attribute((xB8));
//sfr at 0xB8 IP;

sfr T2CON __attribute((xC8));
//sfr at 0xC8 T2CON;

sfr RCAP2L __attribute((xCA)); 
//sfr at 0xCA RCAP2L;

sfr RCAP2H __attribute((xCB));
//sfr at 0xCB RCAP2H;

sfr TL2 __attribute((xCC));
//sfr at 0xCC TL2;

sfr TH2 __attribute((xCD));
//sfr at 0xCD TH2;

sfr PSW __attribute((xD0));
//sfr at 0xD0 PSW;

sfr EICON __attribute((xD8));
//sfr at 0xD8 EICON;

sfr ACC __attribute((xE0));
//sfr at 0xE0 ACC;

sfr B __attribute((xF0));
//sfr at 0xF0 B;

sfr EIE __attribute((xE8));
//sfr at 0xE8 EIE;

sfr EIP __attribute((xF8));
//sfr at 0xF8 EIP;

sfr P0_DIR __attribute((x94));
//sfr at 0x94 P0_DIR;

sfr P0_ALT __attribute((x95));
//sfr at 0x95 P0_ALT;

sfr P1_DIR __attribute((x96));
//sfr at 0x96 P1_DIR;

sfr P1_ALT __attribute((x97));
//sfr at 0x97 P1_ALT;

sfr RADIO __attribute((xA0));
//sfr at 0xA0 RADIO;

sfr ADCCON __attribute((xA1));
//sfr at 0xA1 ADCCON;

sfr ADCDATAH __attribute((xA2));
//sfr at 0xA2 ADCDATAH;

sfr ADCDATAL __attribute((xA3));
//sfr at 0xA3 ADCDATAL;

sfr ADCSTATIC __attribute((xA4));
//sfr at 0xA4 ADCSTATIC;

sfr PWMCON __attribute((xA9));
//sfr at 0xA9 PWMCON;

sfr PWMDUTY __attribute((xAA));
//sfr at 0xAA PWMDUTY;

sfr REGX_MSB __attribute((xAB));
//sfr at 0xAB REGX_MSB;

sfr REGX_LSB __attribute((xAC));
//sfr at 0xAC REGX_LSB;

sfr REGX_CTRL __attribute((xAD));
//sfr at 0xAD REGX_CTRL;

sfr RSTREAS __attribute((xB1));
//sfr at 0xB1 RSTREAS;

sfr SPI_DATA __attribute((xB2));
//sfr at 0xB2 SPI_DATA;

sfr SPI_CTRL __attribute((xB3));
//sfr at 0xB3 SPI_CTRL;

sfr SPICLK __attribute((xB4));
//sfr at 0xB4 SPICLK;

sfr TICK_DV __attribute((xB5));
//sfr at 0xB5 TICK_DV;

sfr CK_CTRL __attribute((xB6));
//sfr at 0xB6 CK_CTRL;

/*  BIT Registers  */

/*  PSW */
typedef int sbit;

sbit CY __attribute((xD7));
//sbit at PSW^7 CY;

sbit AC __attribute((xD6));
//sbit at PSW^6 AC;

sbit F0 __attribute((xD5));
//sbit at PSW^5 F0;

sbit RS1 __attribute((xD4));
//sbit at PSW^4 RS1;

sbit RS0 __attribute((xD3));
//sbit at PSW^3 RS0;

sbit OV __attribute((xD2));
//sbit at PSW^2 OV;

sbit F1 __attribute((xD1));
//sbit at PSW^1 F1;

sbit P __attribute((xD0));
//sbit at PSW^0 P;

/*  TCON  */

sbit TF1 __attribute((x8F));
//sbit at TCON^7 TF1;

sbit TR1 __attribute((x8E));
//sbit at TCON^6 TR1;

sbit TF0 __attribute((x8D));
//sbit at TCON^5 TF0;

sbit TR0 __attribute((x8C));
//sbit at TCON^4 TR0;

sbit IE1 __attribute((x8B));
//sbit at TCON^3 IE1;

sbit IT1 __attribute((x8A));
//sbit at TCON^2 IT1;

sbit IE0 __attribute((x89));
//sbit at TCON^1 IE0;

sbit IT0 __attribute((x88));
//sbit at TCON^0 IT0;

/*  IE  */ 

sbit EA __attribute((xAF));
//sbit at IE^7 EA;

sbit ET2 __attribute((xAD));
//sbit at IE^5 ET2;

sbit ES __attribute((xAC));
//sbit at IE^4 ES;

sbit ET1 __attribute((xAB));
//sbit at IE^3 ET1;

sbit EX1 __attribute((xAA));
//sbit at IE^2 EX1;

sbit ET0 __attribute((xA9));
//sbit at IE^1 ET0;

sbit EX0 __attribute((xA8));
//sbit at IE^0 EX0;

/*  IP  */

sbit PT2 __attribute((xBD));
//sbit at IP^5 PT2;

sbit PS __attribute((xBC));
//sbit at IP^4 PS;

sbit PT1 __attribute((xBB));
//sbit at IP^3 PT1;

sbit PX1 __attribute((xBA));
//sbit at IP^2 PX1;

sbit PT0 __attribute((xB9));
//sbit at IP^1 PT0;

sbit PX0 __attribute((xB8));
//sbit at IP^0 PX0;

/*  P0  */

sbit T1 __attribute((x86));
//sbit at P0^6 T1;

sbit T0 __attribute((x85));
//sbit at P0^5 T0;

sbit INT1 __attribute((x84));
//sbit at P0^4 INT1;

sbit INT0 __attribute((x83));
//sbit at P0^3 INT0;

/*  P1  */

sbit T2 __attribute((x90));
//sbit at P1^0 T2;

/*  SCON  */

sbit SM0 __attribute((x9F));
//sbit at SCON^7 SM0;

sbit SM1 __attribute((x9E));
//sbit at SCON^6 SM1;

sbit SM2 __attribute((x9D));
//sbit at SCON^5 SM2;

sbit REN __attribute((x9C));
//sbit at SCON^4 REN;

sbit TB8 __attribute((x9B));
//sbit at SCON^3 TB8;

sbit RB8 __attribute((x9A));
//sbit at SCON^2 RB8;

sbit TI __attribute((x99));
//sbit at SCON^1 TI;

sbit RI __attribute((x98));
//sbit at SCON^0 RI;

/*  T2CON  */

sbit TF2 __attribute((xCF));
//sbit at T2CON^7 TF2;

sbit EXF2 __attribute((xCE));
//sbit at T2CON^6 EXF2;

sbit RCLK __attribute((xCD));
//sbit at T2CON^5 RCLK;

sbit TCLK __attribute((xCC));
//sbit at T2CON^4 TCLK;

sbit EXEN2 __attribute((xCB));
//sbit at T2CON^3 EXEN2;

sbit TR2 __attribute((xCA));
//sbit at T2CON^2 TR2;

sbit C_T2 __attribute((xC9));
//sbit at T2CON^1 C_T2;

sbit CP_RL2 __attribute((xC8));
//sbit at T2CON^0 CP_RL2;

/*  EICON  */

sbit SMOD1 __attribute((xDF));
//sbit at EICON^7 SMOD1;

sbit WDTI __attribute((xDB));
//sbit at EICON^3 WDTI;

/*  EIE  */

sbit EWDI __attribute((xEC));
//sbit at EIE^4 EWDI;

sbit EX5 __attribute((xEB));
//sbit at EIE^3 EX5;

sbit EX4 __attribute((xEA));
//sbit at EIE^2 EX4;

sbit EX3 __attribute((xE9));
//sbit at EIE^1 EX3;

sbit EX2 __attribute((xE8));
//sbit at EIE^0 EX2;

/*  EIP  */

sbit PWDI __attribute((xFC));
//sbit at EIP^4 PWDI;

sbit PX5 __attribute((xFB));
//sbit at EIP^3 PX5;

sbit PX4 __attribute((xFA));
//sbit at EIP^2 PX4;

sbit PX3 __attribute((xF9));
//sbit at EIP^1 PX3;

sbit PX2 __attribute((xF8));
//sbit at EIP^0 PX2;

/* RADIO */

sbit PWR_UP __attribute((xA7));
//sbit at RADIO^7 PWR_UP;

sbit DR2 __attribute((xA6));
//sbit at RADIO^6 DR2;

sbit CE __attribute((xA6));
//sbit at RADIO^6 CE;

sbit CLK2 __attribute((xA5));
//sbit at RADIO^5 CLK2;

sbit DOUT2 __attribute((xA4));
//sbit at RADIO^4 DOUT2;

sbit CS __attribute((xA3));
//sbit at RADIO^3 CS;

sbit DR1 __attribute((xA2));
//sbit at RADIO^2 DR1;

sbit CLK1 __attribute((xA1));
//sbit at RADIO^1 CLK1;

sbit DATA __attribute((xA0));
//sbit at RADIO^0 DATA;

#pragma WARN replace

--- NEW FILE: ADCM.nc ---
// $Id: ADCM.nc,v 1.1 2006/04/07 12:49:54 mleopold Exp $

/*									tab:4
 * "Copyright (c) 2000-2003 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
 * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
 *
 * Copyright (c) 2002-2003 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/*
 *
 * Authors:		Jason Hill, David Gay, Philip Levis, Phil Buonadonna
 *
 * Ported to 8051 by Sidsel Jensen & Anders Egeskov Petersen, 
 *                   Dept of Computer Science, University of Copenhagen
 * Date last modified:  Nov 2005
 *
 */

/*  OS component abstraction of the analog to digital converter
 *  It provides an asynchronous interface that schedules access to 
 *  separate virtual ADC ports in a round-robin fashion.
 */

/**
 * @author Jason Hill
 * @author David Gay
 * @author Philip Levis
 * @author Phil Buonadonna
 * @author Sidsel Jensen
 * @author Anders Egeskov Petersen
 */

includes hardware;

module ADCM {
  provides {
    interface ADC[uint8_t port];
    interface ADCControl;
  }
  uses interface HPLADC;
}

implementation {

  enum {
    IDLE = 0,
    SINGLE_CONVERSION = 1,
    CONTINUOUS_CONVERSION = 2,
  };

  uint16_t ReqPort;
  uint16_t ReqVector;
  uint16_t ContReqMask;

  command result_t ADCControl.init() {
    atomic {
      ReqPort = 0;
      ReqVector = ContReqMask = 0;
    }
    dbg(DBG_BOOT, ("ADC initialized.\n"));

    return call HPLADC.init();
  }

  command result_t ADCControl.setSamplingRate(uint8_t rate) {
    return call HPLADC.setSamplingRate(rate);
  }

  command result_t ADCControl.bindPort(uint8_t port, uint8_t adcPort) {
    return call HPLADC.bindPort(port, adcPort);
  }

  default async event result_t ADC.dataReady[uint8_t port](uint16_t input) {
    return FAIL; // ensures ADC is disabled if no handler
  }

  async event result_t HPLADC.dataReady(uint16_t input) {
    uint16_t doneValue = input;
    uint8_t donePort;
    result_t Result;

    atomic { 
      donePort = ReqPort;
      // Check to see if this port has requested continous conversion
      if (((1<<donePort) & ContReqMask) == 0) {
        call HPLADC.sampleStop();
        ReqVector &= ~(1<<donePort); 
      }

      if (ReqVector) {
        do {
          ReqPort++;
          ReqPort = (ReqPort == TOSH_ADC_PORTMAPSIZE)? 0 : ReqPort;
        } while (((1<<ReqPort) & ReqVector) == 0);
        call HPLADC.samplePort(ReqPort);
      }
    }

    dbg(DBG_ADC, "adc_tick: port %d with value %i \n", donePort, (int)input);
    Result = signal ADC.dataReady[donePort](doneValue);

    atomic {
      if ((Result == FAIL) && (ContReqMask & (1<<donePort))) {
	call HPLADC.sampleStop();
	ContReqMask &= ~(1<<donePort);
      }
    }

    return SUCCESS;
  }

  inline result_t startGet(uint8_t newState, uint8_t port) {
    uint16_t PortMask, oldReqVector;
    result_t Result = SUCCESS;

    if (port > TOSH_ADC_PORTMAPSIZE) {
      return FAIL;
    }

    PortMask = (1<<port);
    // BEGIN atomic
    atomic {
      if ((PortMask & ReqVector) != 0) {
	// Already a pending request
	Result = FAIL;
      }
      else {
	oldReqVector = ReqVector;
	ReqVector |= PortMask;
	if (newState == CONTINUOUS_CONVERSION) {
	  ContReqMask |= PortMask;
	}
	if (oldReqVector == 0) {
	  // ADC was idle.  Initiate a port sample
	  ReqPort = port;
	  Result = call HPLADC.samplePort(port);
	}
      }
    }
    // END atomic

    return Result;
  }

  async command result_t ADC.getData[uint8_t port]() {
    return startGet(SINGLE_CONVERSION, port);
  }

  async command result_t ADC.getContinuousData[uint8_t port]() {
    return startGet(CONTINUOUS_CONVERSION, port);
  }
}

--- NEW FILE: Clock.h ---
// $Id: Clock.h,v 1.1 2006/04/07 12:49:54 mleopold Exp $

/*									tab:4
 * "Copyright (c) 2000-2003 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
 * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
 *
 * Copyright (c) 2002-2003 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */

/*
 * Authors: Sidsel Jensen & Anders Egeskov Petersen, 
 *          Dept of Computer Science, University of Copenhagen
 * Date last modified: Nov 2005
 *
 */

enum {
  DEFAULT_INTERVAL = 52202U, 

  DEFAULT_SCALE = 12,

  TICKS_PER_MILIS = 1334U	// ClockTicks per millisecond
};

--- NEW FILE: Clock.nc ---
// $Id: Clock.nc,v 1.1 2006/04/07 12:49:54 mleopold Exp $

/*									tab:4
 * "Copyright (c) 2000-2003 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
 * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
 *
 * Copyright (c) 2002-2003 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/*
 * Authors:		Jason Hill, David Gay, Philip Levis, Nelson Lee
 *
 * Ported to 8051 by Sidsel Jensen & Anders Egeskov Petersen, 
 *                   Dept of Computer Science, University of Copenhagen
 * Date last modified: Aug 2005
 */
/**
 * The hardware clock interface. 
 * @author Jason Hill
 * @author David Gay
 * @author Philip Levis
 * @author Nelson Lee
 * @author Sidsel Jensen
 * @author Anders Egeskov Petersen
 **/
includes Clock;

interface Clock {

  /**
   * Set the clock rate. For the specific meanings of interval
   * and scale, refer to the processor data sheet. For the nRF24E1:
   * <p>
   * <pre>
   *     Clock scale
   *         4 - 4000000 ticks/second
   *        12 - 1333333 ticks/second
   * </pre>
   * <p>
   *
   * Interval is how many ticks per clock firing.
   * For example, setRate(61536,4) will result in an event every 61536/4000000
   * seconds. Which is every millisecond.
   **/
  async command result_t setRate(uint16_t interval, char scale);

  /**
   *  Set clock interval 
   * 
   *  @param value New clock interval
   *
   *  @return none
   **/
  async command void setInterval(uint16_t value);

  /**
   *  Set clock interval at next clock interrupt time
   * 
   *  @param value New clock interval
   *
   *  @return none
   **/
  async command void setNextInterval(uint16_t value);

  /**
   *  Get clock interval 
   * 
   *  @return current clock interval
   **/
  async command uint16_t getInterval();

  /**
   *  Get clock scale 
   * 
   *  @return current clock scale level
   **/  
  async command uint8_t getScale();

  /**
   *  Set clock scale at next clock interrupt time 
   * 
   *  @param scale New clock scale
   *
   *  @return none
   **/
  async command void setNextScale(uint8_t scale);

  /**
   *  Set both clock interval and scale
   * 
   *  @param interval New clock interval
   *
   *  @param scale New clock scale
   *
   *  @return SUCCESS or FAILED 
   **/
  async command result_t setIntervalAndScale(uint16_t interval, uint8_t scale);

  /**
   *  Read HW clock counter
   */
  async command uint16_t readCounter();

  /**
   *  Set HW clock counter to a specified value
   *
   *  @param n Value to write to TCNT0
   *
   *  @return None
   */
  async command void setCounter(uint16_t n);

  /**
   *  Disable Clock interrupt
   */
  async command void intDisable();

  /**
   *  Enable Clock interrupt
   */
  async command void intEnable() ;

  /**
   *  An event sent when the clock goes off.
   **/
  async event result_t fire();
}

--- NEW FILE: HPLADCC.nc ---
/*
 * Authors: Sidsel Jensen & Anders Egeskov Petersen, 
 *          Dept of Computer Science, University of Copenhagen
 * Date last modified: Nov 2005
 *
 */

configuration HPLADCC
{
  provides interface HPLADC;
}
implementation
{
  components HPLADCM;

  HPLADC = HPLADCM;
}

--- NEW FILE: HPLADCM.nc ---
/*									tab:4
 *
 *
 * "Copyright (c) 2000-2002 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
 * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
 *
 */
/*									tab:4
 *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
 *  downloading, copying, installing or using the software you agree to
 *  this license.  If you do not agree to this license, do not download,
 *  install, copy or use the software.
 *
 *  Intel Open Source License 
 *
 *  Copyright (c) 2002 Intel Corporation 
 *  All rights reserved. 
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions are
 *  met:
 * 
 *	Redistributions of source code must retain the above copyright
 *  notice, this list of conditions and the following disclaimer.
 *	Redistributions in binary form must reproduce the above copyright
 *  notice, this list of conditions and the following disclaimer in the
 *  documentation and/or other materials provided with the distribution.
 *      Neither the name of the Intel Corporation nor the names of its
 *  contributors may be used to endorse or promote products derived from
 *  this software without specific prior written permission.
 *  
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
 *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
 *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
 *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
 *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
 *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * 
 */
/*
 *
 * Authors:		Jason Hill, David Gay, Philip Levis
 *
 * Ported to 8051 by:	Sidsel Jensen & Anders Egeskov Petersen, 
 * 			Dept of Computer Science, University of Copenhagen
 * Date last modified: Nov 2005
 *
 */

// The hardware presentation layer. See hpl.h for the C side.
// Note: there's a separate C side (hpl.h) to get access to the avr macros

// The model is that HPL is stateless. If the desired interface is as stateless
// it can be implemented here (Clock, FlashBitSPI). Otherwise you should
// create a separate component

module HPLADCM {
  provides interface HPLADC;
}
implementation
{
  /* The port mapping table */

  uint8_t TOSH_adc_portmap[TOSH_ADC_PORTMAPSIZE];

  async command result_t HPLADC.init() {
    uint8_t i;

  /* The default ADC port mapping */
    atomic { 
      for (i = 0; i < TOSH_ADC_PORTMAPSIZE; i++)
        TOSH_adc_portmap[i] = i;

      ADCCON = 0x20;			// NPD=1, ADCRUN=0, EXTREF=0
      ADCSTATIC &= 0x1E;		// CLK/32
      ADCSTATIC |= 0x02;		// 10bit
      ADCCON &= ~0x80;			// Start..
      ADCCON |= 0x80;			//         ..new conversion

      EIE |= 0x1;			// Enable ADC_EOC interrupt
    }    
    return SUCCESS;
  }

  async command result_t HPLADC.setSamplingRate(uint8_t rate) {
    return SUCCESS;
  }

  async command result_t HPLADC.bindPort(uint8_t port, uint8_t adcPort) {
    if (port < TOSH_ADC_PORTMAPSIZE) {
      TOSH_adc_portmap[port] = adcPort;
      return SUCCESS;
    } else
      return FAIL;
  }

  async command result_t HPLADC.samplePort(uint8_t port) {
    ADCCON &= 0xF0;			// Select port
    ADCCON |= TOSH_adc_portmap[port];

    ADCCON &= ~0x80;		// Start..
    ADCCON |= 0x80;		//         ..new conversion

    return SUCCESS;
  }

  async command result_t HPLADC.sampleAgain() {
    ADCCON &= ~0x80;		// Start..
    ADCCON |= 0x80;		//         ..new conversion
    return SUCCESS;
  }

  async command result_t HPLADC.sampleStop() {
    return SUCCESS;
  }

  default async event result_t HPLADC.dataReady(uint16_t done) { return SUCCESS; }

  TOSH_INTERRUPT(SIG_ADC) {
    uint16_t tmp;

    EXIF &= ~0x10;		// Clear ADC completion bit
    atomic{
      tmp = ADCDATAH;		// Read ADC data
      tmp = tmp<<8;
      tmp += ADCDATAL;
    }

    signal HPLADC.dataReady(tmp);
  }
}

--- NEW FILE: HPLClock.nc ---
// $Id: HPLClock.nc,v 1.1 2006/04/07 12:49:54 mleopold Exp $

/*									tab:4
 * "Copyright (c) 2000-2003 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
 * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
 *
 * Copyright (c) 2002-2003 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/*
 * Authors:		Jason Hill, David Gay, Philip Levis
 *
 * Ported to 8051 by Sidsel Jensen & Anders Egeskov Petersen, 
 *                   Dept of Computer Science, University of Copenhagen
 * Date last modified:  Dec 2005
 */

// The 8051-specific parts of the hardware presentation layer.

module HPLClock {
  provides interface Clock;
  provides interface StdControl;
}

implementation {
  uint8_t set_flag;
  uint8_t mscale, nextScale;
  uint16_t minterval;

  command result_t StdControl.init() {
    atomic {
      mscale = DEFAULT_SCALE; 
      minterval = DEFAULT_INTERVAL;
    }
    return SUCCESS;
  }

  command result_t StdControl.start() {
    uint8_t ms;
    uint16_t mi;
    atomic {
      mi = minterval;
      ms = mscale;
    }      
    call Clock.setRate(mi, ms);
    TR2 = 1;
    return SUCCESS;
  }

  command result_t StdControl.stop() {
    uint16_t mi;
    atomic {
      mi = minterval;
    }
    call Clock.setRate(mi, 4);
    return SUCCESS;
  }

  async command void Clock.setInterval(uint16_t value) {
    uint16_t reload = 0;
    atomic{
      reload = (2^16) - value;	// Set Interval
      RCAP2L = (uint8_t) reload;
      RCAP2H = (uint8_t) (reload>>8);
    }
  } 

  async command void Clock.setNextInterval(uint16_t value) {
    atomic {
      minterval = value;
      set_flag = 1;
    }
  }

  async command uint16_t Clock.getInterval() {
    uint16_t res;
    res = TL2;
    res |= ((uint16_t)TH2)<<8;
    res = (2^16) - res; 

    return res;
  }

  async command uint8_t Clock.getScale() {
    uint8_t ms;
    atomic {
      ms = mscale;
    }
    return ms;
  }

  async command void Clock.setNextScale(uint8_t scale) {
    atomic {
      nextScale = scale;
      set_flag = 1;
    }
  }       

  async command result_t Clock.setIntervalAndScale(uint16_t interval, uint8_t scale) {

// This method is not implemented!

    return FAIL;
  }

  async command uint16_t Clock.readCounter() {
    uint16_t res;
    res = TL2;
    res |= ((uint16_t)TH2)<<8;
    return res;
  }

  async command void Clock.setCounter(uint16_t n) {
    TL2 = (uint8_t)n;
    TH2 = (uint8_t)(n>>8);
  }

  async command void Clock.intDisable() {
    ET2 = 0;
  }

  async command void Clock.intEnable() {
    ET2 = 1;
  }

  async command result_t Clock.setRate(uint16_t interval, char scale) {
    uint16_t reload = 0;
    if(!(scale==4 || scale==12)) return FAIL;
    atomic {
      minterval = interval;
      T2CON &= 0xF0;	// Timer; Reload

      ET2 = 0;		// Disable Interrupts

      if(scale == 4) 	// Set PreScale
        CKCON |= 0x20;	// T2M = 1
      else 
        CKCON &= ~0x20;	// T2M = 0

      reload = (2^16) - minterval;	// Set Interval
      RCAP2L = (uint8_t) reload;
      RCAP2H = (uint8_t) (reload>>8);

      T2 = reload;

      ET2 = 1;		// Enable Interrupts
    }
    return SUCCESS;
  }

#pragma save
#pragma nooverlay
  default async event result_t Clock.fire() { 
    return SUCCESS; 
  }
#pragma restore

  TOSH_INTERRUPT(SIG_TIMER2) {
    uint16_t reload;
    atomic {
      if (set_flag) {
        mscale = nextScale;
        if(mscale == 4)		// Set PreScale
          CKCON |= 0x20;	// T2M = 1
        else 
          CKCON &= ~0x20;	// T2M = 0

        reload = (2^16) - minterval;	// Set Interval
        RCAP2L = (uint8_t) reload;
        RCAP2H = (uint8_t) (reload>>8);

        set_flag=0;
      }
      TF2 = 0;
    }
    signal Clock.fire();
  }
}

--- NEW FILE: HPLInit.nc ---
// $Id: HPLInit.nc,v 1.1 2006/04/07 12:49:54 mleopold Exp $

/*									tab:4
 * "Copyright (c) 2000-2003 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
 * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
 *
 * Copyright (c) 2002-2003 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/*
 *
 * Authors:		Jason Hill, David Gay, Philip Levis
 *
 * Ported to 8051 by:	Martin Leopold, Sidsel Jensen & Anders Egeskov Petersen, 
 * 			Dept of Computer Science, University of Copenhagen
 * Date last modified: Apr 2005
 *
 */

// The hardware presentation layer. See hpl.h for the C side.
// Note: there's a separate C side (hpl.h) to get access to the avr macros

// The model is that HPL is stateless. If the desired interface is as stateless
// it can be implemented here (Clock, FlashBitSPI). Otherwise you should
// create a separate component

/**
 * @author Jason Hill
 * @author David Gay
 * @author Philip Levis
 */
module HPLInit {
  provides command result_t init();
}
implementation
{
  // Basic hardware init.
  command result_t init() {
    TOSH_SET_PIN_DIRECTIONS();
    return SUCCESS;
  }
}

--- NEW FILE: HPLInterrupt.nc ---
/*									tab:4
 *
 *
 * "Copyright (c) 2000-2002 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
 * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
 *
 */
/*									tab:4
 *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
 *  downloading, copying, installing or using the software you agree to
 *  this license.  If you do not agree to this license, do not download,
 *  install, copy or use the software.
 *
 *  Intel Open Source License 
 *
 *  Copyright (c) 2002 Intel Corporation 
 *  All rights reserved. 
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions are
 *  met:
 * 
 *	Redistributions of source code must retain the above copyright
 *  notice, this list of conditions and the following disclaimer.
 *	Redistributions in binary form must reproduce the above copyright
 *  notice, this list of conditions and the following disclaimer in the
 *  documentation and/or other materials provided with the distribution.
 *      Neither the name of the Intel Corporation nor the names of its
 *  contributors may be used to endorse or promote products derived from
 *  this software without specific prior written permission.
 *  
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
 *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
 *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
 *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
 *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
 *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * 
 */
/*
 *
 * Authors:		Jason Hill, David Gay, Philip Levis
 * 
 * Ported to 8051 by:	Martin Leopold, Sidsel Jensen & Anders Egeskov Petersen, 
 * 			Dept of Computer Science, University of Copenhagen
 * Date last modified: Oct 2005
 *
 */

// The hardware presentation layer. See hpl.h for the C side.
// Note: there's a separate C side (hpl.h) to get access to the avr macros

// The model is that HPL is stateless. If the desired interface is as stateless
// it can be implemented here (Clock, FlashBitSPI). Otherwise you should
// create a separate component

module HPLInterrupt {
  provides interface Interrupt;
}
implementation {

  async command result_t Interrupt.enable() {
    EA = 1;
    return SUCCESS;
  }

  async command bool Interrupt.disable() {
    bool result = (EA != 0);
    EA = 0;
    return result;
  }

  void TOSH_interrupt_enable() __attribute__((C)) {
    call Interrupt.enable();
  }

  bool TOSH_interrupt_disable() __attribute__((C)) {
    return call Interrupt.disable();
  }
}

--- NEW FILE: HPLPowerManagementM.nc ---
/*
  Dummy PowerManagement module. I have no idea what this is supposed
  to do...

  Copyright (C) 2003 Mads Bondo Dydensborg <madsdyd at diku.dk>

  This program is free software; you can redistribute it and/or modify
  it under the terms of the GNU General Public License as published by
  the Free Software Foundation; either version 2 of the License, or
  (at your option) any later version.

  This program is distributed in the hope that it will be useful,
  but WITHOUT ANY WARRANTY; without even the implied warranty of
  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  GNU General Public License for more details.

  You should have received a copy of the GNU General Public License
  along with this program; if not, write to the Free Software
  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
*/

module HPLPowerManagementM {
  provides {
    interface PowerManagement;
  }
}

implementation {
  async command uint8_t PowerManagement.adjustPower() {
    return 0;
  }

async command result_t PowerManagement.enable() {
  return SUCCESS;
}

async command result_t PowerManagement.disable() {
  return SUCCESS;
}

}

--- NEW FILE: HPLUART.nc ---
// $Id: HPLUART.nc,v 1.1 2006/04/07 12:49:54 mleopold Exp $

/*									tab:4
 * "Copyright (c) 2000-2003 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
 * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
 *
 * Copyright (c) 2002-2003 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/*
 * Authors:		Jason Hill, David Gay, Philip Levis
 * Date last modified:  6/25/02
 *
 *
 */

/**
 * The byte-level interface to the UART, which can send and receive
 * simultaneously.
 *
 * <p> This interface, as it directly abstracts hardware, follows the
 * hardware interface convention of not maintaining state. Therefore,
 * some conditions that could be understood by a higher layer to be
 * errors execute properly; for example, one can call
 * <code>txBit</code> when in receive mode. A higher level interface
 * must provide the checks for conditions such as this.
 *
 * @author Jason Hill
 * @author David Gay
 * @author Philip Levis
 */

interface HPLUART {

  /**
   * Initialize the UART.
   *
   * @return SUCCESS always.
   */

  async command result_t init();

  /**
   * Turn off the UART
   *
   * @return SUCCESS always
   */

  async command result_t stop();

  async command result_t setRate(int rate); 

  /**
   * Send one byte of data. There should only one outstanding send at
   * any time; one must wait for the <code>putDone</code> event before
   * calling <code>put</code> or <code>put2</code> again.
   *
   * @return SUCCESS always.
   */
  async command result_t put(uint8_t data);

  /**
   * Send more than one byte of data. ...
   */

  async command result_t put2(uint8_t *start, uint8_t *end);

  /**
   * A byte of data has been received.
   *
   * @return SUCCESS always.
   */

  async event result_t get(uint8_t data);

  /**
   * The previous call to <code>put</code> has completed; another byte
   * may now be sent.
   *
   * @return SUCCESS always.
   */
  async event result_t putDone();
}

--- NEW FILE: HPLUARTC.nc ---
/*									tab:4
 *
 *
 * "Copyright (c) 2000-2002 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
 * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
 *
 */
/*									tab:4
 *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
 *  downloading, copying, installing or using the software you agree to
 *  this license.  If you do not agree to this license, do not download,
 *  install, copy or use the software.
 *
 *  Intel Open Source License 
 *
 *  Copyright (c) 2002 Intel Corporation 
 *  All rights reserved. 
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions are
 *  met:
 * 
 *	Redistributions of source code must retain the above copyright
 *  notice, this list of conditions and the following disclaimer.
 *	Redistributions in binary form must reproduce the above copyright
 *  notice, this list of conditions and the following disclaimer in the
 *  documentation and/or other materials provided with the distribution.
 *      Neither the name of the Intel Corporation nor the names of its
 *  contributors may be used to endorse or promote products derived from
 *  this software without specific prior written permission.
 *  
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
 *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
 *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
 *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
 *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
 *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * 
 */
/*
 *
 * Authors:		Jason Hill, David Gay, Philip Levis
 * 
 * Ported to 8051 by:	Sidsel Jensen & Anders Egeskov Petersen, 
 * 			Dept of Computer Science, University of Copenhagen
 * Date last modified:	Oct 2005
 *
 */

// The hardware presentation layer. See hpl.h for the C side.
// Note: there's a separate C side (hpl.h) to get access to the avr macros

// The model is that HPL is stateless. If the desired interface is as stateless
// it can be implemented here (Clock, FlashBitSPI). Otherwise you should
// create a separate component

configuration HPLUARTC {
  provides interface HPLUART as UART;
}
implementation {

  components HPLUARTM, HPLInterrupt;

  UART = HPLUARTM;
  HPLUARTM.Interrupt -> HPLInterrupt;
}

--- NEW FILE: HPLUARTM.nc ---
/*									tab:4
 *
 *
 * "Copyright (c) 2000-2002 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
 * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
 *
 */
/*									tab:4
 *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
 *  downloading, copying, installing or using the software you agree to
 *  this license.  If you do not agree to this license, do not download,
 *  install, copy or use the software.
 *
 *  Intel Open Source License 
 *
 *  Copyright (c) 2002 Intel Corporation 
 *  All rights reserved. 
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions are
 *  met:
 * 
 *	Redistributions of source code must retain the above copyright
 *  notice, this list of conditions and the following disclaimer.
 *	Redistributions in binary form must reproduce the above copyright
 *  notice, this list of conditions and the following disclaimer in the
 *  documentation and/or other materials provided with the distribution.
 *      Neither the name of the Intel Corporation nor the names of its
 *  contributors may be used to endorse or promote products derived from
 *  this software without specific prior written permission.
 *  
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
 *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
 *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
 *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
 *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
 *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * 
 */
/*
 *
 * Authors:		Jason Hill, David Gay, Philip Levis
 *
 * Changed by Mads Bondo Dydensborg, <madsdyd at diku.dk>
 *
 * This file implements support for the UART1 running at 19200 8N1. 
 * This may change :-)
 *
 * Ported to 8051 by Sidsel Jensen & Anders Egeskov Petersen, 
 *                   Dept of Computer Science, University of Copenhagen
 * Date last modified: Dec 2005
 *
 */

// The hardware presentation layer. See hpl.h for the C side.
// Note: there's a separate C side (hpl.h) to get access to the avr macros

// The model is that HPL is stateless. If the desired interface is as stateless
// it can be implemented here (Clock, FlashBitSPI). Otherwise you should
// create a separate component.

module HPLUARTM {
  provides interface HPLUART as UART;
  uses interface Interrupt;
}

implementation {

  uint8_t *sendStart, *sendEnd;
  uint8_t mychar[2];

  task void signal_done_tsk();

// Uart initialization routine.
  async command result_t UART.init() {
    atomic{
  // Pins
      P0_ALT |= 0x06;
      P0_DIR |= 0x02;
  // Timer1 options  19.2 Kb/s
      TMOD &= 0x0F;	// GATE=0; CT=0; M=2
      TMOD |= 0x20;
      CKCON |= 0x10;	// T1M=1 (/4 timer clock)
      TH1 = 0xF3;	// Reload
      TL1 = TH1;
      TR1 = 1;
  // Serial		// 8 bit; No Parity; 1 stop bit
      PCON |= 0x80;	// Baud Rate = Timer1 overflow / 16
      SCON = 0x52;	// Serial mode1, enable receiver
      ES = 1;		// Enable serial interrupt

  // Initialize variables
      sendStart = NULL;
    }

    return SUCCESS;
  }

  async command result_t UART.stop() {
    atomic ES = 0;
    return SUCCESS;
  }

  /* Set the rate */
  async command result_t UART.setRate(int rate) {
    return SUCCESS;
  }

  default async event result_t UART.get(uint8_t data) { 
    return SUCCESS; 
  }

  async command result_t UART.put2(uint8_t * start, uint8_t * end) {
    bool was_sending;
     atomic { 
       if(sendStart == NULL) {
         sendStart = start;
         sendEnd = end;
         was_sending = FALSE;
       } else
         was_sending = TRUE;
     }
       if (was_sending) {
				// There's something in the send buffer
				// and we're not done sending what was in there..
         return FAIL;
       } else {
				// Enable data register empty interrupt
				// Once we get one we'll start sending
         atomic TI = 1;
         return SUCCESS;
       }
  }

  async command result_t UART.put(uint8_t data) {
    atomic mychar[0] = data;
    return call UART.put2(mychar, &mychar[1]);
  }

  TOSH_INTERRUPT(SIG_SERIAL) {
    char buffer;
    if(RI) {			// Receive
      atomic buffer = SBUF;
      signal UART.get(buffer);
      atomic RI = 0;
    }
    else if(TI) {		// Transmit done
      atomic {
        if (sendStart && (sendStart < sendEnd)) {
          SBUF = *(sendStart);	// Transmit the data
          sendStart++;
        } else {
          // Leave interrupt context
          post signal_done_tsk();
        }
        TI = 0;
      }
    }
  }

  /* Task posted to leave interrupt context */
  task void signal_done_tsk() {
    atomic {
      sendStart = NULL;
    }
      signal UART.putDone();
  }

}

--- NEW FILE: LedsC.nc ---
// $Id: LedsC.nc,v 1.1 2006/04/07 12:49:54 mleopold Exp $

/*									tab:4
 * "Copyright (c) 2000-2003 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
 * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
 *
 * Copyright (c) 2002-2003 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/*
 *
 * Authors:		Jason Hill, David Gay, Philip Levis
 *
 * Ported to 8051 by Sidsel Jensen & Anders Egeskov Petersen, 
 *                   Dept of Computer Science, University of Copenhagen
 * Date last modified: Jul 2005
 */

/**
 * @author Jason Hill
 * @author David Gay
 * @author Philip Levis
 * @author Sidsel Jensen
 * @author Anders Egeskov Petersen
 */

module LedsC {
  provides interface Leds;
}

implementation {
  uint8_t ledsOn;

  enum {
    RED_BIT = 1,
    GREEN_BIT = 2,
    YELLOW_BIT = 4
  };

  async command result_t Leds.init() {
    atomic {
      ledsOn = 0;
      dbg(DBG_BOOT, "LEDS: initialized.\n");
      TOSH_MAKE_RED_LED_OUTPUT();
      TOSH_MAKE_YELLOW_LED_OUTPUT();
      TOSH_MAKE_GREEN_LED_OUTPUT();
      TOSH_SET_RED_LED_PIN();
      TOSH_SET_YELLOW_LED_PIN();
      TOSH_SET_GREEN_LED_PIN();
    }
    return SUCCESS;
  }

  async command result_t Leds.redOn() {
    dbg(DBG_LED, "LEDS: Red on.\n");
    atomic {
      TOSH_SET_RED_LED_PIN();
      ledsOn |= RED_BIT;
    }
    return SUCCESS;
  }

  async command result_t Leds.redOff() {
    dbg(DBG_LED, "LEDS: Red off.\n");
     atomic {
       TOSH_CLR_RED_LED_PIN();
       ledsOn &= ~RED_BIT;
     }
     return SUCCESS;
  }

  async command result_t Leds.redToggle() {
    result_t rval;
    atomic {
      if (ledsOn & RED_BIT)
        rval = call Leds.redOff();
      else
        rval = call Leds.redOn();
    }
    return rval;
  }

  async command result_t Leds.greenOn() {
    dbg(DBG_LED, "LEDS: Green on.\n");
    atomic {
      TOSH_SET_GREEN_LED_PIN();
      ledsOn |= GREEN_BIT;
    }
    return SUCCESS;
  }

  async command result_t Leds.greenOff() {
    dbg(DBG_LED, "LEDS: Green off.\n");
    atomic {
      TOSH_CLR_GREEN_LED_PIN();
      ledsOn &= ~GREEN_BIT;
    }
    return SUCCESS;
  }

  async command result_t Leds.greenToggle() {
    result_t rval;
    atomic {
      if (ledsOn & GREEN_BIT)
        rval = call Leds.greenOff();
      else
        rval = call Leds.greenOn();
    }
    return rval;
  }

  async command result_t Leds.yellowOn() {
    dbg(DBG_LED, "LEDS: Yellow on.\n");
    atomic {
      TOSH_SET_YELLOW_LED_PIN();
      ledsOn |= YELLOW_BIT;
    }
    return SUCCESS;
  }

  async command result_t Leds.yellowOff() {
    dbg(DBG_LED, "LEDS: Yellow off.\n");
    atomic {
      TOSH_CLR_YELLOW_LED_PIN();
      ledsOn &= ~YELLOW_BIT;
    }
    return SUCCESS;
  }

  async command result_t Leds.yellowToggle() {
    result_t rval;
    atomic {
      if (ledsOn & YELLOW_BIT)
        rval = call Leds.yellowOff();
      else
        rval = call Leds.yellowOn();
    }
    return rval;
  }

  async command uint8_t Leds.get() {
    uint8_t rval;
    atomic {
      rval = ledsOn;
    }
    return rval;
  }

  async command result_t Leds.set(uint8_t ledsNum) {
    atomic {
      ledsOn = (ledsNum & 0x7);
      if (ledsOn & GREEN_BIT) 
        TOSH_SET_GREEN_LED_PIN();
      else
        TOSH_CLR_GREEN_LED_PIN();

      if (ledsOn & YELLOW_BIT ) 
        TOSH_SET_YELLOW_LED_PIN();
      else 
        TOSH_CLR_YELLOW_LED_PIN();

      if (ledsOn & RED_BIT) 
        TOSH_SET_RED_LED_PIN();
      else 
        TOSH_CLR_RED_LED_PIN();
    }
    return SUCCESS;
  }
}

--- NEW FILE: RealMain.nc ---
// $Id: RealMain.nc,v 1.1 2006/04/07 12:49:54 mleopold Exp $

/*									tab:4
 * "Copyright (c) 2000-2003 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
 * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
 *
 * Copyright (c) 2002-2003 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/*
 *
 * Authors:		Jason Hill, David Gay, Philip Levis
 * Date last modified:  $Id: RealMain.nc,v 1.1 2006/04/07 12:49:54 mleopold Exp $
 *
 */

/**
 * @author Jason Hill
 * @author David Gay
 * @author Philip Levis
 */

module RealMain {
  uses {
    command result_t hardwareInit();
    interface StdControl;
  }
}
implementation
{

  uint8_t idlemode __attribute__ ((C));
  uint8_t adcmode __attribute__ ((C));

  int main() __attribute__ ((C, spontaneous)) 
  {
    call hardwareInit();
    TOSH_sched_init();

    call StdControl.init();
    call StdControl.start();
    __nesc_enable_interrupt();

    while(1) {
       TOSH_run_task();
    }
  }

  void TOSH_sleep() __attribute__ ((C)) 
  {
  }

  void TOSH_wait() __attribute__ ((C))
  {
    // Argh.. Nescc doesn't uderstand sdcc dialect
    //    _asm 
    //   nop
    //  nopK
    //_endasm;
  }

}

--- NEW FILE: TimerC.nc ---
// $Id: TimerC.nc,v 1.1 2006/04/07 12:49:54 mleopold Exp $

/*									tab:4
 * "Copyright (c) 2000-2003 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
 * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
 *
 * Copyright (c) 2002-2003 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */
/* 
 * Authors:  Su Ping,  (converted to nesC by Sam Madden)
 *           David Gay,      Intel Research Berkeley Lab
 *           Phil Levis
 * Date:     4/12/2002
 *
 * Ported to 8051 by Sidsel Jensen & Anders Egeskov Petersen, 
 *                   Dept of Computer Science, University of Copenhagen
 * Date last modified: Nov 2005
 *
 */

/**
 * @author Su Ping
 * @author (converted to nesC by Sam Madden)
 * @author David Gay
 * @author Intel Research Berkeley Lab
 * @author Phil Levis
 * @author Sidsel Jensen
 * @author Anders Egeskov Petersen
 */

configuration TimerC {
  provides {
    interface Timer[uint8_t id];
    interface StdControl;
  }
}

implementation {
  components TimerM, ClockC, NoLeds, HPLPowerManagementM;

  TimerM.Leds -> NoLeds;
  TimerM.Clock -> ClockC;
  TimerM.PowerManagement -> HPLPowerManagementM;

  StdControl = TimerM;
  TimerM.ClockControl -> ClockC.StdControl;
  Timer = TimerM;
}

--- NEW FILE: TimerM.nc ---
// $Id: TimerM.nc,v 1.1 2006/04/07 12:49:54 mleopold Exp $

/*									tab:4
 * "Copyright (c) 2000-2003 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
 * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
 *
 * Copyright (c) 2002-2003 Intel Corporation
 * All rights reserved.
 *
 * This file is distributed under the terms in the attached INTEL-LICENSE     
 * file. If you do not find these files, copies can be found by writing to
 * Intel Research Berkeley, 2150 Shattuck Avenue, Suite 1300, Berkeley, CA, 
 * 94704.  Attention:  Intel License Inquiry.
 */

/* Authors:          Su Ping <sping at intel-research.net>
 *
 * Ported to 8051 by Sidsel Jensen & Anders Egeskov Petersen, 
 *                   Dept of Computer Science, University of Copenhagen
 * Date last modified: Nov 2005
 */

module TimerM {
  provides {
    interface Timer[uint8_t id];
    interface StdControl;
  }
  uses {
    interface Leds;
    interface Clock;
    interface PowerManagement;
    interface StdControl as ClockControl;
  }
}

implementation {
  uint32_t mState;		// each bit represent a timer state 
  uint32_t mInterval;		// Wider interface
  uint8_t  setIntervalFlag; 
  uint8_t mScale;
  int8_t queue_head;
  int8_t queue_tail;
  uint8_t queue_size;
  uint8_t queue[NUM_TIMERS];

  struct timer_s {
    uint8_t type;		// one-short or repeat timer
    int32_t ticks;		// clock ticks for a repeat timer 
    int32_t ticksLeft;		// ticks left before the timer expires
  } mTimerList[NUM_TIMERS];

  enum {
    maxTimerInterval = 0xFFFFU	// Maximum timer-ticks per interrupt (max 16 bit)
  };

  command result_t StdControl.init() {
    atomic {
      mState=0;
      setIntervalFlag = 0;
      queue_head = queue_tail = -1;
      queue_size = 0;
      mScale = DEFAULT_SCALE;
      mInterval = maxTimerInterval;
      mInterval &= 0xFFFF;		// Typecast workaround
    }
    call ClockControl.init();
    return call Clock.setRate((uint16_t)mInterval, mScale);
  }

  command result_t StdControl.start() {
    return call ClockControl.start();
  }

  command result_t StdControl.stop() {
    mState=0;
    mInterval = maxTimerInterval;
    mInterval &= 0xFFFF;		// Typecast workaround
    setIntervalFlag = 0;
    return SUCCESS;
  }

  static void adjustInterval() {
    uint8_t i;
    uint32_t val = maxTimerInterval;
    val &= 0xFFFF;			// Typecast workaround
    if (mState) {
      for (i=0;i<NUM_TIMERS;i++) {
        if ((mState&(0x1L<<i)) && (mTimerList[i].ticksLeft < val)) {
          val = mTimerList[i].ticksLeft;
        }
      }
      atomic {
        mInterval = val;
        call Clock.setInterval(mInterval);
        setIntervalFlag = 0;
      }
    } else {
      atomic {
        mInterval = maxTimerInterval;
        mInterval &= 0xFFFF;		// Typecast workaround
        call Clock.setInterval(mInterval);
        setIntervalFlag = 0;
      }
    }
//    call PowerManagement.adjustPower();
  }

  command result_t Timer.start[uint8_t id](char type, uint32_t interval) {
    uint16_t pos;
    if (id >= NUM_TIMERS) return FAIL;
    if (type>1) return FAIL;
    interval *= TICKS_PER_MILIS;
    mTimerList[id].ticks = interval;
    mTimerList[id].ticksLeft = interval;
    mTimerList[id].type = type;

    atomic {
      pos = call Clock.readCounter();
      mInterval -= (2^16) - pos;		// Timer travel sence last interrupt
      mState |= (0x1L<<id);
    } 
    adjustInterval();
    return SUCCESS;
  }

    command result_t Timer.stop[uint8_t id]() {
      if (id>=NUM_TIMERS) return FAIL;
      if (mState&(0x1L<<id)) {		// if the timer is running 
        atomic mState &= ~(0x1L<<id);
        if (!mState) {
          setIntervalFlag = 1;
        }
        return SUCCESS;
      }
      if(mState == 0) TR2 = 0;
      return FAIL; //timer not running
    }

    default event result_t Timer.fired[uint8_t id]() {
        return SUCCESS;
    }

    void enqueue(uint8_t value) {
      if (queue_tail == NUM_TIMERS - 1)
        queue_tail = -1;
      queue_tail++;
      queue_size++;
      queue[(uint8_t)queue_tail] = value;
    }

    uint8_t dequeue() {
      if (queue_size == 0)
        return NUM_TIMERS;
      if (queue_head == NUM_TIMERS - 1)
        queue_head = -1;
      queue_head++;
      queue_size--;
      return queue[(uint8_t)queue_head];
    }

    task void signalOneTimer() {
      uint8_t itimer = dequeue();
      if (itimer < NUM_TIMERS)
        signal Timer.fired[itimer]();
    }

    task void HandleFire() {
      uint8_t i;
      setIntervalFlag = 1;
      if (mState) {
        for (i=0; i<NUM_TIMERS; i++)  {
          if (mState & (0x1L<<i)) {
            mTimerList[i].ticksLeft -= (mInterval+1);
            if (mTimerList[i].ticksLeft<=2) {
              if (mTimerList[i].type==TIMER_REPEAT) {
                mTimerList[i].ticksLeft += mTimerList[i].ticks;
              } else {                       // one shot timer 
                mState &=~(0x1L<<i); 
              }
              enqueue(i);
              post signalOneTimer();
            }
          }
        }
      }
      adjustInterval();
    }

    async event result_t Clock.fire() {
      post HandleFire();
      return SUCCESS;
    }

}

--- NEW FILE: hardware.h ---
/*                                                                      tab:4
 * 
 *
 * "Copyright (c) 2000 and The Regents of the University 
 * of California.  All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice and the following
 * two paragraphs appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
 * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
 *
 * Authors:             Jason Hill, Philip Levis, Nelson Lee, David Gay
 *
 * Modified for btnode2_2 hardware by Mads Bondo Dydensborg
 * <madsdyd at diku.dk>, 2002-2003
 *
 * Ported to 8051 by Martin Leopold, Sidsel Jensen & Anders Egeskov Petersen, 
 *                   Dept of Computer Science, University of Copenhagen
 * Date last modified: Nov 2005
 */

// Include from system/tos.h

#ifndef TOSH_HARDWARE_H
#define TOSH_HARDWARE_H

#include <mcs51hardware.h>

#define __inw(port)  inw(port)
#define __inw_atomic(port) inw(port)

// Let's try that with outw as well =] ML 09.03.2003
#define __outw(t,port)  outw(t,port)
//#define __outw_atomic(port) outw(t,port)

// Called from HPLInit (in avrmote platform)
void TOSH_SET_PIN_DIRECTIONS(void)
{
    TOSH_SET_RED_LED_PIN();
    TOSH_SET_GREEN_LED_PIN();
    TOSH_SET_YELLOW_LED_PIN();
    TOSH_MAKE_RED_LED_OUTPUT();
    TOSH_MAKE_GREEN_LED_OUTPUT();
    TOSH_MAKE_YELLOW_LED_OUTPUT();
}

enum {
     TOSH_ADC_PORTMAPSIZE = 9
};

#endif //TOSH_HARDWARE_H

--- NEW FILE: mcs51hardware.h ---
/*									tab:4
 *
 *
 * "Copyright (c) 2000-2002 The Regents of the University  of California.  
 * All rights reserved.
 *
 * Permission to use, copy, modify, and distribute this software and its
 * documentation for any purpose, without fee, and without written agreement is
 * hereby granted, provided that the above copyright notice, the following
 * two paragraphs and the author appear in all copies of this software.
 * 
 * IN NO EVENT SHALL THE UNIVERSITY OF CALIFORNIA BE LIABLE TO ANY PARTY FOR
 * DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES ARISING OUT
 * OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF THE UNIVERSITY OF
 * CALIFORNIA HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * THE UNIVERSITY OF CALIFORNIA SPECIFICALLY DISCLAIMS ANY WARRANTIES,
 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 * AND FITNESS FOR A PARTICULAR PURPOSE.  THE SOFTWARE PROVIDED HEREUNDER IS
 * ON AN "AS IS" BASIS, AND THE UNIVERSITY OF CALIFORNIA HAS NO OBLIGATION TO
 * PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, OR MODIFICATIONS."
 *
 */
/*									tab:4
 *  IMPORTANT: READ BEFORE DOWNLOADING, COPYING, INSTALLING OR USING.  By
 *  downloading, copying, installing or using the software you agree to
 *  this license.  If you do not agree to this license, do not download,
 *  install, copy or use the software.
 *
 *  Intel Open Source License 
 *
 *  Copyright (c) 2002 Intel Corporation 
 *  All rights reserved. 
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions are
 *  met:
 * 
 *	Redistributions of source code must retain the above copyright
 *  notice, this list of conditions and the following disclaimer.
 *	Redistributions in binary form must reproduce the above copyright
 *  notice, this list of conditions and the following disclaimer in the
 *  documentation and/or other materials provided with the distribution.
 *      Neither the name of the Intel Corporation nor the names of its
 *  contributors may be used to endorse or promote products derived from
 *  this software without specific prior written permission.
 *  
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
 *  PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE INTEL OR ITS
 *  CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 *  EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 *  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
 *  PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
 *  LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
 *  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 *  SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 */
/*
 *
 * Authors:             Jason Hill, Philip Levis, Nelson Lee
 *
 * Ported to 8051 by Martin Leopold, Sidsel Jensen & Anders Egeskov Petersen, 
 *                   Dept of Computer Science, University of Copenhagen
 * Date last modified: Nov 2005
 *
 */

#ifndef TOSH_AVRHARDWARE_H
#define TOSH_AVRHARDWARE_H

#include <8051.h>

#define TOSH_ASSIGN_PIN(name, port, bit) \
static inline void TOSH_SET_##name##_PIN() { port |= 1<<bit;} \
static inline void TOSH_CLR_##name##_PIN() { port &= ~(1<<bit);} \
static inline char TOSH_READ_##name##_PIN() { return 0x01 & ( port >>bit);} \
static inline void TOSH_MAKE_##name##_OUTPUT() { port##_DIR &= ~(1<<bit);} \
static inline void TOSH_MAKE_##name##_INPUT() { port##_DIR |= (1<<bit);} 

#define TOSH_ASSIGN_OUTPUT_ONLY_PIN(name, port, bit) \
static inline void TOSH_SET_##name##_PIN() {port |= 1<<bit;} \
static inline void TOSH_CLR_##name##_PIN() {port &= ~(1<<bit);} \
static inline void TOSH_MAKE_##name##_OUTPUT() {##port##_DIR 1<<bit;}

#define TOSH_ALIAS_OUTPUT_ONLY_PIN(alias, connector)\
static inline void TOSH_SET_##alias##_PIN() {TOSH_SET_##connector##_PIN();} \
static inline void TOSH_CLR_##alias##_PIN() {TOSH_CLR_##connector##_PIN();} \
static inline void TOSH_MAKE_##alias##_OUTPUT() {} \

#define TOSH_ALIAS_PIN(alias, connector) \
static inline void TOSH_SET_##alias##_PIN() {TOSH_SET_##connector##_PIN();} \
static inline void TOSH_CLR_##alias##_PIN() {TOSH_CLR_##connector##_PIN();} \
static inline char TOSH_READ_##alias##_PIN() {return TOSH_READ_##connector##_PIN();} \
static inline void TOSH_MAKE_##alias##_OUTPUT() {TOSH_MAKE_##connector##_OUTPUT();} \
static inline void TOSH_MAKE_##alias##_INPUT()  {TOSH_MAKE_##connector##_INPUT();} 

// We need slightly different defs than SIGNAL, INTERRUPT
// See gcc manual for explenation of gcc-attributes
// See nesC Language Reference Manual for nesc attributes
//
// signal: Interrupts will be disabled inside function.
// interrupt: Sets up interrupt vector, but doesn't disable interrupts
// spontaneous: nesc attribute to indicate that there are "inisible" calls to this
//              function i.e. interrupts

#include <avr/signal.h>

#define TOSH_SIGNAL(signame)					\
void signame() __attribute__ ((signal, spontaneous, C))

#define TOSH_INTERRUPT(signame)				\
void signame() __attribute__ ((interrupt, spontaneous, C))

//#define TOSH_INTERRUPT(signame)				\
//void SIG_signame() interrupt signame

// atomic statement runtime support
typedef uint8_t __nesc_atomic_t;

inline void __nesc_disable_interrupt() {
  EA=0;
}

inline void __nesc_enable_interrupt() {
  EA=1;
}

inline __nesc_atomic_t __nesc_atomic_start(void) __attribute__((spontaneous)) {
  __nesc_atomic_t tmp = EA;
  EA = 0; 
  return tmp;
}

inline void __nesc_atomic_end(__nesc_atomic_t oldSreg) __attribute__((spontaneous)) {
  EA = oldSreg;
}

/* Assign LEDS to PINS */
TOSH_ASSIGN_PIN(RED_LED, P1, 0);
TOSH_ASSIGN_PIN(GREEN_LED, P1, 1);
TOSH_ASSIGN_PIN(YELLOW_LED, P0, 7);

extern uint8_t idlemode;
extern uint8_t adcmode;

//
// See comment in RealMain.nc for a description of how these functions
// interact with the TOSH_sleep function.
//
// These are declared as macros, as the atomic-keyword isn't working
// when this file is processed :-(. A nicer solution would be to have
// these as inline functions, and the idlemode/adcmode variables
// declared extern in this file also.
//
#define TOSH_ENTER_IDLE_MODE() do { atomic { idlemode++; MCUCR &= ~BV(SE); } } while(0);
#define TOSH_LEAVE_IDLE_MODE() do { atomic { idlemode--; MCUCR &= ~BV(SE); } } while(0);
#define TOSH_ENTER_ADC_MODE()  do { atomic { adcmode++;  MCUCR &= ~BV(SE); } } while(0);
#define TOSH_LEAVE_ADC_MODE()  do { atomic { adcmode--;  MCUCR &= ~BV(SE); } } while(0);

#endif //TOSH_AVRHARDWARE_H