[Tinyos-contrib-commits]
CVS: tinyos-1.x/contrib/handhelds/swtest/TestDMA
TestDMA.nc, 1.1, 1.2 TestDMA_M.nc, 1.1, 1.2
steve ayer
ayer1 at users.sourceforge.net
Thu Aug 3 12:16:51 PDT 2006
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CVS: tinyos-1.x/contrib/handhelds/swtest/TestSD
Makefile, NONE, 1.1 SDApp.nc, NONE, 1.1 SDAppM.nc, NONE, 1.1
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CVS: tinyos-1.x/contrib/handhelds/tools/make
shimmer.target, NONE, 1.1 telosb.target, 1.1, 1.2
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Update of /cvsroot/tinyos/tinyos-1.x/contrib/handhelds/swtest/TestDMA
In directory sc8-pr-cvs10.sourceforge.net:/tmp/cvs-serv16969/swtest/TestDMA
Modified Files:
TestDMA.nc TestDMA_M.nc
Log Message:
added shimmer platform, including programming mods to bsl.py
interface and lib updates to DMA->ADC machinery, test code
added SD lib module, test code
updates telos_ap.c/Makefile to handle old (pre-2.6.15) and new kernel ip api
commented out interrupt flag clearing in setmodespi in hplusart[0-1]m.nc, because this breaks some spi comm initializations
added telosb platform to handle interface skew between new (shimmer) and old (telosb) platforms
Index: TestDMA.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-1.x/contrib/handhelds/swtest/TestDMA/TestDMA.nc,v
retrieving revision 1.1
retrieving revision 1.2
diff -C2 -d -r1.1 -r1.2
*** TestDMA.nc 29 Jul 2005 18:29:21 -0000 1.1
--- TestDMA.nc 3 Aug 2006 19:16:49 -0000 1.2
***************
*** 51,58 ****
/* have to fix compile time channel limitation */
TestDMA_M.DMA0 -> DMA_M.DMA[0];
! // TestDMA_M.DMA1 -> DMA_M.DMA[1];
! // TestDMA_M.DMA2 -> DMA_M.DMA[2];
TestDMA_M.Leds -> LedsC;
TestDMA_M.yTimer -> TimerC.Timer[unique("Timer")];
TestDMA_M.rTimer -> TimerC.Timer[unique("Timer")];
--- 51,59 ----
/* have to fix compile time channel limitation */
TestDMA_M.DMA0 -> DMA_M.DMA[0];
! TestDMA_M.DMA1 -> DMA_M.DMA[1];
! TestDMA_M.DMA2 -> DMA_M.DMA[2];
TestDMA_M.Leds -> LedsC;
TestDMA_M.yTimer -> TimerC.Timer[unique("Timer")];
+ TestDMA_M.gTimer -> TimerC.Timer[unique("Timer")];
TestDMA_M.rTimer -> TimerC.Timer[unique("Timer")];
***************
*** 61,64 ****
--- 62,66 ----
TestDMA_M.UIP -> IPClientC;
TestDMA_M.Client -> IPClientC;
+ TestDMA_M.TCPClient -> IPClientC.TCPClient[unique("TCPClient")];
TestDMA_M.PVStdControl -> ParamViewM;
Index: TestDMA_M.nc
===================================================================
RCS file: /cvsroot/tinyos/tinyos-1.x/contrib/handhelds/swtest/TestDMA/TestDMA_M.nc,v
retrieving revision 1.1
retrieving revision 1.2
diff -C2 -d -r1.1 -r1.2
*** TestDMA_M.nc 29 Jul 2005 18:29:21 -0000 1.1
--- TestDMA_M.nc 3 Aug 2006 19:16:49 -0000 1.2
***************
*** 31,34 ****
--- 31,35 ----
* Authors: Steve Ayer
* April 2005
+ * rewritten by s.a. to account for a.c.'s rewritten interface, 3/06
*/
***************
*** 43,48 ****
uses {
interface DMA as DMA0;
! // interface DMA as DMA1;
! // interface DMA as DMA2;
// interface ADC as ADC0;
--- 44,49 ----
uses {
interface DMA as DMA0;
! interface DMA as DMA1;
! interface DMA as DMA2;
// interface ADC as ADC0;
***************
*** 53,60 ****
--- 54,63 ----
interface UIP;
interface Client;
+ interface TCPClient;
/* end telnet stuff */
interface Leds;
// interface Telnet;
interface Timer as yTimer;
+ interface Timer as gTimer;
interface Timer as rTimer;
}
***************
*** 65,173 ****
#define MESSAGE_MAX_LENGTH 128
! uint8_t howbig, complete = 0;
! uint16_t inbuf[256], *curr;
! char easy[32];
! char * ss = "hi dma";
uint16_t adcifg_count = 0;
- void setupADC() {
- atomic {
- // set up adc
- ADC12CTL0 = ADC12ON;
-
- ADC12CTL0 |= REFON; // internal source for above
- ADC12CTL0 |= SHT0_12 + SHT1_10; // smclk @ 1MHz; / 512 here for 2kHz
- ADC12CTL0 |= MSC; // multiple conversions without more triggers
- ADC12CTL1 = SHS_0 + SHP + CONSEQ_2; // s&h from adc12sc bit, repeat single-channel conversion
- ADC12CTL1 |= ADC12SSEL_3; // clk from smclk
-
- ADC12MCTL0 |= INCH_1; // use input channel 1
- ADC12MCTL0 |= SREF_0; // Vref = Vref+ and Vr-
-
- // ADC12IE = 0x01;
- ADC12CTL0 |= ENC; // enable conversion
- }
- }
-
void setupDMA() {
! atomic {
! DMA0SA = ADC12MEM0_; // src first adc buf register
! DMA0DA = inbuf; // static ram variable
! DMA0SZ = sizeof(inbuf) >> 1; // in words
! DMACTL0 = DMA0TSEL_6; // trigger from ADC12IFGx
! DMA0CTL = DMADT_4 + DMADSTINCR_3 + DMASRCINCR_0; // repeat single transfer (no ie reset), increment dest addr, static src addr
! DMA0CTL &= ~DMADSTBYTE; // src and dest word-size transfers, implicit as zero (why these are unnecessary)
! DMA0CTL &= ~DMASRCBYTE;
! DMA0CTL |= DMAEN + DMAIE; // enabled and interrupt enabled
}
}
- void simpleDMA() {
- DMA0SA = ss; // src string
- DMA0DA = inbuf; // static ram variable
- DMA0SZ = strlen(ss); // in bytes
-
- DMACTL0 = DMA0TSEL_0; // trigger from software
! DMA0CTL = DMADT_4 + DMADSTINCR_3 + DMASRCINCR_3; // repeat single transfer (no ie reset), increment dest addr, static src addr
! DMA0CTL |= DMASRCBYTE;
! DMA0CTL |= DMAEN + DMAIE; // enabled and interrupt enabled
- }
-
- void sampleADC() {
- setupADC();
setupDMA();
! atomic{
! ADC12CTL0 |= ENC + ADC12SC; // start conversion
! *curr = ADC12MEM0;
! *curr = 0;
! }
! }
! void simpleConvert() {
! setupADC();
! ADC12CTL0 |= ENC + ADC12SC;
!
! atomic{
! *curr = ADC12MEM0;
! *curr = 0;
! }
! }
! void simpleTransfer() {
! simpleDMA();
- call yTimer.start(TIMER_REPEAT, 1);
- DMA0CTL |= DMAREQ; // software start by setting this bit
}
task void adcResults() {
! call rTimer.start(TIMER_REPEAT, 250);
! }
! task void dmaResults() {
! call yTimer.start(TIMER_REPEAT, 250);
! }
! command result_t StdControl.init() {
! howbig = MESSAGE_MAX_LENGTH;
call PVStdControl.init();
call IPStdControl.init();
- call TelnetStdControl.init();
! P6SEL |= 0x02; // peripheral fn (adc) for p6.1 == adc channel a1
! P6DIR &= ~0x02; // p6.1 as input
! memset(inbuf, 0, sizeof(inbuf));
! curr = inbuf;
call Leds.init();
--- 68,218 ----
#define MESSAGE_MAX_LENGTH 128
! uint8_t dma_transfers, write_step, status = 0;
! uint16_t inbuf0[256], inbuf1[256], inbuf2[256], *curr0, *curr1, *curr2;
uint16_t adcifg_count = 0;
void setupDMA() {
! call DMA0.init();
! call DMA1.init();
! call DMA2.init();
! atomic {
! /* DMA0DA = (uint16_t *)inbuf0; // directly to ram
! DMA1DA = (uint16_t *)inbuf1;
! DMA2DA = (uint16_t *)inbuf2;
! */
! call DMA0.setDestinationAddress(inbuf0);
! call DMA1.setDestinationAddress(inbuf1);
! call DMA2.setDestinationAddress(inbuf2);
! DMA0SZ = sizeof(inbuf0) >> 1;
! DMA1SZ = sizeof(inbuf1) >> 1;
! DMA2SZ = sizeof(inbuf2) >> 1;
! DMACTL1 |= 0x0002; // round-robin
}
}
! void sampleADC() {
! call DMA0.ADCinit(); // this doesn't really need to be parameterized
!
! ADC12CTL1 &= ~ADC12SSEL_3; // clr clk from smclk
! ADC12CTL1 |= ADC12SSEL_0; // clk from aclk
! ADC12CTL1 |= ADC12DIV_7; // divide clk by 8
! // sample and hold time four adc12clk cycles
! ADC12CTL0 |= SHT0_0;
! // conversion start address
! ADC12CTL1 |= CSTARTADD_0; // really a zero, for clarity
! // set input channel
! call DMA0.ADCsetMemRegisterInputChannel(0, 3); // memreg 0 <= channel 0 the way shimmer is wired, really not a very useful interface
! call DMA0.ADCsetMemRegisterInputChannel(1, 4); // memreg 1 <= channel 1
! call DMA0.ADCsetMemRegisterInputChannel(2, 5); // memreg 2 <= channel 2
!
! /* set up for three adc channels -> three adcmem regs -> three dma channels in round-robin */
! /* clear init defaults first */
! ADC12CTL1 &= ~CONSEQ_2; // clear default repeat single channel
! // ADC12MCTL0 &= ~INCH_1; // input channel for mem0 is a0
! ADC12CTL1 |= CONSEQ_3; // repeat sequence of channels
!
! /* test to try channel-mapping, though it's supposed to be auto in repeat-sequence...*/
! ADC12MCTL2 |= EOS; //sez "this is the last reg"
setupDMA();
! call DMA0.beginTransfer();
! call DMA1.beginTransfer();
! call DMA2.beginTransfer();
! TOSH_SET_ACCEL_SLEEP_N_PIN(); // wakes up accel board
! call DMA0.ADCbeginConversion();
!
! *curr0 = ADC12MEM0;
! *curr0 = 0;
! *curr1 = ADC12MEM1;
! *curr1 = 0;
! *curr2 = ADC12MEM2;
! *curr2 = 0;
}
task void adcResults() {
! }
! task void dma0Results() {
! }
!
! task void dma1Results() {
! }
!
! task void dma2Results() {
! dma_transfers++;
! if(dma_transfers == 255){
! // reset transfer destinations
! // call DMA0.ADCstopConversion();
! atomic {
! dma_transfers = 0;
! DMA0DA = (uint16_t *)inbuf0;
! DMA1DA = (uint16_t *)inbuf1;
! DMA2DA = (uint16_t *)inbuf2;
! }
! // if(server_present){
! // call DMA0.ADCbeginConversion();
+ call Leds.greenToggle();
+ // call TCPClient.connect(63, 118, 194, 100, 5067);
+ // }
+ }
+ }
+
+ command result_t StdControl.init() {
+ // howbig = MESSAGE_MAX_LENGTH;
+
call PVStdControl.init();
+ call TelnetStdControl.init();
call IPStdControl.init();
! TOSH_MAKE_ACCEL_SLEEP_N_OUTPUT(); // sleep for accel
! TOSH_SEL_ACCEL_SLEEP_N_IOFUNC();
! TOSH_MAKE_ADC_ACCELZ_INPUT(); // clock
! TOSH_SEL_ADC_ACCELZ_MODFUNC();
!
! TOSH_MAKE_ADC_ACCELY_INPUT(); // clock
! TOSH_SEL_ADC_ACCELY_MODFUNC();
!
! TOSH_MAKE_ADC_ACCELX_INPUT(); // clock
! TOSH_SEL_ADC_ACCELX_MODFUNC();
! /*
! TOSH_MAKE_UTXD0_OUTPUT(); // sleep for accel
! TOSH_SEL_UTXD0_IOFUNC();
! */
! /*
! TOSH_MAKE_ADC0_INPUT(); // clock
! TOSH_SEL_ADC0_MODFUNC();
!
! TOSH_MAKE_ADC1_INPUT(); // clock
! TOSH_SEL_ADC1_MODFUNC();
!
! TOSH_MAKE_ADC2_INPUT(); // clock
! TOSH_SEL_ADC2_MODFUNC();
! */
!
! SVSCTL |= VLD_14;
! SVSCTL &= ~PORON;
!
! dma_transfers = 0;
!
! memset(inbuf0, 0, sizeof(inbuf0));
! curr0 = inbuf0;
! memset(inbuf1, 0, sizeof(inbuf1));
! curr1 = inbuf1;
! memset(inbuf2, 0, sizeof(inbuf2));
! curr2 = inbuf2;
call Leds.init();
***************
*** 180,196 ****
sampleADC();
! // simpleConvert();
! // simpleTransfer();
!
return SUCCESS;
}
command result_t StdControl.stop() {
! call TelnetStdControl.stop();
! return call IPStdControl.stop();
}
event result_t yTimer.fired() {
! call Leds.yellowToggle();
// DMA0CTL |= DMAREQ; // software start by setting this bit
--- 225,248 ----
sampleADC();
!
! // call yTimer.start(TIMER_REPEAT, 250);
return SUCCESS;
}
command result_t StdControl.stop() {
! // call TelnetStdControl.stop();
! // return call IPStdControl.stop();
! return SUCCESS;
}
event result_t yTimer.fired() {
! // call Leds.yellowToggle();
! // DMA0CTL |= DMAREQ; // software start by setting this bit
!
! return SUCCESS;
! }
!
! event result_t gTimer.fired() {
! call Leds.greenToggle();
// DMA0CTL |= DMAREQ; // software start by setting this bit
***************
*** 203,210 ****
return SUCCESS;
}
! /*
! event void UART.receive( struct Message *msg ){
! }
! */
async event void DMA0.transferComplete() {
/* ADC12IE = 0; // stop
--- 255,259 ----
return SUCCESS;
}
!
async event void DMA0.transferComplete() {
/* ADC12IE = 0; // stop
***************
*** 212,235 ****
DMA0CTL &= ~DMAEN;
*/
! // call yTimer.stop();
! post dmaResults();
}
- /*
async event void DMA1.transferComplete() {
}
async event void DMA2.transferComplete() {
}
! */
async event void DMA0.ADCInterrupt() {
atomic {
- // DMA0CTL |= DMAREQ; // try to force software start by setting this bit
if(adcifg_count++ > 255){
ADC12CTL0 = 0;
ADC12IE = 0;
! post adcResults();
}
}
}
event void Client.connected( bool isConnected ) {
--- 261,373 ----
DMA0CTL &= ~DMAEN;
*/
! // TOSH_TOGGLE_UTXD0_PIN();
! post dma0Results();
}
async event void DMA1.transferComplete() {
+ // TOSH_TOGGLE_UTXD0_PIN();
+ post dma1Results();
}
+
async event void DMA2.transferComplete() {
+ // TOSH_TOGGLE_UTXD0_PIN();
+ post dma2Results();
}
!
async event void DMA0.ADCInterrupt() {
+ // call Leds.yellowToggle();
atomic {
if(adcifg_count++ > 255){
ADC12CTL0 = 0;
ADC12IE = 0;
! // post adcResults();
}
}
}
+ /*
+ command result_t connect( uint8_t octet1, uint8_t octet2, uint8_t octet3, uint8_t octet4, uint16_t port );
+ command result_t write( const uint8_t *buf, uint16_t len );
+ command result_t close();
+ */
+ event void TCPClient.connectionMade( uint8_t status ) {
+ write_step = 0;
+ call Leds.redOff();
+ call TCPClient.write(inbuf0, 128);
+ call Leds.yellowOn();
+ }
+ /*
+ * version with 128 byte sends
+ */
+ event void TCPClient.writeDone(){
+ call Leds.yellowOff();
+
+ write_step++;
+ switch (write_step) {
+ case 1:
+ call Leds.yellowOn();
+ call TCPClient.write(inbuf0 + 64, 128);
+ break;
+ case 2:
+ call Leds.yellowOn();
+ call TCPClient.write(inbuf0 + 128, 128);
+ break;
+ case 3:
+ call Leds.yellowOn();
+ call TCPClient.write(inbuf0 + 192, 128);
+ break;
+ case 4:
+ call Leds.yellowOn();
+ call TCPClient.write(inbuf1, 128);
+ break;
+ case 5:
+ call Leds.yellowOn();
+ call TCPClient.write(inbuf1 + 64, 128);
+ break;
+ case 6:
+ call Leds.yellowOn();
+ call TCPClient.write(inbuf1 + 128, 128);
+ break;
+ case 7:
+ call Leds.yellowOn();
+ call TCPClient.write(inbuf1 + 192, 128);
+ break;
+ case 8:
+ call Leds.yellowOn();
+ call TCPClient.write(inbuf2, 128);
+ break;
+ case 9:
+ call Leds.yellowOn();
+ call TCPClient.write(inbuf2 + 64, 128);
+ break;
+ case 10:
+ call Leds.yellowOn();
+ call TCPClient.write(inbuf2 + 128, 128);
+ break;
+ case 11:
+ call Leds.yellowOn();
+ call TCPClient.write(inbuf2 + 192, 128);
+ break;
+ default:
+ call TCPClient.close();
+
+ write_step = 0;
+
+ call DMA0.ADCbeginConversion();
+ break;
+ }
+ }
+
+ event void TCPClient.dataAvailable( uint8_t *buf, uint16_t len ){}
+
+ event void TCPClient.connectionFailed( uint8_t reason ){ // Reason = which end died
+ status = reason;
+ call Leds.redOn();
+ // call TCPClient.close();
+ // server_present = 0;
+ // call DMA0.ADCbeginConversion();
+ }
+
+ async event void DMA1.ADCInterrupt() {}
+ async event void DMA2.ADCInterrupt() {}
event void Client.connected( bool isConnected ) {
***************
*** 237,243 ****
--- 375,384 ----
const struct Param s_ADCRegs[] = {
+ { "svsreg", PARAM_TYPE_HEX8, &SVSCTL },
{ "adcctl0", PARAM_TYPE_HEX16, &ADC12CTL0 },
{ "adcctl1", PARAM_TYPE_HEX16, &ADC12CTL1 },
{ "adcmem0", PARAM_TYPE_HEX16, &ADC12MEM0},
+ { "adcmem1", PARAM_TYPE_HEX16, &ADC12MEM1},
+ { "adcmem2", PARAM_TYPE_HEX16, &ADC12MEM2},
{ "adcmemctl", PARAM_TYPE_HEX8, &ADC12MCTL0},
{ "adciv", PARAM_TYPE_HEX16, &ADC12IV},
***************
*** 245,250 ****
{ "adcie", PARAM_TYPE_HEX16, &ADC12IE},
{ "adcifgcount", PARAM_TYPE_HEX16, &adcifg_count},
! { "p6dir", PARAM_TYPE_HEX8, &P6DIR},
! { "p6sel", PARAM_TYPE_HEX8, &P6SEL},
{ NULL, 0, NULL }
};
--- 386,391 ----
{ "adcie", PARAM_TYPE_HEX16, &ADC12IE},
{ "adcifgcount", PARAM_TYPE_HEX16, &adcifg_count},
! // { "p6dir", PARAM_TYPE_HEX8, &P6DIR},
! // { "p6sel", PARAM_TYPE_HEX8, &P6SEL},
{ NULL, 0, NULL }
};
***************
*** 253,293 ****
{ "dmactl1", PARAM_TYPE_HEX16, &DMACTL1 },
{ "dma0ctl", PARAM_TYPE_HEX16, &DMA0CTL},
{ "dma0sa", PARAM_TYPE_HEX16, &DMA0SA},
{ "dma0da", PARAM_TYPE_HEX16, &DMA0DA},
{ "dma0sz", PARAM_TYPE_HEX16, &DMA0SZ},
{ NULL, 0, NULL }
};
! const struct Param s_DMAOutput[] = {
! { "", PARAM_TYPE_HEX16, &inbuf[0] },
! { "", PARAM_TYPE_HEX16, &inbuf[1] },
! { "", PARAM_TYPE_HEX16, &inbuf[2] },
! { "", PARAM_TYPE_HEX16, &inbuf[3] },
! { "", PARAM_TYPE_HEX16, &inbuf[4] },
! { "", PARAM_TYPE_HEX16, &inbuf[5] },
! { "", PARAM_TYPE_HEX16, &inbuf[6] },
! { "", PARAM_TYPE_HEX16, &inbuf[7] },
! { "", PARAM_TYPE_HEX16, &inbuf[8] },
! { "", PARAM_TYPE_HEX16, &inbuf[9] },
! { "", PARAM_TYPE_HEX16, &inbuf[10] },
! { "", PARAM_TYPE_HEX16, &inbuf[11] },
! { "", PARAM_TYPE_HEX16, &inbuf[12] },
! { "", PARAM_TYPE_HEX16, &inbuf[13] },
! { "", PARAM_TYPE_HEX16, &inbuf[14] },
! { "", PARAM_TYPE_HEX16, &inbuf[15] },
! { "", PARAM_TYPE_HEX16, &inbuf[16] },
{ NULL, 0, NULL }
};
struct ParamList g_ADCRegsList = { "adcregs", &s_ADCRegs[0] };
! struct ParamList g_DMAOutList = { "output", &s_DMAOutput[0] };
struct ParamList g_DMARegsList = { "dmaregs", &s_DMARegs[0] };
! command result_t ParamView.init()
! {
! signal ParamView.add( &g_ADCRegsList );
! signal ParamView.add( &g_DMARegsList );
! signal ParamView.add( &g_DMAOutList );
! return SUCCESS;
}
}
--- 394,486 ----
{ "dmactl1", PARAM_TYPE_HEX16, &DMACTL1 },
{ "dma0ctl", PARAM_TYPE_HEX16, &DMA0CTL},
+ { "dma1ctl", PARAM_TYPE_HEX16, &DMA1CTL},
+ { "dma2ctl", PARAM_TYPE_HEX16, &DMA2CTL},
{ "dma0sa", PARAM_TYPE_HEX16, &DMA0SA},
{ "dma0da", PARAM_TYPE_HEX16, &DMA0DA},
{ "dma0sz", PARAM_TYPE_HEX16, &DMA0SZ},
+ { "dma1sa", PARAM_TYPE_HEX16, &DMA1SA},
+ { "dma1da", PARAM_TYPE_HEX16, &DMA1DA},
+ { "dma1sz", PARAM_TYPE_HEX16, &DMA1SZ},
+ { "dma2sa", PARAM_TYPE_HEX16, &DMA2SA},
+ { "dma2da", PARAM_TYPE_HEX16, &DMA2DA},
+ { "dma2sz", PARAM_TYPE_HEX16, &DMA2SZ},
{ NULL, 0, NULL }
};
! const struct Param s_DMA0Output[] = {
! { "status", PARAM_TYPE_HEX8, &status },
! { "", PARAM_TYPE_HEX16, &inbuf0[0] },
! { "", PARAM_TYPE_HEX16, &inbuf0[1] },
! { "", PARAM_TYPE_HEX16, &inbuf0[2] },
! { "", PARAM_TYPE_HEX16, &inbuf0[3] },
! { "", PARAM_TYPE_HEX16, &inbuf0[4] },
! { "", PARAM_TYPE_HEX16, &inbuf0[5] },
! { "", PARAM_TYPE_HEX16, &inbuf0[6] },
! { "", PARAM_TYPE_HEX16, &inbuf0[7] },
! { "", PARAM_TYPE_HEX16, &inbuf0[8] },
! { "", PARAM_TYPE_HEX16, &inbuf0[9] },
! { "", PARAM_TYPE_HEX16, &inbuf0[10] },
! { "", PARAM_TYPE_HEX16, &inbuf0[11] },
! { "", PARAM_TYPE_HEX16, &inbuf0[12] },
! { "", PARAM_TYPE_HEX16, &inbuf0[13] },
! { "", PARAM_TYPE_HEX16, &inbuf0[14] },
! { "", PARAM_TYPE_HEX16, &inbuf0[15] },
! { "", PARAM_TYPE_HEX16, &inbuf0[16] },
! { NULL, 0, NULL }
! };
! const struct Param s_DMA1Output[] = {
! { "", PARAM_TYPE_HEX16, &inbuf1[0] },
! { "", PARAM_TYPE_HEX16, &inbuf1[1] },
! { "", PARAM_TYPE_HEX16, &inbuf1[2] },
! { "", PARAM_TYPE_HEX16, &inbuf1[3] },
! { "", PARAM_TYPE_HEX16, &inbuf1[4] },
! { "", PARAM_TYPE_HEX16, &inbuf1[5] },
! { "", PARAM_TYPE_HEX16, &inbuf1[6] },
! { "", PARAM_TYPE_HEX16, &inbuf1[7] },
! { "", PARAM_TYPE_HEX16, &inbuf1[8] },
! { "", PARAM_TYPE_HEX16, &inbuf1[9] },
! { "", PARAM_TYPE_HEX16, &inbuf1[10] },
! { "", PARAM_TYPE_HEX16, &inbuf1[11] },
! { "", PARAM_TYPE_HEX16, &inbuf1[12] },
! { "", PARAM_TYPE_HEX16, &inbuf1[13] },
! { "", PARAM_TYPE_HEX16, &inbuf1[14] },
! { "", PARAM_TYPE_HEX16, &inbuf1[15] },
! { "", PARAM_TYPE_HEX16, &inbuf1[16] },
! { NULL, 0, NULL }
! };
! const struct Param s_DMA2Output[] = {
! { "", PARAM_TYPE_HEX16, &inbuf2[0] },
! { "", PARAM_TYPE_HEX16, &inbuf2[1] },
! { "", PARAM_TYPE_HEX16, &inbuf2[2] },
! { "", PARAM_TYPE_HEX16, &inbuf2[3] },
! { "", PARAM_TYPE_HEX16, &inbuf2[4] },
! { "", PARAM_TYPE_HEX16, &inbuf2[5] },
! { "", PARAM_TYPE_HEX16, &inbuf2[6] },
! { "", PARAM_TYPE_HEX16, &inbuf2[7] },
! { "", PARAM_TYPE_HEX16, &inbuf2[8] },
! { "", PARAM_TYPE_HEX16, &inbuf2[9] },
! { "", PARAM_TYPE_HEX16, &inbuf2[10] },
! { "", PARAM_TYPE_HEX16, &inbuf2[11] },
! { "", PARAM_TYPE_HEX16, &inbuf2[12] },
! { "", PARAM_TYPE_HEX16, &inbuf2[13] },
! { "", PARAM_TYPE_HEX16, &inbuf2[14] },
! { "", PARAM_TYPE_HEX16, &inbuf2[15] },
! { "", PARAM_TYPE_HEX16, &inbuf2[16] },
{ NULL, 0, NULL }
};
struct ParamList g_ADCRegsList = { "adcregs", &s_ADCRegs[0] };
! struct ParamList g_DMA0OutList = { "output0", &s_DMA0Output[0] };
! struct ParamList g_DMA1OutList = { "output1", &s_DMA1Output[0] };
! struct ParamList g_DMA2OutList = { "output2", &s_DMA2Output[0] };
struct ParamList g_DMARegsList = { "dmaregs", &s_DMARegs[0] };
! command result_t ParamView.init(){
! signal ParamView.add( &g_ADCRegsList );
! signal ParamView.add( &g_DMARegsList );
! signal ParamView.add( &g_DMA0OutList );
! signal ParamView.add( &g_DMA1OutList );
! signal ParamView.add( &g_DMA2OutList );
! return SUCCESS;
}
}
- Previous message: [Tinyos-contrib-commits]
CVS: tinyos-1.x/contrib/handhelds/swtest/TestSD
Makefile, NONE, 1.1 SDApp.nc, NONE, 1.1 SDAppM.nc, NONE, 1.1
- Next message: [Tinyos-contrib-commits]
CVS: tinyos-1.x/contrib/handhelds/tools/make
shimmer.target, NONE, 1.1 telosb.target, 1.1, 1.2
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