[Fwd: Re: [Tinyos-devel] TinyOS on Cortex M3?]

[Andreas Koepke]

I said it was slanted -- apparently even more so...

> For a direct comparison (slanted in favor of ST, but interesting
>  nonetheless) with MSP430:
>
>  http://www.embedded.com/columns/guest/206801769?_requestid=1065133

I note the following excerpt: "The ST ARM Cortex has two possible
low-power modes to compete with the MSP's LMP3. The lowest shuts off
the entire chip and powers the RTC clock only via an external battery
power source. This low-power mode is still more than the MSP in total
average current but is competitive. However, it does not retain RAM
(unlike the MSP)" - this would appear to be the 2.8uA sleep mode.

A bit of googling leads to the datasheet
(http://www.st.com/mcu/pfinder-STM32.html), which says that the "Stop"
mode that preserves RAM is 14uA with a 5.4uS wakeup, or 24uA with a
3.6uS wakeup. This all assumes I'm decoding the datasheet correctly
;-)

David

>
>  Philip Levis:
>
> >
>  > On Mar 13, 2008, at 8:17 AM, John Regehr wrote:
>  >
>  >> I'm just curious-- has anyone looked into porting TinyOS to Cortex M3
>  >> chips?  These represent ARM's attempt to woo developers away from 8
>  >> and 16 bit MCUs.  Based on a quick look, the STM32 product line from
>  >> ST has power numbers roughly in the ballpark for a mote-class device.
>  >>
>  >>   http://www.st.com/mcu/inchtml.php?fdir=pages&fnam=stm32
>  >>   http://www.st.com/mcu/files/mcu/1190813173.pdf
>  >>
>  >
>
> > The last time I checked (which was, admittedly, a year ago), there were
>  > no sleep current numbers for M3 chips. The brochure claims pretty low
>  > numbers. It would be good to see if those hold up in practice; they've
>  > always been the issue with ARM chips.
>  >
>  > Phil
>  > _______________________________________________
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>
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