[Tinyos-host-mote-wg] RE: [Tinyos-2.0wg] proposed mica timer changes

[Phil Buonadonna]

This seems fine.

What about busywait?  It's required by the TEP, but I don't see it in any of
the implementations.  Is this 'going away'?

pb


> -----Original Message-----
> From: tinyos-2.0wg-bounces at Mail.Millennium.Berkeley.EDU 
> [mailto:tinyos-2.0wg-bounces at Mail.Millennium.Berkeley.EDU] On 
> Behalf Of David Gay
> Sent: Friday, October 21, 2005 3:22 PM
> To: tinyos2 group
> Subject: [Tinyos-2.0wg] proposed mica timer changes
> 
> Based on my many days of fighting T2 on mica2 weirdnesses+performance
> issues, I'd like to propose the following changes to the T2 atmega128
> subsystem:
> 
> - HplTimer0C becomes HplTimer0AsyncC and has weird hacks to defeat
> ATmega128 weirdnesses. You'll all be happy to know this requires one
> byte of state ;-) In a semi-ideal world, they'd also be an HplTimer0C
> for those using timer 0 in non-async (i.e., not the external 32kHz
> crystal) mode, but I doubt there's much need for it.
> 
> - Atm128Capture/Alarm/CounterP become Atm128Capture/Alarm/CounterC -
> these aren't private components.
> 
> - AlarmCounter32khzC and AlarmCounterMilliC are two ways of using the
> atmel's 8-bit timer 0 w/ 32kHz crystal. You can't use both (not
> enforced). They provide the Alarm, Counter and Localtime interfaces in
> 32-bit forms, at 32kHz or 1kHz.
> 
> - TimerMilliC is the standard 1kHz timer, built on 
> AlarmCounterMilliC (for now)
> 
> - Timer32khzC is temporarily gone - it didn't work as it was trying to
> use the same alarm as TimerMilliC. Ultimately, if we want this, we'll
> have to do some sharing of the alarm with TimerMilliC as there's only
> one compare register (the best solution would seem to be a hacked
> version of VirtualiseTimerC which can virtualise to two different
> rates - I'll look into this after pldi).
> 
> All this requires a TransformAlarmCounterC component to be 
> added to lib/timer.
> 
> David
> 
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